Bias switch circuit for compensating frontend offset of high accuracy measurement circuit

Abstract

Disclosed is a high accurate measurement circuit, and the feature is using bias switching circuit for compensating front end offset, and the back end offset of amplifier is also cancelled. In the real measurement environment, offset exists in the amplifier of the measurement circuit has, and non-ideal effects also exist in the interface between measurement terminal and the measurement circuit, such as leakage current of chip package pins or mismatch of the circuit. The above non-ideal effects belong to front end offset and cannot be compensated by the prior arts. The disclosed structure uses the bias switch circuit and uses different switching method in the two measurement timings. By subtracting the measurement results for the two measurement timings, the front end offset is compensated, and the back end offset of the amplifier is also cancelled.

Claims

1. An accurate measurement circuit which compensates offset of a front end circuit while performing current measurement, comprising: a measurement terminal, having a positive terminal pin and a negative terminal pin, wherein an impedance is connected between the positive terminal pin and the negative terminal pin and a current flowing through the impedance is measured; an amplifier, having a positive input of amplifier connected to the measurement terminal via the positive terminal pin and a negative input of amplifier connected to the measurement terminal via the negative terminal pin, wherein an output signal is generated according to a voltage difference between the positive input of amplifier and the negative input of amplifier; a first switch, connected between the positive input of amplifier and a reference voltage; and a second switch, connected between the negative input of amplifier and the reference voltage.

2. The accurate measurement circuit according to claim 1, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

3. The accurate measurement circuit according to claim 1, wherein a control method for the switches comprising: a first timing, conducting the first switch, and turning off the second switch; hence the positive input of amplifier is connected to the reference voltage; and a second timing, conducting the second switch, and turning off the first switch; hence the negative input of amplifier is connected to the reference voltage; wherein output voltages generated during the first timing and the second timing are added to compensate an offset of a front end circuit.

4. The accurate measurement circuit according to claim 3, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

5. The accurate measurement circuit according to claim 3, wherein the higher input impedance of the measurement terminal is, the better the compensation effect for the offset of the front end circuit is.

6. The accurate measurement circuit according to claim 3, wherein the closer the current values of the leakage current of positive terminal pin and the leakage current of negative terminal pin are, the better the compensation effect is.

7. An accurate measurement circuit which compensates offset of a front end circuit while performing current measurement, comprising: a measurement terminal, having a positive terminal pin and a negative terminal pin, wherein an impedance is connected between the positive terminal pin and the negative terminal pin and a current flowing through the impedance is measured; an amplifier, generating an output signal according to a voltage difference between a positive input of amplifier and a negative input of amplifier; a first switch and a second switch, wherein one terminal of the first switch and one terminal of the second switch are both connected to a reference voltage, other terminals thereof are connected to the measurement terminal via the positive terminal pin and the negative terminal pin, respectively; a third switch, connected between the positive terminal pin and the positive input of amplifier; a fourth switch, connected between the positive terminal pin and the negative input of amplifier; a fifth switch, connected between the negative terminal pin and the positive input of amplifier; and a sixth switch, connected between the negative terminal pin and the negative input of amplifier.

8. The accurate measurement circuit according to claim 7, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

9. The accurate measurement circuit according to claim 7, wherein a control method for the switches comprising: a first timing, conducting the first switch, the third switch and the sixth switch, and turning off the second switch, the fourth switch and the fifth switch; hence the positive terminal pin and the positive input of amplifier are connected to the reference voltage, and the negative terminal pin is connected to the negative input of amplifier at the same time; and a second timing, conducting the second switch, the fourth switch and the fifth switch, and turning off the first switch, the third switch and the sixth switch; hence the positive terminal pin is connected to the negative input of amplifier, and the negative terminal pin and the positive input of amplifier are connected to the reference voltage at the same time; wherein output voltages generated during the first timing and the second timing are subtracted to compensate offsets of a front end circuit and the amplifier at the same time.

10. The accurate measurement circuit according to claim 9, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

11. The accurate measurement circuit according to claim 9, wherein the higher input impedance of the measurement terminal is, the better the compensation effect for the offset of the front end circuit is.

12. The accurate measurement circuit according to claim 9, wherein the closer the current values of the leakage current of positive terminal pin and the leakage current of negative terminal pin are, the better the compensation effect is.

13. An accurate measurement circuit which compensates offset of a front end circuit while performing current measurement, comprising: a measurement terminal, having a positive terminal pin and a negative terminal pin, wherein an impedance is connected between the positive terminal pin and the negative terminal pin and a current flowing through the impedance is measured; an amplifier, generating an output signal according to a voltage difference between a positive input of amplifier and a negative input of amplifier; a reference voltage, connected to the positive input of amplifier or the negative input of amplifier; a first switch, connected between the positive terminal pin and the positive input of amplifier; a second switch, connected between the positive terminal pin and the negative input of amplifier; a third switch, connected between the negative terminal pin and the positive input of amplifier; and a fourth switch, connected between the negative terminal pin and the negative input of amplifier; wherein the positive terminal pin and the negative terminal pin are used to connect to the measurement terminal.

14. The accurate measurement circuit according to claim 13, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

15. The accurate measurement circuit according to claim 13, wherein a control method for the switches comprising: a first timing, conducting the first switch and the fourth switch, and turning off the second switch and the third switch; hence the positive terminal pin is connected to the positive input of amplifier, and the negative terminal pin is connected to the negative input of amplifier at the same time; and a second timing, conducting the second switch and the third switch, and turning off the first switch and the fourth switch; hence the positive terminal pin is connected to the negative input of amplifier, and the negative terminal pin is connected to the positive input of amplifier at the same time; during the first timing and the second timing, the reference voltage is fixedly connected to the positive input of amplifier or the negative input of amplifier; wherein output voltages generated during the first timing and the second timing are subtracted to compensate offsets of a front end circuit and the amplifier at the same time.

16. The accurate measurement circuit according to claim 15, wherein the amplifier further comprises a negative output of amplifier; a voltage difference between the output of amplifier and the negative output of amplifier equals to a voltage difference between the positive input of amplifier and the negative input of amplifier multiplied by a gain.

17. The accurate measurement circuit according to claim 15, wherein the higher input impedance of the measurement terminal is, the better the compensation effect for the offset of the front end circuit is.

18. The accurate measurement circuit according to claim 15, wherein the closer the current values of the leakage current of positive terminal pin and the leakage current of negative terminal pin are, the better the compensation effect is.

19. An accurate measurement circuit which compensates offset of a front end circuit while performing current measurement, comprising: a measurement terminal, having a positive terminal pin and a negative terminal pin, wherein an impedance is connected between the positive terminal pin and the negative terminal pin and a current flowing through the impedance is measured; an amplifier, generating an output signal according to a voltage of a positive input of amplifier; a first switch, connected between the positive terminal pin and the positive input of amplifier; a second switch, connected between the positive terminal pin and a reference voltage; a third switch, connected between the negative terminal pin and the positive input of amplifier; and a fourth switch, connected between the negative terminal pin and the reference voltage; wherein the positive terminal pin and the negative terminal pin are used to connect to the measurement terminal.

20. The accurate measurement circuit according to claim 19, wherein a control method for the switches comprising: a first timing, conducting the first switch and the fourth switch, and turning off the second switch and the third switch; hence the positive terminal pin is connected to the positive input of amplifier, and the negative terminal pin is connected to the reference voltage at the same time; and a second timing, conducting the second switch and the third switch, and turning off the first switch and the fourth switch; hence the positive terminal pin is connected to the reference voltage, and the negative terminal pin is connected to the positive input of amplifier at the same time; wherein output voltages generated during the first timing and the second timing are subtracted to compensate offsets of a front end circuit and the amplifier at the same time.

21. The accurate measurement circuit according to claim 20, wherein the higher input impedance of the measurement terminal is, the better the compensation effect for the offset of the front end circuit is.

22. The accurate measurement circuit according to claim 20, wherein the closer the current values of the leakage current of positive terminal pin and the leakage current of negative terminal pin are, the better the compensation effect is.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 illustrates a conventional architecture using a chopper to eliminate the amplifier offset.

(2) FIG. 2 illustrates a conventional measurement circuit architecture having front end offset and amplifier offset.

(3) FIG. 3 illustrates a switching circuit architecture compensating the offset of a front end according to a first embodiment of the present invention.

(4) FIG. 4A and FIG. 4B illustrate an operation method for the switching circuit compensating the offset in the front end in FIG. 3.

(5) FIG. 5 illustrates a switching circuit architecture compensating the offset in the front end and eliminating the offset of the amplifier according to a second embodiment of the present invention.

(6) FIG. 6A and FIG. 6B illustrate an operation method for the switching circuit compensating the offset in the front end and eliminating the offset of the amplifier in FIG. 5.

(7) FIG. 7A and FIG. 7B illustrate another switching circuit architecture compensating the offset in the front end and eliminating the offset of the amplifier according to a third embodiment of the present invention.

(8) FIG. 8A and FIG. 8B illustrate an operation method for the switching circuit compensating the offset in the front end and eliminating the offset of the amplifier in FIG. 7B.

(9) FIG. 9 illustrates another aspect of the amplifier according to the present invention.

(10) FIG. 10 illustrates another switching circuit architecture compensating the offset of the front end and eliminating the offset of amplifier according to a fourth embodiment of the present invention.

(11) FIG. 11A and FIG. 11B illustrate an operation method for the switching circuit compensating the offset in the front end and in the amplifier in FIG. 10.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(12) The present invention will now be described more specifically with reference to the following embodiments. Please note that the following description of embodiments of the invention is intended to be merely illustrative. This is not meant to be an exhaustive description of the invention or limited to the form of the disclosure.

(13) A first embodiment of the present invention is disclosed in FIG. 3. It shows an accurate measurement circuit utilizing a switching circuit for compensating the offset in the front end. The accurate measurement circuit comprises an amplifier 50 and two switches. One terminal of a first switch 401 is connected to a positive input of amplifier 501, and the other terminal is connected to a reference voltage 30. One terminal of a second switch 402 is connected to a negative input of amplifier 502, and the other terminal is connected to the reference voltage 30. The positive input of amplifier 501 and the negative input of amplifier 502 are connected to a measurement terminal 10 via a positive terminal pin 201 and a negative terminal pin 202, respectively.

(14) An operation method of above accurate measurement circuit comprises two timings: a first timing and a second timing. In the first timing, conduct the first switch 401, and turn off the second switch 402. Hence, the positive input of amplifier 501 is connected to the reference voltage 30. An equivalent circuit diagram is shown in FIG. 4A. At this moment, the voltage of the positive input of amplifier 501 equals to the reference voltage 30 (V.sub.REF). The voltage of the negative input of amplifier 502 equals to the reference voltage 30 (V.sub.REF) subtracted by current to be measured 101 (I.sub.S) subtracted by a leakage current of negative terminal pin 204 (I.sub.L2), and multiplied by an input impedance 102 (R.sub.S). Mathematical expression is V.sub.REF((I.sub.SI.sub.L2)*R.sub.S). A voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 is (I.sub.SI.sub.L2)*R.sub.S. In the second timing, conduct the second switch 402, and turn off the first switch 401. Hence, the negative input of amplifier 502 is connected to the reference voltage 30. An equivalent circuit diagram is shown in FIG. 4B. At this moment, the voltage of the negative input of amplifier 502 equals to the reference voltage 30 (V.sub.REF). The voltage of the positive input of amplifier 501 equals to the reference voltage 30 (V.sub.REF) added by current to be measured 101 (I.sub.S) added by a leakage current of positive terminal pin 203 (I.sub.L1), and multiplied by input impedance 102 (R.sub.S). Mathematical expression is V.sub.REF+((I.sub.S+I.sub.L1)*R.sub.S). A voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 is (I.sub.S+I.sub.L1)*R.sub.S. Assuming the gain of the amplifier 50 is K, an output voltage V.sub.OUT1 output by the output of amplifier 503 in FIG. 4A is

(15) $\begin{array}{c}{V}_{\mathrm{OUT}1}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(V_{\mathrm{REF}}-\left(V_{\mathrm{REF}}-\left(I_S-I_{L2}\right)*R_S\right)\right)\\ =K*\left(I_S-I_{L2}\right)*R_S\end{array}$
An output voltage V.sub.OUT2 output by the output of amplifier 503 in FIG. 4B is:

(16) $\begin{array}{c}{V}_{\mathrm{OUT}2}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(\left(V_{\mathrm{REF}}+\left(I_S+I_{L1}\right)*R_S\right)-V_{\mathrm{REF}}\right)\\ =K*\left(I_S+I_{L1}\right)*R_S\end{array}$
Output voltages V.sub.OUT1 and V.sub.OUT2 generated in the two timings are added and then divided by 2 to get K*(I.sub.S+((I.sub.L1I.sub.L2)/2))*R.sub.S. Thus, non-ideal effect of the leakage current of positive terminal pin (I.sub.L1) and the leakage current of negative terminal pin (I.sub.L2) can be compensated.

(17) In the above operation method, the higher the input impedance 102 (R.sub.S) is, the better the compensation effect of the leakage current (I.sub.L1 and I.sub.L2) is. The reason is during the first timing when conducting the first switch 401, ideal situation is the leakage current of positive terminal pin 203 (I.sub.L1) flowing to the reference voltage 30 but not to the input impedance 102 (R.sub.S). Increasing the resistance of the input impedance 102 (R.sub.S) will let the leakage current of positive terminal pin 203 (I.sub.L1) less easy to flow to the input impedance 102 (R.sub.S). It comes closer to the ideal situation. During the second timing when conducting the second switch 402, ideal situation is the leakage current of negative terminal pin 204 (I.sub.L2) flowing to the reference voltage 30 but not to the input impedance 102 (R.sub.S). Similarly, higher input resistance of the impedance 102 (R.sub.S) is closer to the ideal situation. Hence, the higher the input impedance 102 (R.sub.S) is, the better the compensation effect is for the leakage current (I.sub.L1 and I.sub.L2).

(18) In the above accurate measurement circuit and the operation method, there is a compensation effect for the leakage current of positive terminal pin 203 (I.sub.L1) and the leakage current of negative terminal pin 204 (I.sub.L2) but the offset of the amplifier 50 is not eliminated. It is just to adjust the connection of the switches to compensate the leakage current of front end pin and eliminate the offset of the back end amplifier at the same time.

(19) A second embodiment of the present invention is disclosed in FIG. 5. It shows a switching circuit architecture compensating the offset in the front end and eliminating the offset of the amplifier. The accurate measurement circuit comprises an amplifier 50 and six switches. A first switch 401 is connected between a reference voltage 30 and a positive terminal pin 201. A second switch 402 is connected between the reference voltage 30 and a negative terminal pin 202. A third switch 403 is connected between the positive terminal pin 201 and a positive input of amplifier 501. A fourth switch 404 is connected between the positive terminal pin 201 and a negative input of amplifier 502. A fifth switch 405 is connected between the negative terminal pin 202 and the positive input of amplifier 501. A sixth switch 406 is connected between the negative terminal pin 202 and the negative input of amplifier 502.

(20) An operation method of above accurate measurement circuit comprises two timings: a first timing and a second timing. In the first timing, conduct the first switch 401, the third switch 403 and the sixth switch 406, and turn off the second switch 402, the fourth switch 404 and the fifth switch 405. Hence, the positive terminal pin 201 and the positive input of amplifier 501 are connected to the reference voltage 30, and the negative terminal pin 202 is connected to the negative input of amplifier 502 at the same time. An equivalent circuit diagram is shown in FIG. 6A. At this moment, the voltage of the positive input of amplifier 501 equals to the reference voltage 30 (V.sub.REF) added by an amplifier offset voltage 504 (V.sub.OS). Mathematical expression is V.sub.REF+V.sub.OS. The voltage of the negative input of amplifier 502 equals to the reference voltage 30 (V.sub.REF) subtracted by current to be measured 101 (I.sub.S) subtracted by a leakage current of negative terminal pin 204 (I.sub.L2), and multiplied by an input impedance 102 (R.sub.S). Mathematical expression is V.sub.REF((I.sub.SI.sub.L2)*R.sub.S). Thus, a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 is V.sub.OS+(I.sub.SI.sub.L2)*R.sub.S. In the second timing, conduct the second switch 402, the fourth switch 404 and the fifth switch 405, and turn off the first switch 401, the third switch 403 and the sixth switch 406. Hence, the negative terminal pin 202 and the positive input of amplifier 501 are connected to the reference voltage 30, and the positive terminal pin 201 is connected to the negative input of amplifier 502 at the same time. An equivalent circuit diagram is shown in FIG. 6B. At this moment, the voltage of the positive input of amplifier 501 equals to the reference voltage 30 (V.sub.REF) added by the offset voltage 504 (V.sub.OS) of the amplifier. Mathematical expression is V.sub.REF+V.sub.OS. The voltage of the negative input of amplifier 502 equals to the reference voltage 30 (V.sub.REF) added by current to be measured 101 (I.sub.S) added by a leakage current of positive terminal pin 203 (I.sub.L1), and multiplied by the input impedance 102 (R.sub.S). Mathematical expression is V.sub.REF+((I.sub.S+I.sub.L1)*R.sub.S). Thus, a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 has a mathematical expression of V.sub.OS(I.sub.SI.sub.L1)*R.sub.S. Assuming the gain of the amplifier 50 is K, an output voltage V.sub.OUT1 output by the output of amplifier 503 in FIG. 6A is:

(21) $\begin{array}{c}{V}_{\mathrm{OUT}1}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(\left(V_{\mathrm{REF}}+V_{\mathrm{OS}}\right)-\left(V_{\mathrm{REF}}-\left(I_S-I_{L2}\right)*R_S\right)\right)\end{array}$
An output voltage V.sub.OUT2 output by the output of amplifier 503 in FIG. 6B is:

(22) $\begin{array}{c}{V}_{\mathrm{OUT}2}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(\left(V_{\mathrm{REF}}+V_{\mathrm{OS}}\right)-\left(V_{\mathrm{REF}}+\left(I_S+I_{L1}\right)*R_S\right)\right)\end{array}$
Output voltages V.sub.OUT1 and V.sub.OUT2 generated in the two timings are subtracted and then divided by 2 to get K*(I.sub.S+((I.sub.L1I.sub.L2)/2))*R.sub.S. Thus, non-ideal effect of the leakage current of positive terminal pin (I.sub.L1) and the leakage current of negative terminal pin (I.sub.L2) can be compensated. Meanwhile, errors of the offset voltage 504 (V.sub.OS) of the amplifier can be completely cancelled off.

(23) A third embodiment of the present invention is disclosed in FIG. 7. It shows another switching circuit architecture compensating the offset in the front end and eliminating the offset of the amplifier. The accurate measurement circuit comprises an amplifier 50 and 4 switches. A first switch 401 is connected between a positive terminal pin 201 and a positive input of amplifier 501. A second switch 402 is connected between the positive terminal pin 201 and a negative input of amplifier 502. A third switch 403 is connected between a negative terminal pin 202 and the positive input of amplifier 501. A fourth switch 404 is connected between the negative terminal pin 202 and the negative input of amplifier 502. A reference voltage 30 is directly connected to the positive input of amplifier 501 (as shown in FIG. 7A) or the negative input of amplifier 502 (as shown in FIG. 7B). The positive terminal pin 201 and the negative terminal pin 202 are used to connect to a measurement terminal 10.

(24) An operation method of above accurate measurement circuit comprises two timings. Please refer to FIG. 8. In FIG. 8, the reference voltage 30 is fixedly connected to the negative input of amplifier 502 in both the two timings. In a first timing, conduct the first switch 401 and the fourth switch 404, and turn off the second switch 402 and the third switch 403. Hence, the positive terminal pin 201 is connected to the positive input of amplifier 501, and the negative terminal pin 202 is connected to the negative input of amplifier 502 at the same time. An equivalent circuit diagram is shown in FIG. 8A. Thus, a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 is the offset voltage (V.sub.OS) of the amplifier added by current to be measured 101 (I.sub.S) added by the leakage current of positive terminal pin 203 (I.sub.L1), and multiplied by an input impedance 102 (R.sub.S). Mathematical expression is V.sub.OS(I.sub.S+I.sub.L1)*R.sub.S. In a second timing, conduct the second switch and the third switch, and turn off the first switch and the fourth switch. Hence, the positive terminal pin 201 is connected to the negative input of amplifier 502, and the negative terminal pin 202 is connected to the positive input of amplifier 501 at the same time. An equivalent circuit diagram is shown in FIG. 8B. Thus, a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502 is the amplifier offset voltage 504 (V.sub.OS) subtracted by current to be measured 101 (I.sub.S) subtracted by a leakage current of negative terminal pin 204 (I.sub.L2), and multiplied by an input impedance 102 (R.sub.S). Mathematical expression is V.sub.OS(I.sub.SI.sub.L2)*R.sub.S. Assuming the gain of the amplifier is K, an output voltage V.sub.OUT1 output by the output of amplifier 503 in FIG. 8A is:

(25) $\begin{array}{c}{V}_{\mathrm{OUT}1}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(V_{\mathrm{OS}}+\left(I_S+I_{L1}\right)*R_S\right)\end{array}$
An output voltage V.sub.OUT2 output by the output of amplifier 503 in FIG. 8B is:

(26) $\begin{array}{c}{V}_{\mathrm{OUT}2}=K*\left(V\text{+}-V\text{-}\right)\\ =K*\left(V_{\mathrm{OS}}-\left(I_S-I_{L2}\right)*R_S\right)\end{array}$
Output voltages V.sub.OUT1 and V.sub.OUT2 generated in the two timings are subtracted and then divided by 2 to get K*(I.sub.S+((I.sub.L1I.sub.L2)/2))*R.sub.S. Thus, non-ideal effect of the leakage current of positive terminal pin (I.sub.L1) and the leakage current of negative terminal pin (I.sub.L2) can be compensated. Meanwhile, errors of the offset voltage 504 (V.sub.OS) of the amplifier can be cancelled off.

(27) A fourth embodiment of the present invention is disclosed in FIG. 10. It shows another switching circuit architecture compensating the offset in the front end and eliminating the offset of the amplifier. The accurate measurement circuit comprises an amplifier 50 and four switches. The amplifier 50 generates an output signal according to the voltage of a positive input of amplifier 501. A first switch 401 is connected between a positive terminal pin 201 and the positive input of amplifier 501. A second switch 402 is connected between the positive terminal pin 201 and a reference voltage 30. A third switch 403 is connected between a negative terminal pin 202 and the positive input of amplifier 501. A fourth switch 404 is connected between the negative terminal pin 202 and the reference voltage 30. The positive terminal pin 201 and the negative terminal pin 202 are used to connect to the measurement terminal.

(28) An operation method of above accurate measurement circuit comprises into two timings. In a first timing, conduct the first switch 401 and the fourth switch 404, and turn off the second switch 402 and the third switch 403. Hence, the positive terminal pin 201 is connected to the positive input of amplifier 501, and the negative terminal pin 202 is connected to the reference voltage 30 at the same time. An equivalent circuit diagram is shown in FIG. 11A. Thus, the voltage of the positive input of amplifier 501 is V.sub.REF+V.sub.OS(I.sub.S+I.sub.L1)*R.sub.S. In a second timing, conduct the second switch 402 and the third switch 403, and turn off the first switch 401 and the fourth switch 404. Hence, the positive terminal pin 201 is connected to the reference voltage 30, and the negative terminal pin 202 is connected to the positive input of amplifier 501 at the same time. An equivalent circuit diagram is shown in FIG. 11B. Thus, the voltage of the positive input of amplifier 501 is V.sub.REF+V.sub.OS(I.sub.SI.sub.L2)*R.sub.S. Assuming the gain of the amplifier is K, an output voltage V.sub.OUT1 output by the output of amplifier 503 in FIG. 11A is:

(29) $\begin{array}{c}{V}_{\mathrm{OUT}1}=K*\left(V_{\mathrm{IN}}\right)\\ =K*\left(V_{\mathrm{REF}}+\left(I_S+I_{L1}\right)*R_S\right))\end{array}$
An output voltage V.sub.OUT2 output by the output of amplifier 503 in FIG. 11B is:

(30) $\begin{array}{c}{V}_{\mathrm{OUT}2}=K*\left(V_{\mathrm{IN}}\right)\\ =K*\left(V_{\mathrm{REF}}-\left(I_S-I_{L2}\right)*R_S\right))\end{array}$
Output voltages V.sub.OUT1 and V.sub.OUT2 generated in the two timings are subtracted and then divided by 2 to get K*(I.sub.S+((I.sub.L1I.sub.L2)/2))*R.sub.S. Thus, non-ideal effect of the leakage current of positive terminal pin (I.sub.L1) and the leakage current of negative terminal pin (I.sub.L2) can be compensated. Meanwhile, errors of the offset voltage 504 (V.sub.OS) of the amplifier can be eliminated.

(31) According to the present invention, the voltage of output of amplifier 503 equals to a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502, and multiplied by a gain (K). Mathematical expression is V.sub.OUT+=K*(V.sub.IN+V.sub.IN). In addition, please refer to FIG. 9. The amplifier 50 can further comprises a negative output of amplifier 505. A voltage difference between the output of amplifier 503 and the negative output of amplifier 505 equals to a voltage difference between the positive input of amplifier 501 and the negative input of amplifier 502, multiplied by a gain (K). Mathematical expression is V.sub.OUT+V.sub.OUT=K*(V.sub.IN+V.sub.IN).

(32) While the invention has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.