PROCESSING DEVICE, NETWORK NODE, CLIENT DEVICE, AND METHODS THEREOF
20200343936 ยท 2020-10-29
Inventors
Cpc classification
H04B2001/70935
ELECTRICITY
H04J11/0076
ELECTRICITY
International classification
Abstract
This disclosure relates to techniques for synchronization signals. The synchronization signal comprise a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence. The SSS sequence may be generated based on a first sequence corresponding to a first cyclic shift and a second sequence corresponding to a second cyclic shift. The first cyclic shift and the second cyclic shift are associated with a Cell ID. The PSS sequence may be generated based on one of the first and the second sequences.
Claims
1. A device comprising: a processor configured to: obtain a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and determine a cell identity (ID) N.sub.ID based on the PSS and the SSS, wherein the cell identity N.sub.ID satisfies: N.sub.ID=N.sub.ID,max.sup.(2)N.sub.ID.sup.(1)+N.sub.ID.sup.(2), and wherein N.sub.ID.sup.(2) is associated with the PSS sequence, and N.sub.ID.sup.(1) is associated with a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 of the SSS sequence; and wherein the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 satisfy:
2. The device according to claim 1, wherein the SSS sequence for the SSS is formed with a first binary sequence corresponding to the first cyclic shift m.sub.0 and a second binary sequence corresponding to the second cyclic shift m.sub.1, the first binary sequence and the second binary sequence having the same length.
3. The device according to claim 2, wherein a generator polynomial of the first binary sequence is g.sub.0(x)=x.sup.7+x.sup.4+1, and a generator polynomial of the second binary sequence is g.sub.1(x)=x.sup.7+x+1.
4. The device according to claim 2, wherein the processor is configured to detect the first binary sequence by using at least one hypotheses of the first cyclic shift m.sub.0, and to detect the second binary sequence by using a fast Walsh-Hadamard transform (FWHT) operation.
5. The device according to claim 1, wherein the processor is configure to determine the N.sub.ID.sup.(2) based on the PSS and to determine the N.sub.ID.sup.(1) based on the SSS after a successful detection of the PSS, and wherein the cell ID N.sub.ID satisfies: N.sub.ID=3N.sub.ID.sup.(1)+N.sub.ID.sup.(2).
6. The device according to claim 1, wherein the processor is configured to determine the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 based on the PSS and the SSS, and to determine the cell ID N.sub.ID according to the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1.
7. The device according to claim 1, wherein the processor is configured to determine the first cyclic shift m.sub.0 by using at least one hypotheses of the first cyclic shift m.sub.0, and to determine the second cyclic shift m.sub.1 by using a fast Walsh-Hadamard transform (FWHT) operation.
8. The device according to claim 1, wherein the processor is configured to generate a second SSS sequence based on a candidate value of the first cyclic shift m.sub.0 and a candidate value of the second cyclic shift m.sub.1.
9. The device according to claim 8, wherein the processor is configured to detect the SSS by correlating the SSS with the generated second SSS sequence.
10. The device according to claim 1, wherein N.sub.ID,max.sup.(2) is 3, N.sub.ID.sup.(2){0, 1, 2}, N.sub.ID,max.sup.(1) is 336, and N.sub.ID.sup.(1){0, 1, 2, . . . , 335}.
11. The device according to claim 1, wherein the SSS sequence for the SSS has a length L of 127.
12. The device according to claim 1, wherein the SSS sequence is represented as d(k), and d(k) satisfies:
d(k)=12((s.sub.0((k+m.sub.0)mod L)+s.sub.1((k+m.sub.1)mod L))mod 2),k=0, 1, 2, . . . , L1(Eq. 1) wherein L is a length of the SSS sequence.
13. A device for wireless communication, comprising: a transceiver configured to receive a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and a processing device configured to determine a cell identity (ID) N.sub.ID based on the PSS and the SSS, wherein the cell identity N.sub.ID satisfies: N.sub.ID=N.sub.ID,max.sup.(2)N.sub.ID.sup.(1)+N.sub.ID.sup.(2), and wherein N.sub.ID.sup.(2) is associated with the PSS sequence, and N.sub.ID.sup.(1) is associated with a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 of the SSS sequence; and wherein the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 satisfy:
14. The device according to claim 13, wherein the SSS sequence for the SSS is formed with a first binary sequence corresponding to the first cyclic shift m.sub.0 and a second binary sequence corresponding to the second cyclic shift m.sub.1, the first binary sequence and the second binary sequence having the same length.
15. The device according to claim 14, wherein a generator polynomial of the first binary sequence is g.sub.0(x)=x.sup.7+x.sup.4+1, and a generator polynomial of the second binary sequence is g.sub.1(x)=x.sup.7+x+1.
16. The device according to claim 14, wherein the processing device is configured to detect the first binary sequence by using at least one hypotheses of the first cyclic shift m.sub.0, and to detect the second binary sequence by using a fast Walsh-Hadamard transform (FWHT) operation.
17. The device according to claim 13, wherein the processing device is configure to determine the N.sub.ID.sup.(2) based on the PSS and to determine the N.sub.ID.sup.(1) based on the SSS after a successful detection of the PSS, and wherein the cell ID N.sub.ID satisfies: N.sub.ID=3N.sub.ID.sup.(1)+N.sub.ID.sup.(2).
18. The device according to claim 13, wherein the processing device is configured to determine the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 based on the PSS and the SSS, and to determine the cell ID N.sub.ID according to the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1.
19. The device according to claim 13, wherein the processing device is configured to determine the first cyclic shift m.sub.0 by using at least one hypotheses of the first cyclic shift m.sub.0, and to determine the second cyclic shift m.sub.1 by using a fast Walsh-Hadamard transform (FWHT) operation.
20. The device according to claim 13, wherein the processing device is configured to generate a second SSS sequence based on a candidate value of the first cyclic shift m.sub.0 and a candidate value of the second cyclic shift m.sub.1.
21. The device according to claim 20, wherein the processing device is configured to detect the SSS by correlating the SSS with the generated second SSS sequence.
22. The device according to claim 13, wherein N.sub.ID,max.sup.(2) is 3, N.sub.ID.sup.(2){0, 1, 2}, N.sub.ID,max.sup.(1) is 336, and N.sub.ID.sup.(1){0, 1, 2, . . . , 335}.
23. The device according to claim 13, wherein the SSS sequence for the SSS has a length L of 127.
24. The device according to claim 13, wherein the SSS sequence is represented as d(k), and d(k) satisfies:
d(k)=12((s.sub.0((k+m.sub.0)mod L)+s.sub.1((k+m.sub.1)mod L))mod 2),k=0, 1, 2, . . . , L1, wherein L is a length of the SSS sequence.
25. A non-transitory computer readable medium, comprising computer instructions that, when executed by a processor, cause the processor to: receive a primary synchronization signal (PSS) generated based on a PSS sequence and a secondary synchronization signal (SSS) generated based on an SSS sequence; and determine a cell identity (ID) N.sub.ID based on the PSS and the SSS, wherein the cell identity N.sub.ID satisfies: N.sub.ID=N.sub.ID,max.sup.(2)N.sub.ID.sup.(1)+N.sub.ID.sup.(2), and wherein N.sub.ID.sup.(2) is associated with the PSS sequence, and N.sub.ID.sup.(1) is associated with a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 of the SSS sequence; and wherein the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 satisfy:
26. The non-transitory computer readable medium according to claim 25, further comprising computer instructions for causing the processor to determine the N.sub.ID.sup.(2) based on the PSS and to determine the N.sub.ID.sup.(1) based on the SSS after a successful detection of the PSS, wherein the cell ID N.sub.ID satisfies: N.sub.ID=3N.sub.ID.sup.(1)+N.sub.ID.sup.(2).
27. The non-transitory computer readable medium according to claim 25, further comprising computer instructions for causing the processor to determine the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 based on the PSS and the SSS, and to determine the cell ID N.sub.ID according to the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1.
28. The non-transitory computer readable medium according to claim 25, further comprising computer instructions for causing the processor to determine the first cyclic shift m.sub.0 by using at least one hypotheses of the first cyclic shift m.sub.0, and to determine the second cyclic shift m.sub.1 by using a fast Walsh-Hadamard transform (FWHT) operation.
29. The non-transitory computer readable medium according to claim 25, further comprising computer instructions for causing the processor to detect a first binary sequence of the SSS sequence by using at least one hypotheses of the first cyclic shift m.sub.0, and to detect the second binary sequence of the SSS sequence by using a fast Walsh-Hadamard transform (FWHT) operation.
30. The non-transitory computer readable medium according to claim 25, further comprising computer instructions for causing the processor to generate a second SSS sequence based on a candidate value of the first cyclic shift m.sub.0 and a candidate value of the second cyclic shift m.sub.1.
31. The non-transitory computer readable medium according to claim 30, further comprising computer instructions for causing the processor to detect the SSS by correlating the SSS with the generated second SSS sequence.
32. The non-transitory computer readable medium according to claim 25, wherein N.sub.ID,max.sup.(2) is 3, N.sub.ID.sup.(2){0, 1, 2}, N.sub.ID,max.sup.(1) is 336, and N.sub.ID.sup.(1){0, 1, 2, . . . , 335}.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0072] The appended drawings are intended to clarify and explain different embodiments of the present invention, in which:
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DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
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[0087] The processing device 100 for generating a secondary synchronization signal SSS sequence to be utilized together with a primary synchronization signal PSS sequence for synchronization is configured to, e.g. by means of the processor 102, determine a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 based at least on a cell ID N.sub.ID, wherein at least one of the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 is associated with the primary synchronization signal PSS sequence by being determined based also on an index N.sub.ID.sup.(2) of the primary synchronization signal PSS sequence.
[0088] The processing device 100 is further configured to, e.g. by means of the processor 102, generate the secondary synchronization signal SSS sequence based on a modulo-2 summation of a first binary sequence cyclically shifted by a first cyclic shift m.sub.0 and a second binary sequence cyclically shifted by a second cyclic shift m.sub.1, such that if two generated secondary synchronization signal SSS sequences associated with a primary synchronization signal PSS sequence are cyclically shifted versions of each other, the two generated secondary synchronization signal SSS sequences are non-consecutively shifted versions of each other.
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[0090] The method 200 comprises a first step 202 of determining a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 based at least on a cell ID N.sub.ID, wherein at least one of the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 is associated with the primary synchronization signal PSS sequence by being determined based also on an index N.sub.ID.sup.(2) of the primary synchronization signal PSS sequence.
[0091] The method also comprises a second step 204 of generating the secondary synchronization signal SSS sequence based on a modulo-2 summation of a first binary sequence cyclically shifted by a first cyclic shift m.sub.0 and a second binary sequence cyclically shifted by a second cyclic shift m.sub.1, such that if two generated secondary synchronization signal SSS sequences associated with a primary synchronization signal PSS sequence are cyclically shifted versions of each other, the two generated secondary synchronization signal SSS sequences are non-consecutively shifted versions of each other.
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[0093] The processing device 100 of the network node 300 is configured to generate a secondary synchronization signal SSS sequence according to any one of the herein described embodiments of the method 200. The transceiver 302 of the network node 300 is configured to transmit synchronization signals based on a primary synchronization signal PSS sequence and on the secondary synchronization signal SSS sequence.
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[0096] The processing device 100 of the client device 500 is configured to generate a secondary synchronization signal SSS sequence according to any one of the herein described embodiments. The transceiver 502 of the client device 500 is configured to receive a secondary synchronization signal SSS by utilization of the generated secondary synchronization signal SSS sequence. The processing device 100 is further configured to determine a cell ID N.sub.ID based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1 being determined based on a received primary synchronization signal PSS and on the received secondary synchronization signal SSS.
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[0099] For simplicity, the wireless communication system 700 shown in
[0100] The network node 300 herein may also be denoted as a radio network node, an access network node, an access point, or a base station, e.g. a Radio Base Station (RBS), which in some networks may be referred to as transmitter, gNB, eNB, eNodeB, NodeB or B node, depending on the technology and terminology used. The radio network nodes may be of different classes such as e.g. macro eNodeB, home eNodeB or pico base station, based on transmission power and thereby also cell size. The radio network node can be a Station (STA), which is any device that contains an IEEE 802.11-conformant Media Access Control (MAC) and Physical Layer (PHY) interface to the Wireless Medium (WM). The network node 300 may also be a base station corresponding to the fifth generation wireless systems.
[0101] The client device 500 herein may be denoted as a user device, a User Equipment (UE), a mobile station, an internet of things (IoT) device, a sensor device, a wireless terminal and/or a mobile terminal, and is enabled to communicate wirelessly in a wireless communication system, sometimes also referred to as a cellular radio system. The UEs may further be referred to as mobile telephones, cellular telephones, computer tablets or laptops with wireless capability. The UEs in the present context may be, for example, portable, pocket-storable, hand-held, computer-comprised, or vehicle-mounted mobile devices, enabled to communicate voice and/or data, via the radio access network, with another entity, such as another receiver or a server. The UE can be a Station (STA), which is any device that contains an IEEE 802.11-conformant Media Access Control (MAC) and Physical Layer (PHY) interface to the Wireless Medium (WM). The client device 500 may also be configured for communication in 3GPP related LTE and LTE-Advanced, in WiMAX and its evolution, and in fifth generation wireless technologies, such as New Radio.
[0102] Furthermore, any method according to embodiments of the invention may be implemented in a computer program, having code means, which when run by processing means causes the processing means to execute the steps of the method. The computer program is included in a computer readable medium of a computer program product. The computer readable medium may comprises essentially any memory, such as a ROM (Read-Only Memory), a PROM (Programmable Read-Only Memory), an EPROM (Erasable PROM), a Flash memory, an EEPROM (Electrically Erasable PROM), or a hard disk drive.
[0103] Moreover, it is realized by the skilled person that embodiments of the present processing device 100, network node 300, and client device 500 comprises the necessary communication capabilities in the form of e.g., functions, means, units, elements, etc., for performing the present solution. Examples of other such means, units, elements and functions are: processors, memory, buffers, control logic, encoders, decoders, rate matchers, de-rate matchers, mapping units, multipliers, decision units, selecting units, switches, interleavers, de-interleavers, modulators, demodulators, inputs, outputs, antennas, amplifiers, receiver units, transmitter units, DSPs, MSDs, TCM encoder, TCM decoder, power supply units, power feeders, communication interfaces, communication protocols, etc. which are suitably arranged together for performing the present solution.
[0104] Especially, the processor(s) of the present devices and nodes may comprise, e.g., one or more instances of a Central Processing Unit (CPU), a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC), a microprocessor, or other processing logic that may interpret and execute instructions. The expression processor may thus represent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones mentioned above. The processing circuitry may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions, such as call processing control, user interface control, or the like.
[0105] According to an embodiment, the first and second binary sequences utilized for generating the secondary synchronization signal SSS sequences are pseudorandom maximum length sequences, i.e. m-sequences.
[0106] According to an embodiment, the first and second binary sequences utilized for generating the secondary synchronization signal SSS sequences are pseudorandom maximum length sequences, i.e. m-sequences, based on which the generated secondary synchronization signal SSS sequences belong to one set of Gold sequences, so as to guarantee low cross-correlation between the generated SSS sequences. Gold sequences are described more in detail below.
[0107] According to an embodiment, one of the first and second binary sequences utilized for generating the secondary synchronization signal SSS sequences is the same binary sequence, e.g. the same pseudorandom maximum length sequence, which is used to generate the one or more primary synchronization signal PSS sequences.
[0108] As described below, according to various embodiments, different numbers of primary synchronization signal PSS sequences may be usable for the synchronization signals, such as one primary synchronization signal PSS sequence, two or more primary synchronization signal PSS sequences, and three primary synchronization signal PSS sequences. Thus, the herein described generation of the secondary synchronization signal SSS sequences, may be used together with differing numbers of primary synchronization signal PSS sequence, which provides for a flexible generation of synchronization signals, adaptable for a large number of cell IDs and/or wireless systems.
[0109] According to an embodiment, as exemplified below, the generated secondary synchronization signal SSS sequence has a length L of 127; L=127, which fits some of the available and upcoming wireless systems, such that the herein described embodiments may be implemented in these systems.
[0110] An embodiment of the invention discloses SSS sequences, d(k), k=0, 1, 2, . . . , L1, that may be constructed based on the modulo-2 sum of two length-L binary sequences with different cyclic shifts m.sub.0 and m.sub.1. According to an embodiment, BPSK modulation is used, i.e.:
d(k)=12((s.sub.0((k+m.sub.0)mod L)+s.sub.1((k+m.sub.1)mod L))mod 2),k=0, 1, 2, . . . , L1(Eq. 1)
[0111] The two binary sequences may e.g. be chosen to be two m-sequences of the same length L with carefully selected generator polynomials, such that all the generated SSS sequences belong to the same set of Gold sequences, which guarantees low cross-correlation between the generated SSS sequences.
[0112] For example, the generator polynomials may be selected as g.sub.0(x)=x.sup.7+x.sup.4+1 and g.sub.1(x)=x.sup.7+x+1, respectively. This generates a set of Gold sequences of length L=127, among which the absolute inner product of any two sequences is either 1, 2.sup.(n+1)/21=15 or 2.sup.(n+1)/2+1=17, with n=7 being the highest order of g.sub.0(x) and g.sub.1(x).
[0113] According to an embodiment, one of the first and second binary sequences utilized for generating the secondary synchronization signal SSS sequences can be selected as the same binary sequence, e.g. the same pseudorandom maximum length sequence, which is also used to generate primary synchronization signal PSS sequences. Thus, the same binary sequence, e.g. the same m-sequence, may here by used both for generating the primary synchronization signal PSS sequences and for generating one of the first and second binary sequences utilized for generating the secondary synchronization signal SSS sequences.
[0114] For example, both the generated primary synchronization signal PSS sequences and the generated secondary synchronization signal SSS sequences may hereby belong to the same set of Gold sequences, whereby a low cross-correlation between the generated secondary synchronization signal SSS sequences and the generated primary synchronization signal PSS sequences is also guaranteed.
[0115] The cell ID, N.sub.ID=N.sub.ID,max.sup.(2)N.sub.ID.sup.(1)+N.sub.ID.sup.(2), which is carried by the sequence indices of the SSS and PSS, i.e., N.sub.ID.sup.(1){0, 1, 2, . . . , N.sub.ID,max.sup.(1)1} and N.sub.ID.sup.(2){0, 1, . . . , N.sub.ID,max.sup.(2)1}, is encoded to the first m.sub.0 and second m.sub.1 cyclic shifts of the two binary sequences, e.g. the two m-sequences, such that if there are multiple PSSs, at least one of the first m.sub.0 and second m.sub.1 cyclic shifts depends on the PSS sequence index. Also, if the generated SSS sequences are associated with the same PSS sequence index, they are guaranteed to have low cross-correlation even under large residual frequency offsets, since one SSS sequence cannot be obtained through cyclically shifting another SSS sequence associated with the same PSS index by 1 step.
[0116] According to an embodiment, there are no two determined cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) which satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1. This may in other words be expressed as any two SSS cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) may only satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1. Hereby, the advantageous robustness against large frequency offsets is guaranteed. Cyclic shift pairs according to this embodiment may for example be achieved by encoding the sequence index carried in PSS, i.e., N.sub.ID.sup.(2){0, 1, . . . , N.sub.ID,max.sup.(2)1}, only as the cyclic shift of one of the two binary sequences, say for example to the first cyclic shift m.sub.0, and requiring that any two candidate values of the first cyclic shift m.sub.0 are distanced from each other by a more than one (1) cyclic shift step. Thus, consecutive cyclic shifts of the first binary sequence are not selected simultaneously, which also means that only non-consecutive cyclic shifts of the first binary sequence may be selected. The total number of candidate values of the first cyclic shift m.sub.0 may here be kept at a minimum, such that the low-complexity/cost scrambling-FWHT based SSS detection may be utilized in a client device 500.
[0117] The sequence index carried by the SSS, i.e., N.sub.ID.sup.(1){0, 1, 2, . . . , N.sub.ID,max.sup.(1)1} may be encoded as both the first m.sub.0 and second m.sub.1 cyclic shifts for the first and second binary sequences, where the second cyclic shift m.sub.1 is allowed to span all or most of its valid values {0, 1, 2, . . . , L1}. Such an SSS design avoids the event that one SSS sequence is obtainable via cyclically shifting another SSS sequence by 1 cyclic shift step, whereby the robustness against large frequency offsets is guaranteed.
[0118] It should be noted that, the encoding of the index N.sub.ID.sup.(2) of the PSS sequence as the first cyclic shift m.sub.0, and the encoding of index N.sub.ID.sup.(1) of the SSS sequence as the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 may be done in an arbitrary manner, e.g., m.sub.0 and m.sub.1 may be swapped in the equations below. Given the value of the first cyclic shift m.sub.0, the number of candidate values for the second cyclic shift m.sub.1 may be the same or different for different values of the first cyclic shift m.sub.0.
[0119] According to an implementation form of the embodiment, the encoding of the index N.sub.ID.sup.(1) of the SSS sequence and the index N.sub.ID.sup.(2) of the PSS sequence to the first m.sub.0 and second m.sub.1 cyclic shifts is given by, i.e. the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 are determined as:
[0120] Here, g is the minimum cyclic shift step size between the candidate values of the first cyclic shift m.sub.0, which is an integer larger than 1. L is a positive integer smaller or equal to a length L of the SSS sequence; LL; which is also the maximum number of candidate values of the second cyclic shift m.sub.1 for a given first cyclic shift m.sub.0. Here, and in this document . . . denotes a floor function, and mod denotes a modulo operation. Since g>1, the cyclic shifts of any two SSS sequences (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1.
[0121] As a non-limiting example, it may be mentioned that for a New Radio synchronization signal implementation, where L=127 and N.sub.ID,max.sup.(2)=3, this example of the embodiment may be implemented, e.g., by letting g=2, N.sub.ID,max.sup.(1)=336 and L=112, to carry 3363=1008 cell IDs in total.
[0122] A schematic and non-limiting illustration of this example of the embodiment is presented in
[0123] In addition, a cell ID N.sub.ID may according to an embodiment be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
[0124] This simplified determination of the PSS and SSS sequence indices, N.sub.ID.sup.(2) and N.sub.ID.sup.(1), based on the first m.sub.0 and second m.sub.1 cyclic shift alleviates the need to implement large tables in the client device for determining the cell IDs from the first m.sub.0 and second m.sub.1 cyclic shift.
[0125] According to an embodiment, there are no two determined cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) which satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1, i.e. two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) may only satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1, at the same time as the determined cyclic shift pairs always satisfy m.sub.0<m.sub.1 (or equivalently m.sub.0>m.sub.1). Hereby, the advantageous robustness against large frequency offsets is guaranteed.
[0126] According to an implementation form of the embodiment, the encoding of sequence index carried in the PSS N.sub.ID.sup.(2) and the sequence index carried in the SSS N.sub.ID.sup.(1) to the first m.sub.0 and second m.sub.1 cyclic shifts is given by, i.e. the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 are determined as:
where g>1 is the minimum step size between the candidate values of the first cyclic shift m.sub.0 and LL is the maximum number of candidate values of the second cyclic shift m.sub.1 for a given first cyclic shift m.sub.0. Since g>1, the cyclic shift pairs of any two SSS sequences, e.g., (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1), satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1. Also, the generated cyclic shift pairs always satisfy m.sub.0<m.sub.1 (or alternatively m.sub.0>m.sub.1). If the SSS is transmitted two times per 10 ms, i.e. once in each half of the frame, this is advantageous as it allows the indication of 5 ms timing using SSS sequences (as done e.g. in LTE) by simply swapping the values of m.sub.0 and m.sub.1 between the halves of a frame. Alternatively, the implementation form provides a future-proof solution e.g. for future New Radio releases if it is later on deemed useful to increase the number of hypotheses in the SSS.
[0127] As a non-limiting example, it may be mentioned that for a New Radio synchronization signal implementation, where L=127 and N.sub.ID,max.sup.(2)=3, the implementation form may be implemented, e.g., by letting g=2, N.sub.ID,max.sup.(1)=336 and L=115, to carry 3363=1008 cell IDs in total.
[0128] A non-limiting example illustration of this implementation form is presented in
[0129] In addition, a cell ID N.sub.ID may according to an embodiment be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
[0130] This simple determination of the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices based on the first m.sub.0 and second m.sub.1 cyclic shift alleviates the need to implement large tables in the client device for determining the cell IDs from the first m.sub.0 and second m.sub.1 cyclic shift.
[0131] According to an implementation form of the embodiment, the encoding of the index N.sub.ID.sup.(1) of the SSS sequence and the index N.sub.ID.sup.(2) of the PSS sequence to the first m.sub.0 and second m.sub.1 cyclic shifts is given by, i.e. the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 are determined as:
[0132] Here, g is the minimum cyclic shift step size between the candidate values of the first cyclic shift m.sub.0, which is an integer larger than 1; g>1. L is a positive integer smaller or equal to a length L of the SSS sequence; LL; which is also the maximum number of candidate values of the second cyclic shift m.sub.1 for a given first cyclic shift m.sub.0. Since g>1, the cyclic shift pairs of any two SSS sequences (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1.
[0133] As a non-limiting example, it may be mentioned that for a New Radio synchronization signal implementation, where L=127 and N.sub.ID.sup.(2)=3, this example of the embodiment may be implemented, e.g., by letting g=2, N.sub.ID,max.sup.(1)=336 and L=112, to carry 3363=1008 cell IDs in total.
[0134] A schematic and non-limiting illustration of this example of the embodiment is presented in
[0135] In addition, a cell ID N.sub.ID may according to an embodiment be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
[0136] This simplified determination of the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices based on the first m.sub.0 and second m.sub.1 cyclic shift alleviates the need to implement large tables in the client device for determining the cell IDs from the first m.sub.0 and second m.sub.1 cyclic shift.
[0137] According to an implementation form of the embodiment, the encoding of sequence index carried in the PSS N.sub.ID.sup.(2) and the sequence index carried in the SSS N.sub.ID.sup.(1) to the first m.sub.0 and second m.sub.1 cyclic shifts is given by, i.e. the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 are determined as:
where g>1 is the minimum step size between the candidate values of the second cyclic shift m.sub.1 and LL is the maximum number of candidate values of the second cyclic shift m.sub.1 for a given first cyclic shift m.sub.0. Since g>1, the cyclic shift pairs of any two SSS sequences, e.g., (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1), satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1. Meanwhile, the generated/selected cyclic shift pairs always satisfy m.sub.0<m.sub.1 (or alternatively m.sub.0>m.sub.1). If the SSS is transmitted two times per 10 ms, i.e. once in each half of the frame, this is advantageous as it allows the indication of 5 ms timing using SSS sequences (as done e.g. in LTE) by simply swapping the values of m.sub.0 and m.sub.1 between the halves of a frame. Alternatively, the implementation form provides a future-proof solution e.g. for future New Radio releases if it is later on deemed useful to increase the number of hypotheses in the SSS.
[0138] As a non-limiting example, it may be mentioned that for at New Radio synchronization signal implementation, where L=127 and N.sub.ID,max.sup.(2)=3, the implementation form may be implemented, e.g., by letting g=2, N.sub.ID,max.sup.(1)=336 and L=115, to carry 3363=1008 cell IDs in total.
[0139] A non-limiting example illustration of this implementation form is presented in
[0140] In addition, a cell ID N.sub.ID may according to an embodiment be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
[0141] This simple determination of the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices based on the first m.sub.0 and second m.sub.1 cyclic shift alleviates the need to implement large tables in the client device for determining the cell IDs from the first m.sub.0 and second m.sub.1 cyclic shift.
[0142] According to an embodiment, two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) are allowed to satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1 if the two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) are associated with different PSS sequence indices N.sub.ID.sup.(2). Hereby, robustness against large frequency offsets is guaranteed.
[0143] Cyclic shift pairs according to this embodiment may for example be achieved by encoding the sequence index carried in PSS, i.e., N.sub.ID.sup.(2){0, 1, . . . , N.sub.ID,max.sup.(2)1} to non-consecutive cyclic shifts of one of the two binary sequences, say for example to the first cyclic shift m.sub.0, i.e. requiring that any two candidate values of the first cyclic shift m.sub.0 associated with the same primary synchronization signal PSS sequence index are distanced from each other by a more than one (1) cyclic shift step, and meanwhile allowing different PSS sequence indices N.sub.ID.sup.(2) to be encoded to consecutive values of the first cyclic shift m.sub.0. The total number of the first cyclic shifts m.sub.0 is kept minimum such that the low-cost/complexity scrambling-FWHT based SSS detection can be utilized in the client device 500.
[0144] The sequence index carried by the SSS, i.e., N.sub.ID.sup.(1){0, 1, . . . , N.sub.ID,max.sup.(1)1} may be encoded as both the cyclic shifts of the two m-sequences m.sub.0 and m.sub.1, where m.sub.1 is allowed to span all or most of its valid values {0, 1, 2, . . . , L1}. Such an SSS design may lead to the event that one SSS sequence is obtainable via cyclically shifting another SSS sequence by 1 cyclic shift step. However, according to the embodiment, such a pair of SSS sequences is always associated with different PSS sequence indices N.sub.ID.sup.(2) and will not be detected at the same time after a successful PSS detection in the client device 500.
[0145] It should be noted that, the encoding of the index N.sub.ID.sup.(2) of the PSS sequence as the first cyclic shift m.sub.0, and the encoding of index N.sub.ID.sup.(1) of the SSS sequence as the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 may be done in an arbitrary manner, i.e. m.sub.0 and m.sub.1 may be swapped in the equations below. Given the value of the first cyclic shift m.sub.0, the number of candidate values for the second cyclic shift m.sub.1 may be the same or different for different values of the first cyclic shift m.sub.0.
[0146] According to an implementation form of the embodiment, the encoding of the sequence indices N.sub.ID.sup.(1) and N.sub.ID.sup.(2) as the first m.sub.0 and second m.sub.1 cyclic shifts may be given by, i.e. the first m.sub.0 and second m.sub.1 cyclic shifts may be determined as:
[0147] This is a limited/restricted version of the encoding method in equations (10) and (11) above, since g is here restricted to the value of one; g=1. According to the implementation form, a co-existence of two SSS sequences whose cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1 is allowed, if they are associated with different PSS indices according to equation (18) and (19). This is advantageous as more valid values of the cyclic shift pairs (m.sub.0, m.sub.1) may be selected, allowing potentially the encoding of a larger number of cell IDs and possibly other additional information to SSS sequences without increasing the SSS sequence length.
[0148] As a non-limiting example, it may be mentioned that for a New Radio synchronization signal implementation, where L=127 and N.sub.ID,max.sup.(2)=3, this implementation for may be used, e.g., by letting N.sub.ID,max.sup.(1)=336 and L=112, to carry 3363=1008 cell IDs in total.
[0149] An illustration of this example is given in
[0150] In addition, a cell ID N.sub.ID may, according to an embodiment, be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
which is a restricted/limited version of the inverse mapping in equations (12) and (13) above, for a value of one for g; g=1. This alleviates the need to implement large table in the client device 500 for determining the cell ID from the first m.sub.0 and second m.sub.1 cyclic shift values.
[0151] According to an embodiment, two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) are allowed to satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1 if the two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) are associated with different PSS sequence indices N.sub.ID.sup.(2), and the generated cyclic shift pairs always satisfy m.sub.0<m.sub.1 (or alternatively m.sub.0>m.sub.1).
[0152] According to an implementation form of the embodiment, the encoding of the sequence indices N.sub.ID.sup.(1) and N.sub.ID.sup.(2) as the first m.sub.0 and second m.sub.1 cyclic shifts may be given by, i.e. the first m.sub.0 and second m.sub.1 cyclic shifts may be determined as:
[0153] This is a limited/restricted version of the encoding method in equations (14) and (15) above, since g is here restricted to the value of one; g=1. According to the implementation form, a co-existence of two SSS sequences whose cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) satisfy both m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1 is allowed, if they are associated with different PSS indices according to equation (22) and (23), and if the generated cyclic shift pairs always satisfy m.sub.0<m.sub.1 (or equivalently m.sub.0>m.sub.1). This is advantageous, as stated above, since it allows the indication of 5 ms timing using SSS sequences, as used e.g. in LTE, by swapping m.sub.0 and m.sub.1 values. Alternatively, it constitutes a future-proof solution for future New Radio releases, if it will later on be deemed useful to increase the number of hypotheses in the SSS.
[0154] As a non-limiting example, it may be mentioned that for a New Radio synchronization signal implementation, where L=127 and N.sub.ID,max.sup.(2)=3, this implementation for may be used, e.g., by letting N.sub.ID,max.sup.(1)=336 and L=112, to carry 3363=1008 cell IDs in total. A non-limiting illustration of such an implementation form is presented in
[0155] In addition, a cell ID N.sub.ID may according to an embodiment be determined based on a first cyclic shift m.sub.0 and a second cyclic shift m.sub.1. This is possible as there exists a simple inverse mapping from the first m.sub.0 and second m.sub.1 cyclic shift values to the PSS N.sub.ID.sup.(2) and SSS N.sub.ID.sup.(1) sequence indices, which for example may be written as:
which is a limited/restricted version of the inverse mapping in equations (16) and (17) above, since g is here restricted to the value of one; g=1. This alleviates the need to implement large tables in the client device 500 for determining the cell ID from the first m.sub.0 and second m.sub.1 cyclic shift values.
[0156] As is described above, the first cyclic shift m.sub.0 and the second cyclic shift m.sub.1 associated with at least one cell ID N.sub.ID may be determined according a number of herein described embodiments, and will hereby have various relations to each other.
[0157] According to some herein described embodiments, e.g. illustrated in
[0158] According to some herein described embodiments, e.g. illustrated in
[0159] According to some herein described embodiments, the determination of the first m.sub.0 and second m.sub.1 cyclic shifts may be determined such that the first cyclic shift m.sub.0 is larger than the second cyclic shift m.sub.1; m.sub.0>m.sub.1; i.e. there are only usable positions above the diagonal through origin of coordinates.
[0160] According to some herein described embodiments, e.g. illustrated in
[0161] According to some herein described embodiments, e.g. illustrated in
[0162] According to some herein described embodiments, the determination of the first m.sub.0 and second m.sub.1 cyclic shifts may be determined such that two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) satisfy at most one of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1; and the first cyclic shift m.sub.0 is larger than the second cyclic shift m.sub.1; m.sub.0>m.sub.1; i.e. there is always unused positions between usable positions in the diagonal direction and there are only usable positions above the diagonal through origin of coordinates.
[0163] According to some herein described embodiments, e.g. illustrated in
[0164] According to some herein described embodiments, e.g. illustrated in
[0165] According to some herein described embodiments, the determination of the first m.sub.0 and second m.sub.1 cyclic shifts may be determined such that two cyclic shift pairs (m.sub.0, m.sub.1) and (m.sub.0, m.sub.1) that satisfy both of m.sub.0=m.sub.0+1 and m.sub.1=m.sub.1+1 are associated with different primary synchronization signal PSS sequence indices N.sub.ID.sup.(2), and the first cyclic shift m.sub.0 is larger than the second cyclic shift m.sub.1; m.sub.0>m.sub.1; i.e. there are only usable positions above the diagonal through origin of coordinates.
[0166] According to some herein described embodiments, e.g. illustrated in
[0167] Finally, it should be understood that the invention is not limited to the embodiments described above, but also relates to and incorporates all embodiments within the scope of the appended independent claims.