Control of phase currents of inverters that are connected in parallel

10819249 ยท 2020-10-27

Assignee

Inventors

Cpc classification

International classification

Abstract

Disclosed is a method for controlling phase currents of a plurality of three-phase inverters connected in parallel. The phase currents of each inverter are controlled by direct hysteresis current control wherein an actual current space vector for actual values of the phase currents of each inverter is maintained about a target current space vector within a hysteresis window. The measured current space vector of a first inverter is formed by all three phase currents of the first inverter. The actual current space vector of each additional inverter is formed from exactly two phase currents of the respective additional inverter under the proviso that all three phase currents of the additional inverters add up to zero. The selection of the two phase currents from which the actual current space vector is formed, is varied.

Claims

1. A method for controlling phase currents of a plurality of three-phase inverters connected in parallel, said method comprising: controlling the phase currents of each of the plurality of inverters with a direct hysteresis current control; maintaining an actual current space vector for actual values of the phase currents of each inverter within a hysteresis window about a target current space vector; forming the actual current space vector of a first inverter of the plurality of the three-phase inverters from all phase currents of the first inverter; forming the actual current space vector of each additional inverter of the plurality of inverters from exactly two phase currents of the each additional inverter provided that all three three phase currents of the each additional inverter add up to zero; and varying a selection of the exactly two phase currents of the each additional inverter.

2. The method of claim 1, further comprising controlling the phase currents of each of the plurality of inverters independently of the actual values of the phase currents of another of the plurality of inverters.

3. The method of claim 1, wherein for the each additional inverter, a third phase current that is not used to form the actual current space vector is not actively controlled.

4. The method of claim 1, further comprising varying for the each additional inverter the selection of the exactly two phase currents, from which the actual current space vector is formed, as a function of a phase relationship of output voltages of the each additional inverter.

5. The method of claim 1, further comprising selecting for the each additional inverter a phase having an output voltage of the each additional inverter with a greatest magnitude as the phase that is not used to form the actual current space vector.

6. The method of claim 1, further comprising using at each time instant a same target current space vector for all inverters.

7. The method of claim 1, further comprising forming each actual current space vector and each target current space vector in a fixed stator coordinate system.

8. The method of claim 7, wherein the actual current space vector of the first inverter is formed according to ( i WR 1 i WR 1 i 0 WR 1 ) = 1 3 ( 2 - 1 - 1 0 3 - 3 1 1 1 ) * ( i U WR 1 i V WR 1 i W WR 1 ) , wherein i.sub._WR1, i.sub._WR1, i.sub.0_WR1 are the coordinates of the actual current space vector of the first inverter, and i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1 are the three phase currents of the first inverter.

9. The method of claim 8, wherein the actual current space vector of the each additional inverter is formed according to ( i WR 2 i WR 2 i 0 WR 2 ) * = 1 3 ( 3 0 0 3 2 3 0 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) or according to ( i WR 2 i WR 2 i 0 WR 2 ) ** = 1 3 ( 0 - 3 - 3 0 3 - 3 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) or according to ( i WR 2 i WR 2 i 0 WR 2 ) ** * = 1 3 ( 3 0 0 - 3 0 - 2 3 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) , wherein i.sub._WR2, i.sub._WR2, i.sub.0_WR2 are coordinates of the actual current space vector of the each additional inverter, and i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 are the three phase currents of the each additional inverter.

10. The method of claim 1, further comprising using SDHC current control (Switched Diamond Hysteresis Control) as the hysteresis current control.

11. The method of claim 1, wherein the plurality of inverters are directly interconnected on a direct voltage side and are interconnected on an alternating voltage side by way of filters.

12. A control device for controlling phase currents of a plurality of three-phase inverters connected in parallel, comprising: a dedicated current measuring device connected to each inverter for acquiring actual values of the phase currents of phases of each inverter, and a dedicated hysteresis current control device connected to the each inverter, wherein the dedicated hysteresis current control device of the each inverter is configured to form from the acquired actual values of the phase currents an actual current space vector for the each inverter, produce switching signals for the phases of the each inverter so as to keep the actual current space vector for the each inverter within a hysteresis window about a target current space vector, wherein the actual current space vector of a first inverter of the plurality of the three-phase inverters is formed from all phase currents of the first inverter; and the actual current space vector of each additional inverter of the plurality of the three-phase inverters is formed from exactly two phase currents of the each additional inverter provided all three phase currents of the each additional inverter add up to zero, and vary a selection of the exactly two phase currents of the each additional inverter.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) The above-described characteristics, features and advantages of this invention, as well as the manner in which these are realized, will become more clearly and easily intelligible in connection with the following description of exemplary embodiments which are explained in more detail in connection with the drawings, in which;

(2) FIG. 1 shows an equivalent circuit diagram of two inverters connected in parallel, and

(3) FIG. 2 shows a circuit diagram of an exemplary embodiment of two inverters connected in parallel and a control device for controlling phase currents of the inverters.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(4) Parts which correspond to one another are provided with the same reference characters in the figures.

(5) FIG. 1 shows an equivalent circuit diagram of two three-phase inverters WR1, WR2 connected in parallel.

(6) Each inverter WR1, WR2 has a direct voltage intermediate circuit Z1, Z2 on the input side with a positive intermediate circuit potential Z+, a negative intermediate circuit potential Z- and an intermediate circuit voltage U.sub.Z which is the difference between these intermediate circuit potentials Z+, Z. The direct voltage intermediate circuits Z1, Z2 of the inverters WR1, WR2 are connected in parallel so that they have the same positive intermediate circuit potential Z+, the same negative intermediate circuit potential Z- and the same intermediate circuit voltage U.sub.Z.

(7) Furthermore, for each of its phases each inverter WR1, WR2 comprises a switch S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 with a first switching state, which sets a phase potential of the phase on the positive intermediate circuit potential Z+ and a second switching state, which sets the phase potential of the phase on the negative intermediate circuit potential Z. A change in the switching state of the switch S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 of a phase is referred to here as switching the phase.

(8) Each inverter WR1, WR2 is coupled on the output side via a separate filter F1, F2 to a mains supply. The filters F1, F2 each have at least one inductance L for each phase of the respective inverter WR1, WR2. The two phases of the two inverters WR1, WR2 which correspond to one another are interconnected on the output side and connected to a shared mains-side terminal L1, L2, L3, so that the two phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of these phases of the two inverters WR1, WR2 add up to a phase mains current i.sub.U_Network, i.sub.V_Network, i.sub.W_Network which is output via the terminal L1, L2, L3 connected to these phases.

(9) FIG. 2 shows a circuit diagram of a specific exemplary embodiment of two three-phase inverters WR1, WR2 connected in parallel according to FIG. 1 as well as a control device 1 for controlling the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of the inverters WR1, WR2 and a load 2 connected on the input side to the direct voltage intermediate circuits Z1, Z2 of the inverters WR1, WR2.

(10) The switches S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 are each embodied as a switching unit which has a half bridge 3 with a first switching element 5 and a second switching element 7. The switching elements 5, 7 are each embodied, for instance, as a bipolar transistor with an insulated gate electrode (IGBT=Insulated-Gate Bipolar Transistor), for instance. The first switching state of each switch S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 is established by closing the first switching element 5 and opening the second switching element 7, the second switching state is established by opening the first switching element 5 and closing the second switching element 7.

(11) The control device 1 comprises, for each inverter WR1, WR2, a current measuring device 9 for acquiring the measured values of the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of the inverter WR1, WR2 and a hysteresis current control device 11, with which switching signals for the phases of the inverter WR1, WR2 are generated from the acquired measured values of the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR1, i.sub.V_WR2, i.sub.W_WR2 in the manner described below in more detail, with which the switches S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2, i.e. in the exemplary embodiment shown in FIG. 2 the switching elements 5, 7 are controlled.

(12) The phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of each inverter WR1, WR2 are controlled by the respective hysteresis current control device 11 with a direct hysteresis current control independently of the measured values of the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of the respective other inverter WR1, WR2. Here a measured current space vector is formed from the measured values of the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1, i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2, acquired by the current measuring device 9, of each inverter WR1, WR2 in a fixed stator coordinate system in the manner described below in more detail. The measured current space vector is maintained within a hysteresis window about a target current space vector. The same target current space vector is used for both inverters WR1, WR2 at the same time, for instance.

(13) Furthermore, a hysteresis current control with a behavior comparable to a Flat Top modulation is used, in which a phase of each inverter WR1, WR2 is not switched in each clock period of the control. This is in each case preferably the phase, the output voltage of which, according to size, is currently the largest output voltage of the respective inverter WR1, WR2. As a result, the fixed stator coordinate system is divided into sectors of 60 degrees in each case, wherein in adjacent sectors another phase is not switched in each case.

(14) An SDHC current control is preferably used as a hysteresis current control.

(15) The measured current space vector of a first inverter WR1 is formed from the current strengths of all three phase currents i.sub.U_WR1, I.sub.V_WR1, I.sub.W_WR1 of the first inverter WR1 according to the following equation [1], which is a conventional Clark transformation, wherein i.sub.O_WR1 refers to the zero system current of the first inverter WR1:

(16) ( i WR 1 i WR 1 i 0 WR 1 ) = 1 3 ( 2 - 1 - 1 0 3 - 3 1 1 1 ) * ( i U WR 1 i V WR 1 i W WR 1 ) . [ 1 ]

(17) Contrary hereto the measured current space vector of the second inverter WR2 is formed at each time instant from just exactly two of the three phase currents i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of the second inverter WR2 according to one of the following equations [2] to [4]:

(18) ( i WR 2 i WR 2 i 0 WR 2 ) * = 1 3 ( 3 0 0 3 2 3 0 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) , [ 2 ] ( i WR 2 i WR 2 i 0 WR 2 ) ** = 1 3 ( 0 - 3 - 3 0 3 - 3 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) , [ 3 ] ( i WR 2 i WR 2 i 0 WR 2 ) ** * = 1 3 ( 3 0 0 - 3 0 - 2 3 0 0 0 ) * ( i U WR 2 i V WR 2 i W WR 2 ) , [ 4 ]
wherein the respective selected equation of the equations [2] to [4] varies, i.e. is changed at consecutive time instants. Each of the equations [2] to [4] is a Clarke transformation, in which in each case a phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.V_WR2 has been calculated from the two other phase currents i.sub.U_WR2, I.sub.V_WR2, i.sub.W_WR2 of the second inverter WR2 while assuming that the three phase currents .sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 add up to zero, i.e. while assuming that the zero system current of the second inverter WR2 vanishes, although this is not actually generally the case.

(19) With the formation of the measured current space vector of the second inverter WR2 according to one of the equations [2] to [4], one of the phase currents i.sub.U_WR2, I.sub.V_WR2, i.sub.W_WR2 is therefore not used, i.e. the measured current space vector of the second inverter WR2 is in each case only formed from the measured values of the two other phase currents i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2. In equation [2], the phase current i.sub.W_WR2 is not used to form the measured current space vector, in equation [3] the phase current i.sub.U_WR2 and in equation [4] the phase current i.sub.V_WR2.

(20) Preferably that phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2, the phase of which is currently not switched in accordance with the Fiat-Top modulation, is in each case not used to form the measured current space vector of the second inverter WR2. If, in accordance with an afore-cited preferred embodiment, this phase is always the phase, the phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of which is the currently largest phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 of the second inverter WR2, according to amount, the fixed stator coordinate system is divided into sectors of in each case 60 degrees, wherein in adjacent sectors another of the equations [2] to [4] is used to form the measured current space vector of the second inverter WR2.

(21) By forming the measured current space vector of the second inverter WR2 according to one of the equations [2] to [4], the two phase currents i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2, from which the measured current space vector is formed in each case, are controlled to their target values, even if a zero system current of the second inverter WR2 does not vanish. The respective third phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 is not controlled to its target value with a non-vanishing zero system current of the second inverter WR2. However, permanently changing those phase currents i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 from which the measured current space vector of the second inverter WR2 is formed in each case means that all three phase currents i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 correspond at least approximately (within the hysteresis window) to their target values after a short harmonic phase of the control. As a result, a zero system current in the second inverter WR2 is essentially eliminated (apart from a zero system current with a current strength in the region of the width of the hysteresis window). A zero system current in the first inverter WR1 is indeed not actively controlled, but, on account of the control of the second inverter WR2, does not lead to a circular current between the first inverter WR1 and the second inverter WR2. These properties of the inventive control are detailed below.

(22) By assuming that the controls of both inverters WR1, WR2 are tuned, i.e. that in the middle the - and -components of the calculated measured current space vector correspond to the corresponding components of the target current space vector, and that for the phases of both inverters WR1, WR2 the same current target values .sub.U_target, i.sub.V_target, i.sub.W_target are used in each case, the following equations [5] to [7] apply to the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1 of the first inverter WR1.

(23) i U WR 1 = i target + i 0 WR 1 = i U target + i 0 WR 1 , [ 5 ] i V WR 1 = 3 i target - i target 2 + i 0 WR 1 = i V target + i 0 WR 1 , [ 6 ] i W WR 1 = - 3 i target - i target 2 + i 0 WR 1 = i W target + i 0 WR 1 . [ 7 ]

(24) The measured values of the phase currents i.sub.U_WR1, i.sub.V_WR1, i.sub.W_WR1 of the first inverter WR1 therefore deviate from the respective current target values i.sub.U_target; i.sub.V_target; i.sub.w_target about the zero system current i.sub.0.sub.WR1 of the first inverter WR1.

(25) In the exemplary embodiment shown in FIG. 2, no zero system current can flow over the mains supply. The following connection therefore results.
i.sub.U.sub.Network+i.sub.V.sub.Network+i.sub.W.sub.Network=0={i.sub.U.sub.WR1+i.sub.U.sub.WR3}+{i.sub.V.sub.WR1+i.sub.V.sub.WR2}+{i.sub.W.sub.WR1+i.sub.W.sub.WR2}[8]

(26) For the second inverter WR2, equations for the phase currents i.sub.U_WR2, i.sub.V_NR2, i.sub.W_WR2 can likewise be set up for the first inverter WR1. For the following explanations, it is assumed by way of example that the measured current space vector of the second inverter WR2 is formed according to equation [2]. The phase currents i.sub.U_WR2, i.sub.V_WR2 then result in accordance with the following equations [9] and [10]:

(27) i U WR 2 = i WR 2 * + i 0 WR 2 * = i target + 0 = i U target , [ 9 ] i V WR 2 = 3 i WR 2 * - i WR 2 * 2 + i 0 WR 2 * = 3 i target - i target 2 + 0 = i V target . [ 10 ]

(28) This shows that the two phase currents i.sub.U_WR2, i.sub.V_WR2 used in this case to form the measured current space vector of the second inverter WR2 are controlled to their current target values. The third phase current i.sub.W_WR2 is not controlled to its current target value. The set-up of equation [2] was based on the assumption that the zero system current of the second inverter WR2 vanishes (0=i.sub.U_WR2+i.sub.V_WR2+i.sub.W_WR2). This assumption is however generally not relevant and can therefore not be used to calculate and control the phase current i.sub.W_WR2.

(29) The equations [5] to [10] show:
0={(i.sub.U.sub.target+i.sub.0.sub.WR1)+i.sub.U.sub.target}+{(i.sub.V.sub.target+i.sub.0.sub.WR1)+i.sub.V.sub.target}+{(i.sub.W.sub.target+i.sub.0.sub.WR1)+.sub.W.sub.WR2}. [11]

(30) If the node rule (e,g. i.sub.U_WR1+i.sub.U_WR2=i.sub.U_Network) is additionally applied to the individual phases, the following equations [12] to [15] result:
i.sub.U.sub.Network=2i.sub.U.sub.target+i.sub.0.sub.WR1, [12]
i.sub.V.sub.Network=2i.sub.V.sub.target+i.sub.0.sub.WR1, [13]
i.sub.W.sub.Network=i.sub.W.sub.target+i.sub.0.sub.WR1+i.sub.W.sub.WR1+i.sub.W.sub.WR3=2*i.sub.W.sub.target+(i.sub.0.sub.WR1+i.sub.W.sub.WR2i.sub.W.sub.target)=2*i.sub.W.sub.target2*(i.sub.0.sub.WR1) [14]
(i.sub.W.sub.WR2i.sub.W.sub.target)=i.sub.0.sub.WR2=3*i.sub.0.sub.WR1, [15]
wherein i.sub.O_WR2=i.sub.U_WR2+i.sub.V_WR2+i.sub.W_WR2 has been used.

(31) Two basic statements can be derived from the equations [12] to [15]: On account of the zero system currents of the inverters WR1, WR2, the resulting phase network currents i.sub.U_Network, i.sub.V_Network, i.sub.W_Network deviate from their target values. The first inverter WR1 deviates in all three phase currents i.sub.U_WR1, i.sub.V.sub.WR1, i.sub.W_WR1 by the same amount from the current target values. The second inverter WR2 deviates at each time instant only in one phase from the current target value, but with triple the difference.

(32) The above statements have been made in the instance that a phase is not used to form the measured current space vector of the second inverter WR2. Similarly, the observations and equations can also be applied to another phase.

(33) Both inverters WR1, WR2 have the same switching state in the phase which is not currently switched according to the Flat Top modulation. An approximately identical voltage therefore also drops on the two inductances L of the corresponding phase (component scatterings, temperature differences etc. can lead to slight differences). This results in the phase current difference between the two inverters WR1, WR2 also only changing minimally in this phase. According to equations [12] to [15], the circular current therefore also remains (approximately) constant.

(34) As has been mentioned above, the phase not used to form the measured current space vector of the second inverter WR2 changes permanently. A circular current existing in the second inverter WR2 before a change is automatically in an active phase after the change, i.e. in a phase which is used to form the measured current space vector of the second inverter WR2, and after the change is therefore controlled directly by the control. The phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 which is not used after the change to form the measured current space vector of the second inverter WR2 approximately assumes its current target value prior to the change (with a steady-state control). Since only the average value of the phase current i.sub.U_WR2, i.sub.V_WR2, i.sub.W_WR2 corresponds to the current target value, however, and the time instant of the change is not known, a circular current with a current strength in the range of the hysteresis width of the control can arise. With a steady-state control between two changes in that phase which is not used to form the measured current space vector of the second inverter WR2, an existing circular current therefore remains approximately constant and is controlled by the change in this phase.

(35) The control described by way of example above for two inverters WR1, WR2 is applied analogously for more than two three-phase inverters WR1, WR2 which are connected in parallel, wherein one of the inverters WR1, WR2 is controlled like the first inverter WR1 of the above-described control and each further inverter WR1, WR2 is controlled like the second inverter WR2 of the above-described control.

(36) The above described current control can also be used analogously instead for two level inverters, the switches S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 of which only have two switching states, also for multi-level inverters, the switches S.sub.U_WR1, S.sub.V_WR1, S.sub.W_WR1, S.sub.U_WR2, S.sub.V_WR2, S.sub.W_WR2 of which have more than two switching states.

(37) Although the invention has been illustrated and described in detail based on preferred exemplary embodiments, the invention is not restricted by the examples given and other variations can be derived therefrom by a person skilled in the art without departing from the protective scope of the invention.

(38) Although the invention has been illustrated and described in detail based on preferred exemplary embodiments, the invention is not restricted by the examples given and other variations can be derived therefrom by a person skilled in the art without departing from the protective scope of the invention.