Circuit for impedance matching between a generator and a load at multiple frequencies, assembly comprising such a circuit and related use

Abstract

The invention relates to a circuit (100) able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a power supply signal comprising at least two distinct frequencies.

Claims

1. A circuit for impedance matching able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a supply signal comprising at least one first frequency and one second frequency, both being distinct from one another, said circuit comprising an impedance matching stage (S1) able to achieve impedance matching between the generator and the load for the first frequency, this stage (S1) comprising a circuit (C1) comprising at least a tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH) and a load impedance (Z.sub.LOAD) intended to be arranged between the generator (G) and an earth, wherein said circuit for impedance matching further comprises at least one pair of additional stages (S2, S2) able to achieve impedance matching, simultaneously, between the generator and the load for the second frequency, said pair of additional stages (S2, S2) comprising: a first additional stage (S2) comprising a load circuit (C2) arranged in parallel with respect to the load impedance (Z.sub.LOAD) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.load2) and a capacitor (C.sub.load2) arranged in series, and a second additional stage (S2) comprising a tuning circuit (C2) arranged in series with respect to the tuning impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.tune2) and a capacitor (C.sub.tune2) arranged in parallel, the impedance matching stage (S1) furthermore being arranged between the first additional stage (S2) and the second additional stage (S2) and wherein said circuit for impedance matching further comprises at least one supplementary pair of additional stages able to achieve impedance matching, simultaneously, between the generator and the load for a third frequency, distinct from said first and second frequencies, said at least one supplementary pair of additional stages (S3, S3) comprising: a first supplementary additional stage (S3) comprising a load circuit (C3) arranged in parallel with respect to the load impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C3) comprising at least an inductance (L.sub.load3) and a capacitor (C.sub.load3) arranged in series, a second supplementary additional stage (S3) comprising a tuning circuit (C3) arranged in series with respect to the tuning impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C3) comprising at least an inductance (L.sub.tune3) and a capacitor (C.sub.tune3) arranged in parallel, the assembly formed by the impedance matching stage (S1) and by the pair of additional stages (S2, S2) furthermore being arranged between the first supplementary additional stage (S3) and the second supplementary additional (S3) stage.

2. The circuit according to claim 1, wherein the value of at least either the inductance or the capacitor of at least one of the additional stages (S2, S2; S3, S3) can be adjusted.

3. The circuit according to claim 1, wherein the circuit (C1) of the impedance matching stage (S1) comprises a tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH), and a load impedance (Z.sub.LOAD) intended to be arranged between the generator (G) and said earth.

4. The circuit according to claim 3, wherein the tuning impedance (Z.sub.TUNE) comprises an inductance (L.sub.tune) arranged in series with a capacitor (C.sub.tune) and the load impedance (Z.sub.load) comprises a capacitor (C.sub.load).

5. The circuit according to claim 4, wherein the tuning impedance (Z.sub.TUNE) consists of an inductor (L.sub.tune) arranged in series with a capacitor (C.sub.tune) and the load impedance (Z.sub.load) consists of a capacitor (C.sub.load).

6. A circuit for impedance matching able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a supply signal comprising at least one first frequency and one second frequency, both being distinct from one another, said circuit comprising an impedance matching stage (S1) able to achieve impedance matching between the generator and the load for the first frequency, this stage (S1) comprising a circuit (C1) comprising at least a tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH) and a load impedance (Z.sub.LOAD) intended to be arranged between the generator (G) and an earth, wherein said circuit for impedance matching further comprises at least one pair of additional stages (S2, S2) able to achieve impedance matching, simultaneously, between the generator and the load for the second frequency, said pair of additional stages (S2, S2) comprising: a first additional stage (S2) comprising a load circuit (C2) arranged in parallel with respect to the load impedance (Z.sub.LOAD) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.load2) and a capacitor (C.sub.load2) arranged in series, and a second additional stage (S2) comprising a tuning circuit (C2) arranged in series with respect to the tuning impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.tune2) and a capacitor (C.sub.tune2) arranged in parallel, the impedance matching stage (S1) furthermore being arranged between the first additional stage (S2) and the second additional stage (S2), wherein the circuit (C1) further comprises another load impedance (Z.sub.LOAD) intended to be arranged between the load (CH) and said earth so that the tuning impedance (Z.sub.TUNE) is arranged between the two load impedances (Z.sub.LOAD, Z.sub.LOAD).

7. A circuit for impedance matching able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a supply signal comprising at least one first frequency and one second frequency, both being distinct from one another, said circuit (100) comprising an impedance matching stage (S1) able to achieve impedance matching between the generator and the load for the first frequency, this stage (S1) comprising a circuit (C1) comprising at least a tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH) and a load impedance (Z.sub.LOAD) intended to be arranged between the generator (G) and an earth, wherein said circuit for impedance matching further comprises at least one pair of additional stages (S2, S2) able to achieve impedance matching simultaneously, between the generator and the load for the second frequency, said pair of additional stages (S2, S2) comprising: a first additional stage (S2) comprising a load circuit (C2) arranged in parallel with respect to the load impedance (Z.sub.LOAD) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.load2) and a capacitor (C.sub.load2) arranged in series, and a second additional stage (S2) comprising a tuning circuit (C2) arranged in series with respect to the tuning impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.tune2) and a capacitor (C.sub.tune2) arranged in parallel, the impedance matching stage (S1) furthermore being arranged between the first additional stage (S2) and the second additional stage (S2), wherein the circuit (C1) further comprises another tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH) so that the load impedance (Z.sub.LOAD) is arranged between the two tuning impedances (Z.sub.TUNE, Z.sub.TUNE).

8. An assembly comprising: a load (CH), and a generator (G) able to transmit to the load a power supply signal comprising at least a first frequency and a second frequency distinct from one another, wherein said assembly further comprises a circuit for impedance matching able to achieve simultaneous impedance matching between a generator (G) and a load (CH) for a supply signal comprising at least one first frequency and one second frequency, both being distinct from one another, said circuit comprising an impedance matching stage (S1) able to achieve impedance matching between the generator and the load for the first frequency, this stage (S1) comprising a circuit (C1) comprising at least a tuning impedance (Z.sub.TUNE) intended to be arranged in series between the generator (G) and the load (CH) and a load impedance (Z.sub.LOAD) intended to be arranged between the generator (G) and an earth, wherein said circuit for impedance matching further comprises at least one pair of additional stages (S2, S2) able to achieve impedance matching, simultaneously, between the generator and the load for the second frequency, said pair of additional stages (S2, S2) comprising: a first additional stage (S2) comprising a load circuit (C2) arranged in parallel with respect to the load impedance (Z.sub.LOAD) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.load2) and a capacitor (C.sub.load2) arranged in series, and a second additional stage (S2) comprising a tuning circuit (C2) arranged in series with respect to the tuning impedance (Z.sub.TUNE) of the impedance matching stage (S1), said load circuit (C2) comprising at least an inductance (L.sub.tune2) and a capacitor (C.sub.tune2) arranged in parallel, the impedance matching stage (S1) furthermore being arranged between the first additional stage (S2) and the second additional stage (S2), said circuit being arranged between the generator (G) and the load (CH) so that, on the one hand, the first additional stage (S2, S3) that comprises the outermost load circuit (C2, C3) of said circuit for impedance matching is connected to the generator (G), and on the other hand, the second additional stage (S2, S3) that comprises the outermost tuning circuit (C2, C3) of said circuit for impedance matching is connected to the load (CH).

9. The assembly according to claim 8, wherein the first frequency is a fundamental frequency of said power supply signal and the second frequency, and as necessary any additional frequency, is one of its harmonics.

10. The assembly according to claim 8, wherein said assembly includes a frequency sensor (CF) located between the generator (G) and said circuit for impedance matching.

11. The assembly according to claim 8, wherein the load (CH) is a capacitively-coupled plasma reactor.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other characteristics, purposes and advantages of the invention will be revealed upon reading the following description made in reference to the appended drawings, provided by way of examples, wherein:

(2) FIGS. 1(a) to 1(c) show three possible configurations to achieve impendence matching at a single frequency;

(3) FIG. 2 shows a general diagram of an assembly according to the invention and comprising a generator, a load and, arranged between the generator and the load, a circuit for impedance matching;

(4) FIG. 3 shows a more accurate diagram of the embodiment shown in FIG. 2 according to the invention, wherein the components of the circuit for impedance matching are named;

(5) FIGS. 4(a) and 4(b) show in FIG. 4(a) the working principle of an embodiment without implementing the invention in a Smith chart and in FIG. 4(b) the working principle of the embodiment of FIG. 3, in a Smith chart;

(6) FIG. 5 shows another embodiment according to the invention,

(7) FIGS. 6(a), 6(b) and 6(c) show the results of a theoretical simulation of the behaviour of embodiment of FIG. 5;

(8) FIG. 7 shows the results of an experimental test performed with the embodiment of FIG. 5;

(9) FIG. 8 shows the results of another experimental test performed with the embodiment of FIG. 5; and

(10) FIG. 9 reproduces FIG. 2 in the case of a frequency sensor being provided at the output of the generator.

(11) An embodiment of the invention is shown in FIGS. 2 and 3.

(12) These figures show an assembly 200 comprising a generator G, a load CH and a circuit for impedance matching 100 located between the generator G and the load CH.

(13) The circuit for impedance matching 100 is able to achieve simultaneous impedance matching between the generator G and the load CH for a power supply signal comprising at least a first frequency and a second frequency distinct from one another.

(14) This circuit for impedance matching 100 comprises an impedance matching stage S1 able to achieve impedance matching between the generator and the load for the first frequency.

(15) This stage S1 comprises a circuit C1 similar to that shown in FIG. 1(a). Here, by way of example, the tuning impedance Z.sub.TUNE corresponds to an association, in series, of an inductance L.sub.tune and of a capacitor C.sub.tune and, furthermore, the load impedance Z.sub.LOAD corresponds to a load capacitor C.sub.load.

(16) This circuit for impedance matching 100 further comprises at least one pair of additional stages S2, S2 able to achieve impedance matching, simultaneously, between the generator and the load for the second frequency.

(17) More specifically, the pair of additional stages S2, S2 comprises: a first additional stage S2 comprising a load circuit C2 arranged in parallel with respect to the load impedance Z.sub.LOAD (for example a capacitor C.sub.load) of the impedance matching stage S1 said load circuit C2 comprising at least an inductor L.sub.load2 and a capacitor C.sub.load2 arranged in series, and a second additional stage S2 comprising a tuning circuit C2 arranged in series with respect to the load impedance Z.sub.TUNE (for example an inductor L.sub.tune in series with a capacitor C.sub.tune) of the impedance matching stage S1, said load tuning C2 comprising at least an inductor L.sub.tune2 and a capacitor C.sub.tune2 arranged in parallel, the load and tuning stage S1 furthermore being arranged between the first additional stage S2 and the second additional stage S2.

(18) In practice, the next step is to select the values of the capacitors and impedances to use in each circuit C1, C2, and C2. This depends in particular on the nature and characteristics of the load CH.

(19) FIGS. 4(a) and 4(b) features a Smith chart explaining how the impedance matching works.

(20) More specifically, FIG. 4(a) is a Smith chart without implementing the invention. For this reason, matching is achieved with a single stage, of the S1-type of FIG. 3, and therefore is included in the framework defined in FIG. 1(a), directly connected to the generator G and the load CH.

(21) And FIG. 4(b) is a Smith chart implementing the invention, for example according to FIG. 3.

(22) A Smith chart (abacus) shows the value of the real portion and the imaginary portion of an impedance (Z) or of an admittance (Y=1/Z). This representation is largely used in problems relating to impedance matching. Indeed, this representation is conducted in the complex field and more specifically in a plane (2D) of a complex reflection coefficient and is normalised, often with impedance, with admittance or with both in different domains to distinguish them.

(23) For the application considered here, normalised impedance can be taken into account, with a value of 50 Ohms (the most commonly used). This corresponds, in FIGS. 4(a) and 4(b), to the small circle in the centre of the figure.

(24) In FIG. 4(a), for the first frequency (fundamental), the effect of the stage S1 is noted. For example, for the impedance, the starting point is initial impedance at the frequency f (before the stage S1 and therefore at the output of the generator), and the arrow indicates the direction to follow. This is in all ways conventional. In this same FIG. 4(b), everything that occurs on the frequency 2f (first harmonic) is then noted, starting from the point initial impedance at the frequency 2f (before the stage S1 and therefore at the output of the generator) and following the arrow.

(25) The impedance matching is of poor quality for the frequency 2f.

(26) In FIG. 4(b), for the first frequency (fundamental), the effect of the stage S1 (impedance or admittance) alone is noted, i.e. without the stages S2 and S2. For example, for the impedance, the starting point is initial impedance at the frequency f, and the arrow indicates the direction to follow. This is identical to what occurs under these conditions in FIG. 4(a). In the same FIG. 4(b), everything that occurs on the frequency 2f (first harmonic) is then noted, with only one conventional stage S1, i.e. without the stages S2 and S2 (FIGS. 2 and 3). For example, for the impedance, the starting point is initial impedance at the frequency 2f, and the arrow indicates the direction to follow. This behaviour is similar to that described previously in FIG. 4(a).

(27) The impedance matching is therefore of poor quality for the frequency 2f (small uppermost circles in FIG. 4(b)).

(28) It is from here that FIG. 4(b) differs notably from FIG. 4(a).

(29) Indeed, in the same FIG. 4(b), the technical effect of the implementation of stages S2 and S2, as proposed by the invention, on the frequency 2f is noted.

(30) The operating point (admittance, impedance) is, for this frequency 2f, brought to that of the frequency f, which is managed by the stage S1. The impedance matching at the frequency 2f is therefore of very good quality and even of a quality similar to that achieved in the case of a single frequency (conventional configuration).

(31) Finally, it is noted that in this FIG. 4(b), that the impedance matching achieved for the frequency 2f has no impact on the impedance matching at the frequency f. There is independence between the management of impedance matching on those two frequencies. This independence is not necessarily absolute, but it can be determined by the finesse of the frequency response of the circuits (quality factor Q) in the stages S2 and S2.

(32) The design proposed in FIGS. 2 and 3, adapted to manage two distinct frequencies, can be generalised to N (N>2) distinct frequencies.

(33) FIG. 5 shows another embodiment, illustrating in practice how to manage a third frequency (N=3 case), distinct from the two first frequencies.

(34) This other embodiment is based on the embodiment of FIG. 3 and shows where and how to add components to process a third frequency, distinct from the two first frequencies.

(35) Thus, in addition to the components of the circuit 100 for impedance matching described above, the circuit 100 for impedance matching provided in this case comprises at least a supplementary pair of additional stages S3, S3 able to achieve impedance matching, simultaneously, between the generator G and the load CH for a third frequency distinct from said first and second frequencies.

(36) More specifically, said at least one supplementary pair of additional stages S3, S3 comprises: a first supplementary additional stage S3 comprising a load circuit C3 arranged in parallel with respect to the load impedance Z.sub.LOAD (for example a capacitor C.sub.load) of the impedance matching stage S1, said load circuit C3 comprising at least an inductor L.sub.load3 and a capacitor C.sub.load3 arranged in series, and a second supplementary additional stage S3 comprising a tuning circuit C3 arranged in series with respect to the load impedance Z.sub.TUNE (for example an inductor L.sub.tune in series with a capacitor C.sub.tune) of the impedance matching stage S1, said load tuning C3 comprising at least an inductor L.sub.tune3 and a capacitor C.sub.tune3 arranged in parallel. the assembly formed by the impedance matching stage S1 and by the supplementary pair of additional stages S2, S2 furthermore being arranged between the first supplementary additional stage S3 and the second supplementary additional S3 stage.

(37) In practice, the values of the inductors and capacitors of the circuits C3 and C3 are selected to ensure good quality impedance matching for the third frequency (3f, for example).

(38) As indicated previously, this can be generalised to other frequencies (N>3).

(39) Each time, a stage that is similar, by its design, to the stage S2 should be added at the output of the generator G and a stage that is similar, by its design, to the stage S2 should be added before the input of the load CH.

(40) With the circuits 100, 100 for impedance matching described above, an assembly 200, 200 can be constructed, said assembly comprising: a load CH, and a generator G able to transmit to the load a power supply signal comprising at least a first frequency and a second frequency, the frequencies being distinct from one another, wherein said assembly 200, 200 further comprises a circuit 100, 100 for impedance matching according to one of the preceding claims arranged between the generator G and the load CH so that, on one hand, the first additional stage S2, S3 that comprises the outermost load circuit C2, C3 of said circuit 100, 100 for impedance matching is connected to the generator G, and on the other hand, the second additional stage S2, S3 that comprises the outermost tuning circuit C2, C3 of said circuit 100, 100 for impedance matching is connected to the load CH.

(41) In this assembly 200, 200, the first frequency can be a fundamental frequency of said power supply signal and the second frequency, and/or as necessary any additional frequency, is one of its harmonics.

(42) The load CH can be a capacitively-coupled plasma generator. Alternatively, it can also be another electrical load with a characteristic impedance value that is different from that of the generator G, for example an antenna, a cable, and amplifier or an isolating circuit, a transducer, a coil, or an inductively-coupled plasma reactor.

(43) FIGS. 6(a) to 6(c) show the results of a digital simulation conducted with the circuit 100 for impedance matching shown in FIG. 5.

(44) FIGS. 6(b) and 6(c) being views that focus on the frequencies 2f and 3f respectively.

(45) For this simulation, the following conditions were taken into account.

(46) The embodiment of FIG. 5 is used as basis.

(47) The generator G is modelled as having a characteristic impedance of 50 Ohms.

(48) As far as the load CH is concerned, it can be in the form of a capacitively-coupled plasma reactor. Therefore, it is considered to feature variable impedance with the frequency. It is modelled with the following values: capacity of the load C.sub.CH=700.10.sup.12 (Farad); resistance of the load R.sub.CH=5 (Ohm); et inductance of the load L.sub.CH=14.10.sup.9 (Henry).

(49) It should be noted that in order to enable the optimal transmission of power, a load resistance of 5 Ohms is provided.

(50) As far as the circuit C1 (matchbox) is concerned, it is modelled with the following values: capacity C.sub.load=7.10.sup.10 (Farad); capacity C.sub.tune=3.3.10.sup.9 (Farad); and inductance L.sub.tune=4.10.sup.7 (Henry).

(51) As far as the circuit C2 is concerned, it is modelled with the following values: capacity C.sub.load2=5.3.10.sup.12 (Farad); and inductance L.sub.load2=6.7.10.sup.6 (Henry).

(52) As far as the circuit C2 is concerned, the following values are used: capacity C.sub.load2=1.3.10.sup.8 (Farad); inductance L.sub.load2=2.7.10.sup.9 (Henry).

(53) As far as the circuit C3 is concerned, it is modelled with the following values: capacity C.sub.load3=1.9.10.sup.12 (Farad); inductance L.sub.load3=7.9.10.sup.6 (Henry).

(54) As far as the circuit C3 is concerned, the following values are used: capacity C.sub.load3=10.sup.8 (Farad); inductance L.sub.load3=1.5.10.sup.9 (Henry).

(55) To establish these values, the approach consists firstly in achieving impedance matching at the frequency f (13.56 MHz). For this purpose, the values of the inductance L.sub.tune and of the capacitors C.sub.load, C.sub.tune of the circuit C1 (matchbox) of FIG. 5 are set by selecting an easily-achievable inductance value, and then by calculating accurate capacity values of each capacitor.

(56) Then, subsequently, the values of the capacitors and inductors of the circuits C2, C2, C3 and C3 of the circuit 100 for impedance matching of FIG. 5 are set so that the generator G sees an impedance value of 50 Ohms at the frequencies 2f (27.12 MHz) and 3f (40.68 MHz), with little or no impact on the impedance matching condition of the frequency f (13.56 MHz). No adjustment is performed for the circuit C1 after adding the circuits C2, C2, C3 and C3.

(57) FIG. 6 shows the evolution of the phase (PHA, in degrees) and of the amplitude (AMP, in Ohms) of the impedance seen by the generator G based on the frequency (Hz) of the signal. It should be noted that at frequencies f (13.56 MHz), 2f and 3f, the amplitude AMP and the phase PHA feature values that are close, respectively, to 50 Ohms and 0 (see dotted lines), which provides for perfect or nearly perfect impedance matching. This means that similar impedance matching is achieved for these three frequencies f, 2f and 3f, and that this impedance matching is of good quality.

(58) An experimental installation, implementing the embodiment of FIG. 5, was subsequently produced.

(59) The experimental installation is provided with a circuit 100 for impedance matching similar to that of FIG. 5 (real), and its load was modelled by defining its resistance, its capacity and its inductance. Then the reflected power was measured at the input of the experimental installation (input of the assembly 200 of FIG. 5 where the generator is connected), assuming the presence of a generator with a characteristic impedance of 50 Ohms.

(60) It should be noted that the results of the simulation provided usable values for the components of the different circuits C1, C2, C2, C3 and C3 of the real circuit 100 for impedance matching.

(61) Furthermore, FIG. 7 shows this measurement (on the Y axis, in % of the injected power) as a function of the frequency (on the X axis).

(62) In this case and with the digital simulation, the presence of three troughs should be noted at the frequencies of 15.2 MHz, 28.9 MHz and 44.2 MHz, with similar low reflection rate values for the three frequencies (reflection rate of about 22%). This confirms, experimentally, the possibilities afforded by the invention for impedance matching at multiple frequencies.

(63) It should be noted that, relating to these experimental results, the frequencies are not exactly 13.56 MHz, 27.12 MHz and 40.68 MHz, but that they are all slightly offset towards higher frequencies. This is due to the presence of parasitic inductances within the implemented experimental installation. This does not call into question the fact that the experimental tests conducted confirm the results of the digital simulation.

(64) Finally, another experimental installation was implemented.

(65) This other experimental installation implements the experimental installation described above, this time using a real plasma reactor as load. It should therefore be understood that the circuit 100 for impedance matching is that shown in FIG. 5.

(66) The characteristics of the plasma reactor are as follows. It is a capacitively-coupled plasma (CCP) reactor provided with electrodes. Each electrode is in the form of a cylinder with a diameter of 10 cm. One of the electrodes is connected to the earth and surrounded by a cylindrical earth shield. The distance between the two electrodes is 3 cm. The considered medium is Argon, at a pressure of 200 mTorr.

(67) FIG. 8 shows the Fourier transform of the voltage waveform at the input of the plasma reactor (relative amplitude in dB, on the Y axis) as a function of frequency (X axis). For lack of availability of a sensor suited to the experimental conditions, the reflected power was not measured.

(68) Thus, in FIG. 8, the CB3 curve shows that a good quality of impedance matching can be achieved for the three frequencies 1f, 2f and 3f. This FIG. 7 also shows that impedance matching can be achieved, only for two frequencies 1f and 2f (curve CB1) or 1f and 3f (curve CB2).

(69) It should however be noted in FIG. 8 that the frequency f is approximately 10 MHz. As explained above, this is due to the presence of parasitic inductances and practical issues relating to ill-adapted cabling for the implementation of this experimental installation comprising a real plasma reactor as load.

(70) Nonetheless, these additional experimental results confirm those obtained by digital simulation and with an experimental installation for which the load was modelled.

(71) It should be noted that, for the purpose of the present invention, and in the context of FIG. 1(a), a load impedance Z.sub.LOAD and a tuning impedance Z.sub.TUNE can be provided for the impedance matching stage S1, which is different to what is more specifically proposed in FIGS. 3 and 5. For example, a supplementary inductance can be provided, after C.sub.tune, in series with L.sub.tune and C.sub.tune (FIG. 3, 5 or 9). According to another example, it is possible to remove L.sub.tune and keep only C.sub.tune. In this case, perfect impedance matching at multiple frequencies cannot be guaranteed, but improved tuning at multiple frequencies with respect to the prior art is achievable.

(72) It should also be noted that, for the purpose of the invention, for the impedance matching stage S1, a configuration similar to that of FIG. 1(b) or 1(c) can be implemented. In these cases, perfect impedance matching at multiple frequencies cannot be guaranteed, but an improved tuning at multiple frequencies with respect to the prior art is also achievable.

(73) The above description relates to circuits wherein the inductor or capacitor values implemented in the circuits enabling processing the frequencies 2f, 3f and following, are constant.

(74) However, it can be particularly interesting to implement, for at least one of the circuits C2, C2, C3 and C3, a value of at least either the inductor or the capacitor of at least one of these circuits or of the additional stages S2, S2; S3, S3 (it makes no difference) that is adjustable. This renders the circuit 100, 100 more versatile for various types of loads CH (in particular for different types of plasma reactors), of which the characteristic impedance is known (most common case) or not.

(75) In practice, and broadly speaking, the characteristic impedance of the generator G is fixed (known by design). The invention therefore consists, for a given load CH with an associated characteristic impedance value, in achieving impedance matching of the load CH taking into account that of the generator G. Thus, in the above example, the generator G has an impedance of 50 Ohms (most common case) and the load can be of any value, but in the example considered, it is such that its characteristic impedance can be modelled by a capacity C.sub.CH=700.10.sup.12 Farad and a resistance of R.sub.CH=5 Ohm.

(76) But the invention also applies in the case of the impedance of the load CH being fixed (known by design), and impedance matching of the generator G taking into account that of the load CH is required. Therefore, using the above example, the load is defined by a characteristic impedance corresponding to a capacity C.sub.CH=700.10.sup.12 Farad and a resistance of R.sub.CH=5 Ohm and the generator G would be modelled with a resistance of 50 Ohm. This applies to all of the diagrams of FIGS. 1(a), 1(b) and 1(c). In this case also, the advantage of having adjustable values for the various capacities and inductances is clearly demonstrated as it enables, fora load CH with a known characteristic impedance, to adapt to a generator G, the impedance of which is known (most general case, but in no way the most unconventional case, the conventional case being 50 Ohm) or not.

(77) Finally, the present invention has several advantages.

(78) The solution proposed according to the present invention implements a single generator and requires a reduced number of components to operate efficiently. In other words, with respect to a solution consisting, for N (N>1) multiple frequencies, in providing N generators and as many circuits for impedance matching, as well as N(N1) filters, the number of components is significantly reduced, and so is the cost.

(79) Furthermore, it should be noted that the solution proposed according to the present invention can be implemented on existing circuits for impedance matching. Indeed, considering for example the basic design shown in FIG. 3, it is simply a matter of adding, with respect to a conventional circuit for impedance matching (stage S1 only), on either side thereof, the stage S2 and the stage S2 or other stages. This could not be considered with the design disclosed in document WO 2013/186381.

(80) Finally, the design of the circuit 100, 100 for impedance matching between the generator and the load implies that the tuning for a given frequency (for example a harmonic) is independent from the tuning for another frequency (for example the fundamental frequency). With respect to the solution disclosed in document WO 2013/186381, the impedance matching performance is improved.

(81) It should finally be added that each assembly 200, 200 can be modified for the addition, between the generator G and the circuit for impedance matching 100, 100, of a frequency sensor CF. This is shown in FIG. 9, in the case of an application to the assembly 200.

(82) Indeed, with the frequency sensor and for an application involving a capacitively-coupled plasma reactor, said assembly 200, 200 can be used in a specific manner. In this implementation, a power supply signal comprising a single frequency is transmitted towards the capacitively-coupled plasma generator, and the frequency data from the frequency sensor CF is analysed, at its return from the capacitively-coupled plasma reactor, to determine whether the etching process in progress in the plasma reactor is completed or not.

(83) There are already various techniques to determine whether an etching process in progress in the plasma reactor is completed or not. One of these techniques relies on a frequency sensor to detect harmonics associated with plasma instabilities. However, because conventional circuits for impedance matching only accept a single frequency, the sensor is then arranged between the circuit for impedance matching and the plasma reactor, which greatly complicates the measurement.

(84) According to the present invention, a frequency sensor can be positioned at the output of the generator. Furthermore, the sensor can be a basic model.