CIRCUIT ASSEMBLY
20200315020 ยท 2020-10-01
Assignee
Inventors
- Adam ARMITAGE (Filton, Bristol, South Gloucestershire, GB)
- Thomas James HEATON (Bolton, Lancashire, GB)
Cpc classification
H05K3/0011
ELECTRICITY
H05K3/426
ELECTRICITY
H05K1/115
ELECTRICITY
H05K2201/09581
ELECTRICITY
H05K3/422
ELECTRICITY
H05K3/4644
ELECTRICITY
B29C44/5627
PERFORMING OPERATIONS; TRANSPORTING
H05K3/429
ELECTRICITY
International classification
H05K3/00
ELECTRICITY
H05K1/11
ELECTRICITY
Abstract
A circuit assembly (200) is disclosed comprising a substrate (210) and conducting layers (250) on opposing sides of the substrate (210), there being at least one via (220) through the substrate (210), which via (220) forms a conductive path between the conducting layers, wherein the substrate (210) is a foam substrate, and wherein the via (220) is provided with a solid dielectric lining (270) plated with a conducting material (250).
Claims
1. A circuit assembly comprising a substrate and conducting layers on opposing sides of the substrate, there being at least one via through the substrate, which via forms a conductive path between the conducting layers, wherein the substrate is a foam substrate, and wherein the via is provided with a solid dielectric lining plated with a conducting material.
2. A circuit assembly as claimed in claim 1 further comprising solid dielectric layers on the opposing sides of the substrate, and wherein the conducting layers are provided on the solid dielectric layers.
3. A circuit assembly as claimed in claim 2 wherein the solid dielectric layers are thin relative to the foam substrate.
4. A circuit assembly as claimed in claim 2 wherein the solid dielectric lining is provided as a pillar protruding from one of the solid dielectric layers.
5. A multilayer circuit assembly comprising at least two circuit assemblies as claimed in claim 1.
6. A method of forming a conducting via through a foam substrate, the foam substrate having two substantially parallel external surfaces, and the method comprising the steps of: i. machining to define a hole through the foam substrate; ii. providing a solid dielectric lining around the hole, the lining covering the foam substrate in the region of the hole so as to provide a via having a surface suitable for metal plating; and iii. metal plating the via to form the conducting via.
7. A method as claimed in claim 6, wherein the step of forming a solid dielectric lining comprises: i. filling the hole with a solid dielectric material; and ii. machining the solid dielectric material so as to form a via having an exposed surface suitable for electro-plating.
8. A method as claimed in claim 6, further comprising the steps of: a. machining a solid dielectric so as to provide a solid dielectric layer having at least one pillar protruding therefrom, which pillar generally corresponds to the hole defined in the foam substrate; b. bonding the machined solid dielectric to the foam substrate, such that the at least one pillar of solid dielectric material fills the hole defined in the foam substrate; and c. machining a hole through the pillar so as to define a via through the foam substrate having a solid dielectric lining.
9. A method as claimed in claim 8 further comprising the step of bonding a further solid dielectric layer to the foam substrate, such that each of the substantially parallel external surfaces of the foam substrate are covered with a solid dielectric layer.
10. A method as claimed in claim 9 wherein the solid dielectric layers are provided with a conducting layer on the outer side of the assembly.
11. A method as claimed in claim 7 wherein the step of filling the hole with a solid dielectric material comprises filling the hole with a curable dielectric material in liquid phase, and then curing the curable dielectric material to provide the solid dielectric material.
12. A method as claimed in claim 11 wherein the curable dielectric material is a polyurethane material
13. A method as claimed in claim 11 wherein the curable dielectric material is UV40.
14. A method as claimed in claim 6 further comprising the step of defining a circuit pattern in the conducting surface on at least one of the solid dielectric layers.
15. A method of manufacturing a multilayer circuit assembly, each of the layers having a conducting via, and the conducting vias being formed in accordance with the method of claim 6.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Embodiments of the invention will now be described by way of example only and with reference to the accompanying drawings, of which:
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
[0024]
[0025]
DETAILED DESCRIPTION
[0026] A part of a circuit assembly 200 according to a first embodiment of the invention and comprising a foamed dielectric substrate 210, in which a conducting via 220 is provided, is illustrated schematically in
[0027] Thin layers of a solid dielectric material 230 are bonded to the opposing upper and lower surfaces of the substrate 210 by bond film 240. In the present embodiment the solid dielectric material used is TLY-3, manufactured by Taconic, and has a thickness of 0.127 mm (or 5 thousandth's of an inch). Other solid dielectric materials can be used, and it is also possible to use an alternative thickness; although an appropriate thickness will reflect a balance between the need to achieve mass reductions (which would be impacted should the material become too thick) and the need to ensure that the material can be easily handled.
[0028] The surface of the solid dielectric is coated with a conducting layer 250 of copper. Conducting via 220 is seen in cross section. The conducting layer 250 is continuous through via 220 so as to form a continuous conducting path between the opposing surfaces of the assembly. The foam substrate 210, bond film 240 and solid dielectric layer 230 terminate a short distance away from the via 220, the via being lined with a solid dielectric material 270. The copper layer is provided on the surface of the solid dielectric material 270. In the present embodiment the solid dielectric material is UV40.
[0029] The fabrication of via 220 can be incorporated into mass-manufacturing processes, and its fabrication using suitable techniques for mass-manufacturing will now be described with reference to
[0030] In a first step of the fabrication of the circuit assembly, a sacrificial material 440, such as a sheet of rigid acrylic, is placed onto both surfaces of the structure. This sacrificial material protects the conducting copper layers 425 already present at the preliminary stage 400a. A hole, indicated at 450, is drilled through the structure at the intended locations of the vias, having a diameter, in the present embodiment, of 3 mm, larger than that required for the via in the final structure. The resulting structure 400b at the end of this first step is shown in
[0031] In a second step of the fabrication of the circuit assembly, a liquid phase curable dielectric material is applied to the structure 400b. For example, UV40, a standard polyurethane conformal coating manufactured by Humiseal is used in the present embodiment. In its liquid phase the dielectric spreads across the sacrificial material on the upper surface of the structure, and enters into the hole 450. Sufficient of the curable dielectric is applied to fill the hole 450, and once the hole is filled it can be cured. In the present case UV40 is cured by exposure to ultraviolet light. The length and intensity of the exposure will vary in dependence on the diameter and depth of the hole 450. In the present embodiment an arc lamp system was used and the UV40 was exposed to an intensity of around 0.5 W/cm.sup.2 for a few seconds. Once cured the hole 450 is filled with UV40 460 dielectric in its solid phase. The structure 400c at this stage is illustrated in
[0032] In a third step in the fabrication of the structure, the hole 450 is re-drilled, this time through the solid phase dielectric 460, and to the diameter required for the via in the eventual structure. In the present case a 1 mm hole is drilled through the solid phase dielectric, leaving a solid phase dielectric lining around the hole 460 having a thickness of 1 mm. The actual thickness of the solid dielectric lining is a matter of design choice but it will be appreciated that it should be sufficient, after machining tolerances are taken into account, to prevent any chemical contact with the foam substrate during subsequent electroplating of the via. The sacrificial material 440 is then removed from the surfaces of the structure, along with any solid phase dielectric present on those surfaces, leaving only the lining of the solid phase dielectric around the hole 450, and exposing the upper and lower copper-coated surfaces of the assembly. The foam substrate 410 is now no longer exposed on the sides of the hole 450. The structure 400d at this stage is illustrated in
[0033] A fifth step in the fabrication of the circuit assembly is electroplating the exposed surfaces of the structure 400d with copper. Both the upper and lower surfaces of the structure, already coated with copper, and the surface of the hole 450, are plated with copper. A standard electroplating process can be applied because the foam substrate 410 is no longer exposed, but covered by the solid phase cured dielectric material at the surfaces of the hole 450, or by the TLY-3 layer 420, on the upper and lower surfaces, that is already copper-coated. As will be appreciated, the resulting structure is that illustrated schematically in
[0034] It will be noted from
[0035] A part of a circuit assembly 500 in accordance with a second embodiment of the invention is illustrated schematically in cross-section in
[0036]
[0037]
[0038] Structure 700c can be electroplated in the normal way to form the assembly 500, illustrated in
[0039] This method also enables any number of conducting through vias to be formed in a circuit assembly, so that assemblies can be made having connections between conducting layers on either side of a foam substrate at any desired locations. In addition, this second method, described with reference to
[0040]
[0041] Finally, it will be appreciated that the description of example embodiments and their applications provided above is intended to demonstrate a number of principles for the design and operation of such embodiments, both explicit and implied. A number of variations and modifications to the above embodiments will be apparent to the skilled person and are possible without departing from the scope of the invention, which is defined in the accompanying claims.
[0042] For example, although specific materials, such as the dielectrics UV40 and TLY-3, and the Rohacell foam substrate, have been disclosed in the above, it will be appreciated that many solid foamed structures can be used as the foam substrate, whilst other dielectrics will also be suitable for use in place of the UV40 or TLY-3. Such materials will be known to the skilled person. By way of example, other curable liquid phase materials will be suited to use as UV40 in the above, provided that they are chemically compatible with the other steps in the manufacture of the circuit assembly, such as the electroplating step. The TLY-3 can be replaced by many other materials used in printed circuit boards. Other metals than copper may be used for the conducting parts of the circuit; and it will be appreciated that the sacrificial material, described in the above to be a rigid acrylic film, could be provided by many other materials including plastics or metals, or other thin films.
[0043] The specific examples of functionality and features described may be applied in any reasonably foreseeable selection or combination consistent with those design principles, and the scope of the present invention as claimed below is intended to include all such selections and combinations.