HEV e-drives with HV boost ratio and wide DC bus voltage range
10790763 ยท 2020-09-29
Assignee
Inventors
Cpc classification
H02M3/158
ELECTRICITY
Y02T10/72
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H02M7/483
ELECTRICITY
H02M3/156
ELECTRICITY
Y02T90/14
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H02M3/1584
ELECTRICITY
Y02T10/64
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H02M1/008
ELECTRICITY
Y02T10/70
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H02M1/0029
ELECTRICITY
B60L15/007
PERFORMING OPERATIONS; TRANSPORTING
B60L15/02
PERFORMING OPERATIONS; TRANSPORTING
H02M3/1588
ELECTRICITY
Y02T10/7072
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
Abstract
A system includes a bus, and a variable voltage converter (VVC) having a switch in series with a capacitor, and an inductor in parallel with the capacitor and switch, and configured such that operation of the switch in boost mode over a duty cycle range from 0 to less than 0.5 results in a corresponding voltage output to the bus from 0 to a maximum of the VVC.
Claims
1. A system comprising: a bus; a variable voltage converter (VVC) including a switch in series with a capacitor, and an inductor in parallel with the capacitor and switch, and configured such that operation of the switch in boost mode over a duty cycle range from 0 to less than 0.5 results in a corresponding voltage output to the bus from 0 to a maximum of the VVC; and a battery connected to power the VVC, wherein the VVC further includes another inductor connected between a terminal of the battery and the switch.
2. The system of claim 1, wherein the VVC includes another switch in series with the switch and the boost mode includes controlling the switches in a complimentary fashion.
3. The system of claim 1 further comprising an inverter connected to receive voltage output to the bus and to generate phase voltage approaching one-half of the voltage output to the bus such that a modulation index of the inverter approaches 1.
4. The system of claim 1, wherein the voltage output includes values less than voltage of the battery.
5. The system of claim 1 further comprising an inverter connected to receive voltage output to the bus and to generate phase current output in a range independent of current output of the battery.
6. A system comprising: a battery; an inverter; and a variable voltage converter (VVC) connected between the battery and inverter, the VVC including a pair of switches, a capacitor in series with one of the switches, and an inductor in parallel with the capacitor and the one of the switches, and configured such that operation of the switches in boost mode over a duty cycle range from 0 to less than 0.5 results in a corresponding voltage output to the inverter in a range from 0 to a maximum of the VVC, wherein the inverter is configured to generate phase voltage approaching one-half of the voltage output to the inverter such that a modulation index of the inverter approaches 1.
7. The system of claim 6, wherein the boost mode includes controlling the switches in a complimentary fashion.
8. The system of claim 6, wherein the inverter is further configured to generate phase current output in a range independent of current output of the battery.
9. A system comprising: a bus; a variable voltage converter (VVC) including a pair of switches, a capacitor in series with one of the switches, and an inductor in parallel with the capacitor and the one of the switches, and configured such that operation of the switches in boost mode over a duty cycle range from 0 to less than 0.5 results in a corresponding voltage output to the bus from battery voltage to a maximum of the VVC; an inverter connected to receive voltage output to the bus and to generate phase voltage to power an electric machine; and a battery connected to power the VVC such that the phase voltage generated by the inverter approaches voltage of the battery, wherein the inverter is further configured to generate phase current output independent of current output of the battery such that a power factor of the inverter approaches 1.
10. The system of claim 9, wherein the boost mode includes controlling the switches in a complimentary fashion.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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(5)
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(9)
(10)
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(12)
(13)
DETAILED DESCRIPTION
(14) Embodiments of the present disclosure are described herein. It is to be understood, however, that the disclosed embodiments are merely examples and other embodiments may take various and alternative forms. The figures are not necessarily to scale; some features could be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention. As those of ordinary skill in the art will understand, various features illustrated and described with reference to any one of the figures may be combined with features illustrated in one or more other figures to produce embodiments that are not explicitly illustrated or described. The combinations of features illustrated provide representative embodiments for typical applications. Various combinations and modifications of the features consistent with the teachings of this disclosure, however, could be desired for particular applications or implementations.
(15) A hybrid electric vehicle may include an inverter electrically connected between a traction battery and one or more electric machines, e.g., an electric motor, a generator and so on. Each of the electric machines may operate in a motoring and/or generating mode. In the motoring mode, the electric machine may consume power or energy to propel the vehicle. In the generating mode, the electric machine may produce, or generate, power or energy to charge the traction battery or power other vehicle subsystems.
(16) The inverter may be configured to convert DC output of the traction battery to AC output compatible with the electric machines. The inverter may be further configured to convert AC power output by the electric machines to DC power to charge the traction battery and/or to power other vehicle systems. A voltage converter connected electrically between the traction battery and the inverter may be configured to step up, boost, and/or step down, buck, DC energy transferred between the battery and the inverter.
(17) In one example, the voltage converter output may be electrically coupled to the input of the inverter via a DC bus capacitor, a bulk capacitor configured to smooth DC bus voltage. In some instances, minimum voltage across the DC bus, V.sub.dc, may correspond to the traction battery voltage, V.sub.batt, such that when the battery voltage is greater than the voltage required by the inverter to output a requested phase-to-phase (hereinafter, phase-phase) voltage, V.sub.ph, to the electric machine, at least a portion of the DC bus voltage, V.sub.dc, may be unused thereby causing inefficient system operation, e.g., resulting in high inverter switching and conduction losses.
(18) The stator winding voltage of the electric machine may be proportional to the electric machine rotor speed, such that operating the electric machines at low rotor speed may necessitate stator voltage to be less than a predefined threshold. Amplitude of the phase-phase voltage, V.sub.ph, output by the inverter may be defined with respect to the DC bus voltage, V.sub.dc, such that:
(19)
where m is a modulation index of the inverter.
(20) According to Equation (1), when a minimum DC bus voltage, V.sub.dc at a given time corresponds to the battery voltage, V.sub.batt at a same time, low phase-phase voltage, V.sub.ph, output by the inverter may be achieved by lowering the inverter modulation index, m. However, operating the inverter at a low modulation index, m may result in distortion of the current signal output by the inverter to the electric machine or cause other system operation inefficiencies.
(21) Some variable voltage converters (VVCs) may be configured to increase range of the DC bus voltage, V.sub.dc. For instance, the VVC, whose switches operate in a boost mode, may be configured to output DC bus voltage that ranges between zero volts (V) and a predefined maximum boost voltage of the VVC. In these VVC arrangements, DC bus voltage at the output of the VVC may be adjusted to meet DC bus voltage requirement for a variety of different motor/generator speeds. Said another way, the VVC, whose switches operate in a boost mode, may be configured to output low DC bus voltage such that the motor/generator runs at a low speed, while maximizing the inverter modulation index, m, e.g., by minimizing inverter power losses and phase current total harmonic distortion (THD). Additionally or alternatively, the VVC may be configured to provide voltage boost ratio up to a maximum boost ratio of the VVC while the switches of the VVC are operated at a duty cycle, D less than 0.5, i.e., 50%.
(22)
(23) In one example, the inverter 106 may include a plurality of power switches 108 configured to provide the three-phase voltages/currents to the electric machines 104. When switching, the power switches 108 may be configured to transfer voltage from a high-voltage DC bus to a corresponding phase input of the electric machines 104. A first pair of switches 108a may be configured to selectively couple a DC bus power and return terminals to a first phase input of the electric machine 104. A second and third pair of switches 108b, 108c may selectively couple corresponding DC bus power and return terminals to the second and third phase inputs of the electric machine 104, respectively.
(24) The switches 108 may include one or more power switching devices. As one example, each of the switches 108 may include one or more IGBTs, MOSFETs, and other solid-state switching devices. Each switch 108 may further include a corresponding control input (e.g., gate input) by which the switch 108 may be operated to switch on and off, or closed and open. Corresponding control inputs of each switch 108 may be electrically coupled to one or more controllers of the vehicle. Accordingly, each of the phase inputs of the electric machine 104 may be selectively coupled to the terminals of the traction battery 102 by a pair of the switches 108. As one example, the switches 108 may be operated such that only one switch 108 of each of the pairs 108a, 108b, and 108c is switched on at a given time.
(25) A variable voltage converter (VVC) 116 may be connected electrically between the traction battery 102 and the inverter 106. The VVC 116 may include a plurality of switches 114 and may be configured to step up, boost and/or step down, buck, DC voltage transferred between the battery 102 and the inverter 106. A capacitor 112 between the traction battery 102 and the VVC 116 may be configured to smooth out switching noise of the switches 114 such that input from the VVC 116 to the traction battery 102 is DC. In one example, the VVC 116 may include an inductor 118 configured to store electric energy when at least one of the switches 114 are turned on and release the stored electric energy when at least one of the switches 114 are turned off. In another example, the VVC 116 may be electrically coupled to the inverter 106 via a DC bus capacitor 110, or a bulk capacitor configured to smooth DC bus voltage that serves as the voltage being input to or output by the inverter 106. In some instances, voltage measured across the DC bus capacitor 110 may be indicative of a DC bus voltage, V.sub.dc.
(26) The switches S.sub.1 114a and S.sub.2 114b may operate complementary to one another to minimize a possibility of a short-circuit occurrence within the traction battery 102. In one example, the switches S.sub.1 114a and S.sub.2 114b may be said to operate in the buck mode, when the switch S.sub.1 114a operates independently and the switch S.sub.2 114b is activated by a complementary signal. In another example, the switches S.sub.1 114a and S.sub.2 114b may be said to operate in the boost mode, when the switch S.sub.2 114b operates independently and the switch S.sub.1 114a is activated by a complementary signal.
(27) During certain operating scenarios, a requested phase-phase voltage, V.sub.ph to be output by the inverter 106 may be less than a predefined threshold. However, as described in reference to at least Equations (2), (3), and (4), achieving a desired phase-phase voltage, V.sub.ph when the battery voltage, V.sub.batt is greater than 1.15 the desired phase-phase voltage, V.sub.ph, may affect system performance by upsetting the inverter operating efficiency or causing a degradation in output signal quality. On the other hand, providing the DC bus voltage, V.sub.dc at the input to the inverter 106 that is greater than the traction battery 102 voltage, V.sub.batt, may stress the VVC 116 causing undue component wear and so on.
(28) In one example, the battery 102 output power, P.sub.batt may be expressed as follows:
P.sub.batt=V.sub.battI.sub.batt(2)
where I.sub.batt represents output current of the battery 102. The inverter 106 output power, Paw may be such that:
(29)
where m represents modulation index, I.sub.ph represents the phase current output by the inverter 106, e.g., as measured at the motor 104, and pf represents a power factor, or a ratio of real power flowing to the inverter 106 to the apparent power of the inverter 106. To preserve power efficiency of the power conversion system, output power of the battery 102 must be approximately equal to the output power of the inverter 106 and the Equations (2) and (3) may be combined such that:
(30)
From Equation (4) it follows that, when the power factor, pf and the modulation index, m are approximately equal to one (1) and the DC bus voltage, V.sub.dc is approximately equal to the battery voltage, V.sub.batt, the battery current, I.sub.batt may be approximately equal to the phase current I.sub.ph output by the inverter 106. Further from Equation (4), achieving the DC bus voltage, V.sub.dc that is greater than the battery voltage, V.sub.batt, may necessitate increasing the battery current, I.sub.batt.
(31) Signal modulation techniques may include methods for varying one or several characteristics of a modulation signal, x.sub.c(t). Continuous modulation may be defined as:
x.sub.c(t)=m cos(.sub.ct+(t))(5)
where .sub.c is a fundamental frequency of the load, and (t) is an instantaneous phase angle.
(32) As shown, for example in Equation (1), the modulation index, m, may be a ratio of phase-phase voltage, V.sub.ph, output by the inverter with respect to the DC bus voltage, V.sub.dc. Modulation index, m may be a value between zero (0) and one (1). For example, the modulation index, m, that is approximately equal one (1) may be indicative of a minimum distortion within the current signal output by the inverter 106. As another example, the modulation index, m, that is approaching zero (0) may be indicative of a maximum distortion within the output signal. According to Equation (1), responsive to modulation index, m being approximately equal to one (1), the phase-phase voltage, V.sub.ph output by the inverter 106 may be approximately equal to 0.866 of the DC bus voltage, V.sub.dc and/or the DC bus voltage, V.sub.dc may be approximately equal to 1.15 the phase-phase voltage, V.sub.ph output by the inverter 106.
(33) The inverter 106 may be controlled using sinusoidal pulse width modulation (SPWM) or another modulation method. In one example, the inverter 106 may provide an AC output voltage based on a DC input from the VVC 116. The inverter 106 may, for instance, operate the switches 108 to output one or more square pulses of voltage per half cycle to simulate an AC sine wave. In one example, the inverter 106 may be configured to adjust, or modulate, widths of the pulses to regulate the output voltage. As another example, the inverter 106 may be configured to produce a plurality of pulses per one-half cycle of the switches 108. The pulses near the edges of the half-cycle may be narrower than the pulses near the center of the half-cycle such that the pulse widths are proportional to the corresponding amplitude of a sine wave at that portion of the cycle. As still another example, the inverter 106 may be configured to change the effective output voltage by increasing or decreasing the widths of all pulses while maintaining proportionality of the pulses with respect to one another causing output voltage signal to maintain sinusoidal shape.
(34) The inverter 106 may use carrier-based pulse width modulation, meaning the inverter 106 may generate one or more output voltages by applying predefined modulation signals. In sinusoidal PWM, the modulation signal may be sinusoidal, such that a peak of the modulating signal may be less than the peak of the carrier signal.
(35)
(36) The VVC 202-A of
(37) Accordingly, the switches S.sub.1 114a and S.sub.2 114b of the VVC 202-A may be said to operate in a boost mode, when the first switch S.sub.1 114a operates independently and the second switch S.sub.2 114b is activated by a complementary signal. The switches S.sub.1 114a and S.sub.2 114b of the VVC 202-B may be said to operate in a buck mode, when the second switch S.sub.2 114b operates independently and the first switch S.sub.1 114a is activated by a complementary signal.
(38) In some instances, responsive to the switches S.sub.1 114a and S.sub.2 114b of the VVC 202-A operating in the boost mode at a duty cycle, D less than 0.5, the VVC 202-A may be configured to output a greater range of the DC bus voltages, V.sub.dc that are less than the battery voltage, V.sub.batt, as well as, output a maximum boost output voltage of the VVC 202. Thus, the VVC 202-A may be configured to output, independent of the battery voltage, V.sub.batt, the DC bus voltage, V.sub.dc at the input to the inverter 106 that is approximately equal to 1.15 times the phase-phase voltage, V.sub.ph being requested at the inverter 106 output, thereby maintaining value of the modulation index, m being approximately equal to one (1).
(39) The VVC 202-B of
(40)
(41)
where D may be indicative of a duty cycle of the first switch S.sub.1 114a of the VVC 202-A of
(42) Accordingly, a curve 406 may be indicative of a change in the voltage boost ratio, A with respect to a change in the duty cycle, D consistent with relative relationship of the DC bus voltage, V.sub.dc and the battery voltage, V.sub.batt described in Equation (6). Specifically, operating the switch S.sub.1 114a of the VVC 202-A at a duty cycle, D approximately equal to
(43)
may cause the voltage boost ratio, A to be approximately equal to one (1), i.e., the input voltage of the VVC 202-A may be approximately equal to the output voltage of the VVC 202-A. Additionally or alternatively, operating the switch S.sub.1 114a of the VVC 202-A at a duty cycle, D less than 0.333 may cause the voltage boost ratio, A to be less than one (1), i.e., the input voltage of the VVC 202-A may be greater than the output voltage of the VVC 202-A and the VVC 202-A may, accordingly, operate in the buck mode. Still further, operating the switch S.sub.1 114a of the VVC 202-A at a duty cycle, D greater than 0.333 may cause the voltage boost ratio, A to be greater than one (1), i.e., the output voltage of the VVC 202-A may be greater than the input voltage of the VVC 202-A and the VVC 202-A may, accordingly, operate in the boost mode.
(44) In one example, for a given traction battery voltage, V.sub.batt, the switch S.sub.1 114a may be operated at a first duty cycle, D.sub.X, where D.sub.X may be 0<D.sub.X<0.1, to cause the VVC 202 to provide a first voltage boost ratio, A.sub.X, where A.sub.X may be 0<A.sub.X<0.125. As another example, at a same traction battery voltage, V.sub.batt, the switch S.sub.1 114a may be operated at a second duty cycle, D.sub.Y, where D.sub.Y may be D.sub.X<D.sub.Y<0.333, to cause the VVC 202 to provide a second voltage boost ratio, A.sub.Y, where A.sub.Y may be A.sub.X<A.sub.Y<1. As still another example, for a same traction battery voltage, V.sub.batt, the VVC 202 voltage boost ratio may approach a predefined voltage boost ratio, e.g., six (6), when the switch S.sub.1 114a is operated at a predefined duty cycle, D.sub.2, where 0.333<D.sub.z<0.5.
(45) Said another way, the VVC 202 may operate in the buck mode, responsive to the duty cycle, D of the switch 114a being less than 0.333, and may operate in the boost mode, responsive to the duty cycle, D of the switch 114 being both greater than 0.333, i.e., 33%, and less than 0.5, i.e., 50%. Therefore, the DC bus voltage, V.sub.dc may be greater than or equal to the battery voltage, V.sub.batt while the switch 114a is operated at a duty cycle, D less than 0.5, i.e., less than 50%.
(46) Thus, the VVC 202 may be configured to provide the DC bus voltage, V.sub.dc, having an expanded range between the DC bus voltage value approaching zero volts and the DC bus voltage value according to a predefined maximum output voltage greater than the battery voltage, V.sub.batt. Furthermore, the VVC 202 may provide the expanded DC bus voltage range while operating the switches 114 at a predefined duty cycle, D, e.g., D<0.5.
(47)
(48) The voltage boost ratio, A may be defined as
(49)
where a duty cycle, D is indicative of the duty cycle of the switch S.sub.2 114b. According to Equation (7), the voltage boost ratio, A may be such that A>1 for all values of the duty cycle, D of the switch S.sub.2 114b. Additionally or alternatively, consistent with Equation (7), the duty cycle, D of the switch S.sub.2 114b may be such that D<0.5.
(50)
(51) In some instances, the voltage boost ratio, A of the voltage converter 302 may be much higher than that of the VVC 116. As one example, for a given traction battery voltage, V.sub.batt at a first duty cycle, D.sub.H, e.g., 0.3<D.sub.H<0.4, the voltage converter 302 may be configured to provide a first voltage boost ratio, A.sub.E and the VVC 116 may be configured to provide a second voltage boost ratio, A.sub.U, where A.sub.E and A.sub.U may be such that 2<A.sub.E<4, 1<A.sub.U<2, or A.sub.E>A.sub.U. As another example, for a same traction battery voltage, V.sub.batt at a second duty cycle, D.sub.K, e.g., 0.4<D.sub.K<0.5, the voltage converter 302 may be configured to provide a third voltage boost ratio, A.sub.G and the VVC 116 may be configured to provide a fourth voltage boost ratio, A.sub.V, where A.sub.G and A.sub.V may be such that A.sub.G>12, 2<A.sub.V<4.
(52)
(53)
(54) In one example, when value of the battery voltage, V.sub.batt 502 is approximately 200V and the switch S.sub.1 114a is operated at the duty cycle, D approximately equal to 0.083, i.e., 8.3%, the DC bus voltage, V.sub.dc 504 of approximately 20V may be generated by one of the VVC 202-A and 202-B having expanded range of the DC bus voltages, as described in reference to
(55) Furthermore, the VVC 202-A and 202-B and the corresponding inverter 106 of
(56) In one example, graphs of current illustrated in
(57)
(58) In one example, when value of the battery voltage, V.sub.batt 602 is approximately 200V, the DC bus voltage, V.sub.dc 604 of approximately 600V may be generated by one of the voltage converters 202-A, 202-B having expanded range boost voltages, as described in reference to
(59)
(60) In one example, graphs of current illustrated in
(61) The processes, methods, or algorithms disclosed herein may be deliverable to or implemented by a processing device, controller, or computer, which may include any existing programmable electronic control unit or dedicated electronic control unit. Similarly, the processes, methods, or algorithms may be stored as data and instructions executable by a controller or computer in many forms including, but not limited to, information permanently stored on non-writable storage media such as ROM devices and information alterably stored on writeable storage media such as floppy disks, magnetic tapes, CDs, RAM devices, and other magnetic and optical media. The processes, methods, or algorithms may also be implemented in a software executable object. Alternatively, the processes, methods, or algorithms may be embodied in whole or in part using suitable hardware components, such as Application Specific Integrated Circuits (ASICs), Field-Programmable Gate Arrays (FPGAs), state machines, controllers or other hardware components or devices, or a combination of hardware, software and firmware components.
(62) The words used in the specification are words of description rather than limitation, and it is understood that various changes may be made without departing from the spirit and scope of the disclosure. As previously described, the features of various embodiments may be combined to form further embodiments of the invention that may not be explicitly described or illustrated. While various embodiments could have been described as providing advantages or being preferred over other embodiments or prior art implementations with respect to one or more desired characteristics, those of ordinary skill in the art recognize that one or more features or characteristics may be compromised to achieve desired overall system attributes, which depend on the specific application and implementation. These attributes may include, but are not limited to cost, strength, durability, life cycle cost, marketability, appearance, packaging, size, serviceability, weight, manufacturability, ease of assembly, etc. As such, embodiments described as less desirable than other embodiments or prior art implementations with respect to one or more characteristics are not outside the scope of the disclosure and may be desirable for particular applications.