SOLID OXIDE CELL (SOC) CHIP WITH DOUBLE-ELECTROLYTE STRUCTURE AND PREPARATION METHOD THEREOF

Abstract

A solid oxide cell (SOC) chip with the double-electrolyte structure and a preparation method thereof are provided. The SOC chip includes two electrolytes, where the two electrolytes are separated by an inner electrode sandwiched between the two electrolytes; a plurality of regularly arranged gas paths is provided in the inner electrode; at least two sides of the inner electrode are covered with side sealing members; outer surfaces of the electrolytes are provided with outer surface elements; the outer surface elements include an intermediate layer, an outer electrode, an inner electrode plate, and an outer electrode plate; the inner electrode is connected to the inner electrode plate; and the outer electrode is connected to the outer electrode plate. The side sealing members each are provided with a multi-layer structure, including an inner sub-layer and an outer sub-layer.

Claims

1. A solid oxide cell (SOC) chip with a double-electrolyte structure, comprising two electrolytes, wherein the two electrolytes are separated by an inner electrode sandwiched between the two electrolytes; a plurality of regularly arranged gas paths is provided in the inner electrode; at least two sides of the inner electrode are covered with side sealing members; outer surfaces of the two electrolytes are provided with outer surface elements; the outer surface elements comprise an intermediate layer, an outer electrode, an inner electrode plate, and an outer electrode plate; the inner electrode is connected to the inner electrode plate; the outer electrode is connected to the outer electrode plate; and the side sealing members each comprise a plurality of sub-layers; at least one of the plurality of sub-layers is a dense and tight sub-layer; and at least one rough and non-tight sub-layer is provided between the dense and tight sub-layer and a side of the SOC chip.

2. The SOC chip with the double-electrolyte structure according to claim 1, wherein each of the plurality of regularly arranged gas paths in the inner electrode has an equivalent cross-sectional diameter of 20-200 m.

3. (canceled)

4. The SOC chip with the double-electrolyte structure according to claim 1, wherein the outer surface elements further comprise a plurality of outer collectors covering an outer surface of the outer electrode; and a conductivity of each of the plurality of outer collectors is not less than a conductivity of the outer electrode.

5. The SOC chip with the double-electrolyte structure according to claim 1, wherein the outer surface elements further comprise a protective layer; and the protective layer covers at least one of the outer surface elements.

6. The SOC chip with the double-electrolyte structure according to claim 1, wherein the inner electrode and the inner electrode plate are connected through an inner bus bar; and a conductivity of the inner bus bar is not less than a conductivity of the inner electrode.

7. The SOC chip with the double-electrolyte structure according to claim 6, wherein the inner bus bar is located between the side sealing members and the side of the SOC chip.

8. The SOC chip with the double-electrolyte structure according to claim 6, wherein the inner bus bar is at least partially provided on a surface of a side of the electrolyte where the outer electrode is located, and the inner bus bar is connected to the inner electrode through an opening of the electrolyte; and a sealing structure is provided to cover a surface of the opening of the electrolyte to completely cover and seal a junction of the inner bus bar and the inner electrode at the opening of the electrolyte.

9. The SOC chip with the double-electrolyte structure according to claim 1, wherein the SOC chip is in a long strip shape gradually narrowed from an outer electrode region in a central part of the SOC chip to an end surface of the SOC chip provided with a gas path inlet and outlet, with a tapered edge at an angle of 5-60 with a straight edge of the outer electrode region in the central part of the SOC chip.

10. A preparation method of the SOC chip with the double-electrolyte structure according to claim 1, comprising the following steps: (1) substrate preparation: preparing thin film substrates of the inner electrode and the electrolytes separately: adding an appropriate additive and an appropriate solvent in proportion in each component constituting the inner electrode and the electrolytes, and conducting a tape casting operation; (2) substrate lamination: aligning and laminating an electrolyte substrate, an inner electrode substrate with the plurality of regularly arranged gas paths, and an inner electrode substrate without the plurality of regularly arranged gas paths in a predetermined order to form a substrate laminate; putting the substrate laminate into a vacuum bag for vacuuming and sealing; and subjecting the substrate laminate in the vacuum bag to a high-temperature pressing to form a fused laminate; (3) cutting: putting the fused laminate into a cutting machine, and cutting the fused laminate into an SOC chip blank with a specified design shape; (4) sintering: putting the SOC chip blank into a high-temperature furnace, and sintering the SOC chip blank according to a predetermined heat treatment regime, such that the SOC chip blank is shrank to form a high-strength SOC chip, wherein during a heat treatment, a gas path precursor is gasified and escapes to leave regular and even gas paths in the inner electrode of the SOC chip; (5) preparation of the intermediate layer: preparing, after the sintering, the intermediate layer on the two electrolytes of the SOC chip by a high-temperature heat treatment; (6) reduction: putting, after the preparation of the intermediate layer, the SOC chip into a reduction furnace to reduce a nickel oxide in the inner electrode into nickel; (7) preparation of the outer surface elements: printing, after the reduction, the outer surface elements on an outer surface of the SOC chip; (8) preparation of the side sealing members: preparing, after the preparation of the outer surface elements, the side sealing members: preparing a rough and non-tight inner side sealing layer first, and preparing a dense and tight outer side sealing layer on the rough and non-tight inner side sealing layer after the rough and non-tight inner side sealing layer is dried; (9) heat treatment: subjecting, after the preparation of the outer surface elements and the side sealing members, the SOC chip to the heat treatment, such that the outer surface elements are firmly connected to respective attachments, and at least one sub-layer of the side sealing members is densified; and (10) electrode strengthening.

11. The preparation method according to claim 10, wherein each of the plurality of regularly arranged gas paths in the inner electrode has an equivalent cross-sectional diameter of 20-200 m.

12. The preparation method according to claim 10, wherein the outer surface elements further comprise a plurality of outer collectors covering an outer surface of the outer electrode; and a conductivity of each of the plurality of outer collectors is not less than a conductivity of the outer electrode.

13. The preparation method according to claim 10, wherein the outer surface elements further comprise a protective layer; and the protective layer covers at least one of the outer surface elements.

14. The preparation method according to claim 10, wherein the inner electrode and the inner electrode plate are connected through an inner bus bar; and a conductivity of the inner bus bar is not less than a conductivity of the inner electrode.

15. The preparation method according to claim 14, wherein the inner bus bar is located between the side sealing members and the side of the SOC chip.

16. The preparation method according to claim 14, wherein the inner bus bar is at least partially provided on a surface of a side of the electrolyte where the outer electrode is located, and the inner bus bar is connected to the inner electrode through an opening of the electrolyte; and a sealing structure is provided to cover a surface of the opening of the electrolyte to completely cover and seal a junction of the inner bus bar and the inner electrode at the opening of the electrolyte.

17. The preparation method according to claim 10, wherein the SOC chip is in a long strip shape gradually narrowed from an outer electrode region in a central part of the SOC chip to an end surface of the SOC chip provided with a gas path inlet and outlet, with a tapered edge at an angle of 5-60 with a straight edge of the outer electrode region in the central part of the SOC chip.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0078] FIG. 1 is a cross-sectional view of a typical SOC in the prior art;

[0079] FIG. 2 is a top view of an SOC chip according to a first embodiment of the present disclosure;

[0080] FIG. 3 is a side view of an end of the SOC chip according to the first embodiment of the present disclosure;

[0081] FIG. 4 is a section view of the SOC chip according to the first embodiment of the present disclosure;

[0082] FIG. 5 is a top view of an SOC chip according to a second embodiment of the present disclosure;

[0083] FIG. 6 is an exploded view of the SOC chip according to a second embodiment of the present disclosure;

[0084] FIG. 7 is a top view of an SOC chip according to a third embodiment of the present disclosure; and

[0085] FIG. 8 is a top view of an SOC chip according to a fourth embodiment of the present disclosure.

[0086] Reference Numerals: 1. electrolyte; 2. inner electrode; 201. supporting inner electrode; 202. active inner electrode; 3. outer electrode; 4. side sealing member; 401. inner side sealing layer; 402. outer side sealing layer; 5. intermediate layer; 6. inner electrode plate: 7. outer electrode plate; 8. inner bus bar; 9. outer bus bar; 10. sealing structure; 11. gas path; 12. outer collector; 13. protective layer; 14. inner collector; and 15. connecting piece.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0087] The technical solutions of the present disclosure are described in further detail below with reference to the specific examples and accompanying drawings, but the present disclosure is not limited thereto.

First Embodiment

[0088] As shown in FIGS. 2 and 3, the first embodiment provides an SOC chip. The SOC chip has a rectangular strip structure, and includes two electrolytes 1 separated in a thickness direction. Inner electrode 2 is provided between the two electrolytes 1. Two sides of the inner electrode 2 are respectively covered by side sealing members 4. Outer surfaces of the electrolytes 1 are provided with outer surface elements, including intermediate layer 5, outer electrode 3, inner electrode plate 6, and outer electrode plate 7. The inner electrode 2 is connected to the inner electrode plate 6, and the outer electrode 3 is connected to the outer electrode plate 7.

[0089] As shown in FIG. 4, regularly arranged micro gas paths 11 are provided inside the inner electrode 2. The side sealing members 4 each include two sub-layers, namely inner side sealing layer 401 and outer side sealing layer 402. The inner side sealing layer 401 and the outer side sealing layer 402 are made of materials different from those of the electrolytes 1 and the inner electrode 2. The outer side sealing layer 402 is dense and tight, while the inner side sealing layer 401 is rough and non-tight. The inner electrode and the outer electrode are provided with respective electrode plates to facilitate the connection between the SOC chip and the outside. The outer electrode plate 7 and the outer electrode 3 are connected through outer bus bar 9. The inner electrode 2 includes supporting inner electrode 201 and active inner electrode 202. The inner electrode 2 and the inner electrode plate 6 are connected through inner bus bar 8. An outer surface of the outer electrode 3 is provided with outer collector 12. The outer collector 12 and the outer electrode 3 are covered with protective layer 13. The inner electrode plate 6, the outer electrode plate 7, the outer electrode 3, and the outer bus bar 9 are all located on the intermediate layer 5 and do not come into direct contact with the electrolyte 1. In the first embodiment, the inner electrode plate 6 and the outer electrode plate 7 are arranged at a same end of the SOC chip, and the inner collector 14 is buried in the side sealing member 4.

[0090] A preparation process of the SOC chip in the first embodiment includes the following steps.

[0091] 1) Substrate preparation. There are three types of substrates: a supporting inner electrode substrate, an active inner electrode substrate, and an electrolyte substrate. The preparation of each substrate is as follows.

[0092] (a) Slurry preparation. An appropriate amount of an organic additive and a solvent, such as polyvinyl butyral (PVB), triethanolamine, and ethanol, is added to a fine ceramic powder such as 8YSZ, NiO, and GDC. Ball milling and mixing are conducted, such that the fine ceramic powder is evenly dispersed to form stable slurry. In typical slurry of the active inner electrode, a weight ratio of the solid active components is 8YSZ:NiO:GDC=5:4:1, allowing for a variation range of about 20%. In typical slurry of the supporting inner electrode, a weight ratio of the solid active components is 8YSZ:NiO:Al.sub.2O.sub.3=3.5:5.5:1, allowing for a variation range of about 20%. The content of the NiO in the slurry of the supporting the inner electrode is slightly higher, such that the inner electrode has a higher conductivity after reduction. In typical slurry of the electrolyte, the solid active component is 8YSZ or ScYSZ.

[0093] (b) Substrate preparation. Thin films of the electrolyte and the inner electrode are prepared from the slurry prepared in Step (a) through a tape casting machine. A typical electrolyte film has a thickness of 5-40 m, and a typical inner electrode film has a thickness of 100-200 m. The film is dried at 60 C. for 2 h and cut to a sheet referred to as a substrate with a certain size such as 270 mm220 mm. Correspondingly, the substrate prepared from the active inner electrode slurry is referred to as the active inner electrode substrate, the substrate prepared from the supporting inner electrode slurry is referred to as the supporting inner electrode substrate, and the substrate prepared from the electrolyte slurry is referred to as the electrolyte substrate.

[0094] (c) Preparation of a gas path precursor. The gas path precursor of the SOC chip is prepared on the supporting inner electrode substrate. A typical gas path precursor is made of slurry including graphite, starch, or other polymer powder such as polytetrafluoroethylene (PTFE) or polyvinyl chloride (PVC). The content of the solid powder such as graphite, starch, PTFE or PVC in the slurry is preferably 5-30%, and the solvent is made of terpineol. The method for preparing the gas path precursor on the inner electrode substrate includes a well-known method in the industry, such as screen printing or high-temperature pressing.

[0095] 2) Substrate lamination. According to the order shown in FIG. 4, the electrolyte substrate, the active inner electrode substrate, the supporting inner electrode substrate with the gas path precursor, and the supporting inner electrode substrate without the gas path are aligned and laminated to form a substrate laminate. The substrate laminate is put into a vacuum bag for vacuuming and sealing. The vacuum bag with the substrate laminate is put into an isostatic press, and is subjected to a water bath of 75 C. and 20 MPa for 5 min. After the water bath, the substrate laminate is taken out. During isostatic pressing, the various substrates in the substrate laminate are fused with each other to form a fused laminate. The fused laminate has a thickness of about 2 mm, and each constituent layer cannot be partially or completely separated into a single substrate.

[0096] 3) Cutting. The fused laminate prepared in the above step is put into a cutting machine and cut into an SOC chip blank with a specified design shape through a cutting die. Typically, a single fused laminate can be cut into three 65 mm/260 mm SOC chip blanks.

[0097] 4) Sintering. The SOC chip blank is put into a high-temperature furnace, and is subjected to high-temperature sintering according to a suitable heat treatment regime. After high-temperature sintering, such as sintering at 1,400 C. for 2 h, the size of the SOC chip blank shrinks by 20-30%, thus forming a high-strength SOC chip. During the heat treatment process, due to the vaporization and escape of the gas path precursor, regular and even micro gas paths are left in the SOC chip.

[0098] 5) Preparation of the intermediate layer. The intermediate layer is printed on the electrolyte on either side of the SOC chip formed by sintering. Typically, the intermediate layer is made of doped ceria, such as GDC or SDC, through a printing method, such as a well-known screen printing process in the industry. The SOC chip printed with the intermediate layer is dried at 90 C. for 1 h. Then, the SOC chip is put into a high-temperature furnace, and the furnace temperature is raised to 1,300 C. After 2 h of sintering, the furnace temperature is dropped, at a rate not exceeding 5 C./min. When the furnace temperature drops to room temperature, the SOC chip is taken out. At this point, the intermediate layer on either side is firmly sintered onto the outer surface of the electrolyte of the SOC chip.

[0099] 6) Reduction. After the preparation of the intermediate layer, the SOC chip is put into a reduction furnace, and is subjected to reduction at 680 C. for 6 h in a reducing atmosphere formed by a mixture of hydrogen and nitrogen, including 70-100% of hydrogen and 0-30% of nitrogen. After the reduction, the nickel oxide in the inner electrode of the SOC chip is reduced to nickel. Thus, an additional gas path is formed in the inner electrode. In addition, since nickel is an electronic conductor, the inner electrode after reduction has the ability to conduct electricity. Therefore, the inner electrode can provide a high-temperature region for the electrochemical reaction and an electron transfer channel between the inner electrode plates for external connection.

[0100] 7) Preparation of the outer surface elements. After the reduction, the outer surface elements, including the outer collector, the outer electrode, the outer electrode plate, the inner electrode plate, the outer electrode bus bar, the inner electrode bus bar, and the protective layer, are printed on the outer surface of the SOC chip. These elements all can be printed on the intermediate layer, or partially or completely printed on the surface of the electrolyte. Due to the fact that the SOC chip is provided with opposite electrolytes on the two sides, the outer surface elements located on one side of the SOC chip can be prepared sequentially after the preparation of the outer surface elements located on the other side of the SOC chip.

[0101] Among the outer surface elements of the SOC chip, the outer collector, the outer electrode plate, the inner electrode plate, the outer electrode bus bar, and the inner electrode bus bar are made of materials that the same or similar. For example, they include 5-20% of doped ceria (SDC or GDC) and 80-95% of silver, and can be printed through the same screen in the same step. The outer electrode includes 30-55% of doped ceria (SDC or GDC) and 45-70% of silver. The outer electrode can be printed before or after the printing of the outer collector, but there needs to be a hot air drying process at 90 C. for 1 h between the printing of the outer electrode and the printing of the outer collector. The protective layer includes aluminum oxide, zirconia, silicon dioxide, or a compound including such an oxide, preferably aluminum oxide. The slurry prepared from such an oxide is printed or sprayed on other outer surface element after drying. The slurry used in this step may include a pore forming agent that takes a mixture of ethanol and terpineol as the solvent and includes about 0-10% of graphite.

[0102] 8) Preparation of the inner bus bars. After the printing of the outer electrode and other components, the inner collector of the SOC chip is prepared. Firstly, the inner collector slurry is applied on the side of the SOC chip. The basic components of the inner collector slurry include 5-20% of doped ceria (SDC or GDC) and 80-95% of silver. After the inner collector slurry is applied, the SOC chip is dried by 90 hot air for 1 h until the inner collector slurry is cured.

[0103] 9) Preparation of the side sealing members. After the preparation of the inner collector, the inner side sealing layer is prepared. The inner side sealing layer can be prepared on the inner collector, and its basic component is graphite or magnesium silicate talc (Mg.sub.6)[Si.sub.8]O.sub.20(OH).sub.4). The inner side sealing layer is dried with 90 hot air for 1 h. Then, the outer side sealing layer is prepared on the inner side sealing layer, and its basic component is graphite or potash-lime glass, including 5-12% of K.sub.2O, 12-18% of CaO, and 60-75% of SiO.sub.2. 10) Heat treatment. After the printing of the outer surface elements and the preparation of the side sealing members, the SOC chip is heat-treated to ensure that each outer surface element is firmly connected to its attachment and at least the outermost layer of the side sealing member is densified. Preferably, the heat treatment is conducted at 850 C. 1 h in a reducing protective atmosphere, which includes 5-60% of hydrogen, with the balance being nitrogen. 11) Electrode strengthening. After the heat treatment, the SOC chip is ready for practical applications. To further improve the electrical performance of the SOC chip and reduce the internal resistance, electrode strengthening is conducted. A typical electrode strengthening method includes impregnation. For example, in SDC impregnation, first, Sm(NO.sub.3) and Ce(NO.sub.3).sub.4 are dissolved in a certain ratio (such as a molar ratio of Sm.sub.2O.sub.3:CeO.sub.2=20:80) in an aqueous solution (or dilute nitric acid with a pH of about 5). Then, the solution is coated on the inner electrode and the outer electrode and subjected to heat treatment (such as 500 or 300 C. heat treatment for 20 min). Sm(NO.sub.3).sub.2 and Ce(NO.sub.3).sub.4 are decomposed to form a stabilized compound, SDC, with a certain proportion of Sm.sub.2O.sub.3:CeO2. This process can be repeated 3-5 times to increase the impregnation amount of SDC. The SDC is a known oxide with good catalytic activity and ion/electron mixed conductivity. After the impregnation treatment, the SDC can be dispersed into the electrode at a very small nanoscale, such as less than 100 nm, greatly expanding the reaction region of the electrode process, namely triple phase boundary (TPB, i.e. a gas-solid electrochemical site). It can significantly reduce the resistance of the electrode process and reduce the internal resistance of the SOC chip, which is well-known in the industry.

Second Embodiment

[0104] Referring to FIGS. 5 and 6, the structure of the SOC chip in the second embodiment is basically the same as that in the first embodiment, with the following differences. The intermediate layer 5 can cover an entire outer wall of the electrolyte 1 or partially cover the electrolyte 1. The inner electrode plate 6 connected to the inner electrode 2 and the outer electrode plate 7 connected to the outer electrode 3 are respectively arranged at two ends of the SOC chip. The inner bus bar 8 is located on an end surface of the SOC chip.

Third Embodiment

[0105] Referring to FIG. 7, the structure of the SOC chip in the third embodiment is basically the same as that in the second embodiment, with the following differences. In the third embodiment, the two ends of the SOC chip adopt a tapered design. A tapered edge and a straight edge of the operating surface on the hot end are at an angle of 5-60, preferably 10-30. During operation, the temperature difference between the gas inlet or outlet of the inner electrode 2 and a central part of the outer electrode is at least 200 C. This design ensures a desired operating state of the SOC chip. In the third embodiment, the outer collector 12 is located on the outer surface of the outer electrode 3. Connecting piece 15 is welded on the outer electrode plate 7 for external connection. Preferably, the connecting piece 15 is made of copper, nickel, gold, or silver.

Fourth Embodiment

[0106] Referring to FIG. 8, the structure of the SOC chip in the fourth embodiment is basically the same as that in the third embodiment, with the following differences. In the fourth embodiment, the inner bus bar 8 is located on a surface of the SOC chip, and is provided with a high-temperature end connected to the inner electrode 2 through an opening on the surface of the electrolyte 1. The open surface of the electrolyte 1 is further covered with sealing structure 10. The sealing structure 10 penetrates the electrolyte 1 and completely covers the open part of the electrolyte 1, including a junction of the inner bus bar 8 and the inner electrode 2, thus preventing the gas flowing through the inner electrode from leaking through the open part to the outside of the SOC chip.

[0107] The specific embodiments described herein are merely intended to illustrate the spirit of the present disclosure by way of example. A person skilled in the art can make various modifications or supplements to the specific embodiments described or replace them in a similar manner, but it may not depart from the spirit of the present disclosure or the scope defined by the appended claims.