Method and switching arrangement for changing a switching state of a switching half-bridge

Abstract

A switching half-bridge has two field-effect transistors and a supplementary circuit arranged upstream of a gate terminal of a first field-effect transistor and formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch being connected in parallel with the first circuit branch and having a series resistor and an auxiliary switch connected in series with the series resistor. The half-bridge can be switched from a first switching state to a second switching state, wherein while the auxiliary switch is open, a change in the control voltage causes the first circuit branch to temporarily change the gate-source voltage of the first field-effect transistor from the switch-on level to a second switch-off level greater than a first switch-off level, with the gate-source voltage thereafter returning to the first switch-off level.

Claims

1. A method for changing a switching state of a switching half-bridge having two field-effect transistors and a supplementary circuit arranged upstream of a gate terminal of a first of the two field-effect transistors and formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch having a series resistor and an auxiliary switch connected in series with the series resistor, with the first circuit branch and the second circuit branch being connected in parallel, the method comprising: switching from a first switching state, wherein a gate terminal of the first of the two field-effect transistors adapts a gate-source voltage corresponding to a switch-on level, and a second of the two field-effect transistors adapts a gate-source voltage corresponding to a first switch-off level, to a second switching state, wherein the gate-source voltage of the first of the two field-effect transistors adapts the first switch-off level, and the gate-source voltage of the second of the two field-effect transistors adapts the switch-on level, while the auxiliary switch is open, changing a control voltage of the first of the two field-effect transistors from the switch-on level to the first switch-off level; said changing of the control voltage causing the first circuit branch to temporarily change the gate-source voltage of the first of the two field-effect transistors from the switch-on level to a second switch-off level having a magnitude that is greater than a magnitude of first switch-off level, changing the gate-source voltage of the second of the two-effect transistors from the first switch-off level to the switch-on level; and changing the gate-source voltage of the first of the two field-effect transistors from the second switch-off level to the first switch-off level, wherein each of the two field-effect transistors comprises a wide-bandgap semiconductor base material.

2. The method of claim 1, further comprising changing the gate-source voltage of the second field-effect transistor from the first switch-off level to the switch-on level within a predetermined time following the change in the control voltage of the first field-effect transistor.

3. The method of claim 1, wherein the base material is silicon carbide.

4. A switching arrangement for changing a switching state of a switching half-bridge comprising two field-effect transistors, the switching arrangement comprising: for each of the two field-effect transistors, a respective gate driver associated with the respective field-effect transistor and driving the respective field-effect transistor with a control voltage, for each of the two field-effect transistors, a supplementary circuit arranged between a gate terminal of the respective field-effect transistor and the respective gate driver, the supplementary circuit formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch having a series resistor and an auxiliary switch connected in series with the series resistor, said first circuit branch and second circuit branch connected in parallel, the respective gate driver in combination with the supplementary circuit switching the half-bridge from a first switching state, wherein the gate terminal of the first of the two field-effect transistors adapts a gate-source voltage corresponding to a switch-on level and the gate terminal of the second of the two field-effect transistors adapts a gate-source voltage corresponding to a first switch-off level, to a second switching state, wherein the gate-source voltage of the first of the two field-effect transistors adapts the first switch-off level, and the gate-source voltage of the second of the two field-effect transistors adapts the switch-on level, wherein, when the auxiliary switch is open, the respective control voltage of the first of the two field-effect transistors changes from the switch-on level to the first switch-off level; said change in the control voltage causing the first circuit branch to temporarily change the gate-source voltage of the first of the two field-effect transistors from the switch-on level to a second switch-off level having a magnitude that is greater than a magnitude of a first switch-off level, wherein the respective control voltage of the second of the two field-effect transistors then changes the gate-source voltage of the second of the two field-effect transistors from the first switch-off level to the switch-on level; and wherein the gate-source voltage of the first of the two field-effect transistors then changes from the second switch-off level to the first switch-off level.

5. The switching arrangement of claim 4, wherein each of the two field-effect transistors comprises a wide-bandgap semiconductor base material.

6. The switching arrangement of claim 5, wherein the base material is silicon carbide.

7. The switching arrangement of claim 4, wherein when the auxiliary switch is closed, the gate terminal of the first of the two field-effect transistors assumes substantially the control voltage determined by the second circuit branch, while suppressing an effect on the gate-source voltage resulting from the first circuit branch.

8. A power converter comprising a switching half-bridge which has two field-effect transistors and a switching arrangement for changing a switching state of a switching half-bridge, the switching arrangement comprising: for each of the two field-effect transistors, a gate driver associated with the respective field-effect transistor and driving the respective field-effect transistor with a control voltage, for each of the two field-effect transistors, a supplementary circuit arranged between a gate terminal of the respective field-effect transistor and the gate driver, the supplementary circuit formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch having a series resistor and an auxiliary switch connected in series with the series resistor, said first circuit branch and second circuit branch connected in parallel, the gate driver in combination with the supplementary circuit switching the half-bridge from a first switching state, wherein the gate terminal of the first of the two field-effect transistors adapts a gate-source voltage corresponding to a switch-on level and the gate terminal of the second of the two field-effect transistors adapts a gate-source voltage corresponding to a first switch-off level, to a second switching state, wherein the gate-source voltage of the first of the two field-effect transistors adapts the first switch-off level, and the gate-source voltage of the second of the two field-effect transistors adapts the switch-on level, wherein, when the auxiliary switch is open, the respective control voltage of the first of the two field-effect transistors changes from the switch-on level to the first switch-off level; said change in the control voltage causing the first circuit branch to temporarily change the gate-source voltage of the first of the two field-effect transistors from the switch-on level to a second switch-off level having a magnitude that is greater than a magnitude of a first switch-off level, wherein the respective control voltage of the second of the two field-effect transistors then changes the gate-source voltage of the second of the two field-effect transistors from the first switch-off level to the switch-on level; and wherein the gate-source voltage of the first of the two field-effect transistors then changes from the second switch-off level to the first switch-off level.

9. A method for changing a switching state of a switching half-bridge having two field-effect transistors and a supplementary circuit arranged upstream of a gate terminal of a first of the two field-effect transistors and formed of a first circuit branch having a damping resistor and an inductor connected in series with the damping resistor and a second circuit branch having a series resistor and an auxiliary switch connected in series with the series resistor, with the first circuit branch and the second circuit branch being connected in parallel, the method comprising: switching from a first switching state, wherein a gate terminal of the first of the two field-effect transistors adapts a gate-source voltage corresponding to a switch-on level, and a second of the two field-effect transistors adapts a gate-source voltage corresponding to a first switch-off level, to a second switching state, wherein the gate-source voltage of the first of the two field-effect transistors adapts the first switch-off level, and the gate-source voltage of the second of the two field-effect transistors adapts the switch-on level, while the auxiliary switch is open, changing a control voltage of the first of the two a field-effect transistors from the switch-on level to the first switch-off level; said changing of the control voltage causing the first circuit branch to temporarily change the gate-source voltage of the first of the two field-effect transistors from the switch-on level to a second switch-off level having a magnitude that is greater than a magnitude of a first switch-off level, changing the gate-source voltage of the second of the two field-effect transistors from the first switch-off level to the switch-on level; and changing the gate-source voltage of the first of the two field-effect transistors from the second switch-off level to the first switch-off level, wherein when the auxiliary switch is closed, the gate terminal of the first of the two field-effect transistors assumes substantially the control voltage determined by the second circuit branch, while suppressing an effect on the gate-source voltage resulting from the first circuit branch.

10. The method of claim 9, further comprising changing the gate-source voltage of the second field-effect transistor from the first switch-off level to the switch-on level within a predetermined time following the change in the control voltage of the first field-effect transistor.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) The above-described characteristics, features and advantages of this invention and the manner in which these are achieved will become more clearly and distinctly comprehensible from the following description of exemplary embodiments, which are explained in greater detail in connection with the drawings, in which:

(2) FIG. 1 shows a circuit diagram of a power converter with a switching half-bridge and of a switching arrangement for changing a switching state of the switching half-bridge,

(3) FIG. 2 shows a partial circuit diagram of a switching half-bridge and of a first exemplary embodiment of a switching arrangement for changing a switching state of the switching half-bridge,

(4) FIG. 3 shows time profiles of control voltages and gate-source voltages, generated by the switching arrangement shown in FIG. 2, of the field-effect transistors of a switching half-bridge,

(5) FIG. 4 shows a partial circuit diagram of a switching half-bridge and of a second exemplary embodiment of a switching arrangement for changing a switching state of the switching half-bridge, and

(6) FIG. 5 shows time profiles of control voltages and gate-source voltages, generated by the switching arrangement shown in FIG. 4, of the field-effect transistors of a switching half-bridge.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(7) Mutually corresponding parts are provided with the same reference characters in all the figures.

(8) FIG. 1 shows a circuit diagram of a power converter 100 with a switching half-bridge 1 and a switching arrangement 3 for changing a switching state of the switching half-bridge 1. The power converter 100 takes the form of a single-phase pulse-controlled inverter.

(9) The switching half-bridge 1 has a first field-effect transistor 5 and a second field-effect transistor 7, and optionally a first freewheeling diode 9 connected antiparallel to the first field-effect transistor 5 and a second freewheeling diode 11 connected antiparallel to the second field-effect transistor 7. The bridge branch of the switching half-bridge 1 is connected to a load 13.

(10) The field-effect transistors 5, 7 are for example normally-off n-channel silicon carbide field-effect transistors, i.e. normally-off n-channel field-effect transistors whose base material is silicon carbide and whose threshold voltage at room temperature is between 1 V and 4 V.

(11) The switching arrangement 3 has a first gate driver 15 and a first supplementary circuit 17 for driving the first field-effect transistor 5 and a second gate driver 19 and a second supplementary circuit 21 for driving the second field-effect transistor 7.

(12) The switching half-bridge 1 is connected to a DC link 22, such that a DC link voltage U.sub.ZK of the DC link 22 is applied to the switching half-bridge 1.

(13) Various exemplary embodiments of the switching arrangement 3 and the mode of operation thereof are described below with reference to FIGS. 2 to 5.

(14) FIG. 2 shows a first exemplary embodiment of a switching arrangement 3, wherein only the first gate driver 15 and the first supplementary circuit 17 for driving the first field-effect transistor 5 of the switching half-bridge 1 are shown. The second gate driver 19 and the second supplementary circuit 21 for driving the second field-effect transistor 7 of the switching half-bridge 1 are in each case constructed and switched in the same way as the first gate driver 15 and the first supplementary circuit 17. A series resistor 23 is located between a gate terminal G1, G2 of the respective field-effect transistor 5, 7 and the gate driver 15, 19 and the supplementary circuit 17, 21 of the field-effect transistor 5, 7.

(15) Each supplementary circuit 17, 21 has a supplementary gate driver 24 for driving the respective field-effect transistor 5, 7. The first gate driver 15 and the supplementary gate driver 24 of the first supplementary circuit 17 generate a first control voltage U.sub.C1 with which a gate-source voltage U.sub.GS1 between the gate terminal G1 and a source terminal S1 of the first field-effect transistor 5 is controlled. The first control voltage U.sub.C1 is adjustable to a first switch-off level U.sub.off1 with the supplementary gate driver 24 of the first supplementary circuit 17. The first control voltage U.sub.C1 is adjustable to a switch-on level U.sub.on or a second switch-off level U.sub.off2 with the first gate driver 15, wherein the second switch-off level U.sub.off2 has a greater magnitude than the first switch-off level U.sub.off1. For field-effect transistors 5, 7 in the form of normally-off n-channel silicon carbide field-effect transistors, the first switch-off level U.sub.off1 is for example between 3 V and 5 V, the second switch-off level U.sub.off2 between 5 V and 10 V and the switch-on level U.sub.on between 15 V and 20 V.

(16) The second gate driver 19 and the second supplementary circuit 21 accordingly generate a second control voltage U.sub.C2 with which a gate-source voltage U.sub.GS2 between the gate terminal G2 and a source terminal S2 of the second field-effect transistor 7 is controlled, wherein the second control voltage U.sub.C2 is adjustable with the second supplementary circuit 21 to the first switch-off level U.sub.off1 and with the second gate driver 19 to the switch-on level U.sub.on or the second switch-off level U.sub.off2.

(17) The switch-on level U.sub.on is a value of the gate-source voltages U.sub.GS1, U.sub.GS2 at which the respective field-effect transistor 5, 7 is switched on, i.e. conductive. The switch-off levels U.sub.off1, U.sub.off2 are values of the gate-source voltages U.sub.GS1, U.sub.GS2 at which the respective field-effect transistor 5, 7 is switched off, i.e. non-conductive.

(18) FIG. 3 shows time profiles of control voltages U.sub.C1, U.sub.C2 generated with the switching arrangement 3 shown in FIG. 2 and of the consequently generated gate-source voltages U.sub.GS1, U.sub.GS2 of field-effect transistors 5, 7. The profiles of control voltages U.sub.C1, U.sub.C2 and gate-source voltages U.sub.GS1, U.sub.GS2 are shown as a function of a time t during changing according to the invention of a switching state of the switching half-bridge 1 from a first switching state, in which the first field-effect transistor 5 is switched on and the second field-effect transistor 7 is switched off, to a second switching state, in which the first field-effect transistor 5 is switched off and the second field-effect transistor 7 switched on. In the first switching state, the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 adopts the switch-on level U.sub.on and the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 adopts the first switch-off level U.sub.off1. In the second switching state, the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 adopts the first switch-off level U.sub.off1 and the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 adopts the first switch-on level U.sub.on.

(19) Starting from the first switching state, at a first point in time t.sub.1, the first control voltage U.sub.C1 is firstly changed by the first gate driver 15 from the switch-on level U.sub.on to the second switch-off level U.sub.off2, wherein the supplementary gate driver 24 of the first supplementary circuit 17 remains switched off. Then, at a second point in time t.sub.2, the second control voltage U.sub.C2 is changed by the second gate driver 19 from the first switch-off level U.sub.off1 to the switch-on level U.sub.on, wherein the supplementary gate driver 24 of the second supplementary circuit 21 is switched off. Thereafter, at a third point in time t.sub.3, the first control voltage U.sub.C1 is changed by the supplementary gate driver 24 of the first supplementary circuit 17 from the second switch-off level U.sub.off2 to the first switch-off level U.sub.off1, wherein the first gate driver 15 is switched off. The gate-source voltage U.sub.GS1 of the first field-effect transistor 5 here virtually instantaneously follows the first control voltage U.sub.C1, such that the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 in FIG. 3 coincides with the first control voltage U.sub.C1. The gate-source voltage U.sub.GS2 of the second field-effect transistor 7 accordingly here virtually instantaneously follows the second control voltage U.sub.C2, such that the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 in FIG. 3 coincides with the second control voltage U.sub.C2. The second point in time t.sub.2 and the third point in time t.sub.3 are here established by a first duration T.sub.1, which defines the time gap between t.sub.1 and t.sub.2, and a second duration T.sub.2, which defines the time gap between t.sub.2 and t.sub.3, wherein the two durations T.sub.1, T.sub.2 are predetermined and definitively adjusted.

(20) FIG. 4 shows a second exemplary embodiment of a switching arrangement 3, wherein again only the first gate driver 15 and the first supplementary circuit 17 for driving the first field-effect transistor 5 of the switching half-bridge 1 are shown. The second gate driver 19 and the second supplementary circuit 21 for driving the second field-effect transistor 7 of the switching half-bridge 1 are in each case constructed and switched in the same way as the first gate driver 15 and the first supplementary circuit 17.

(21) The first gate driver 15 generates a first control voltage U.sub.C1 for controlling the gate-source voltage U.sub.GS1 between a gate terminal G1 and a source terminal S1 of the first field-effect transistor 5. The second gate driver 19 accordingly generates a second control voltage U.sub.C2 for controlling the gate-source voltage U.sub.GS2 between a gate terminal G2 and a source terminal S2 of the second field-effect transistor 7.

(22) Each supplementary circuit 17, 21 has two circuit branches connected parallel to one another, wherein a first circuit branch has a damping resistor 25 and an inductor 27 connected in series thereto and the second circuit branch has a series resistor 23 and an auxiliary switch 29.

(23) The second circuit branch may be interrupted by opening the auxiliary switch 29, such that only the first circuit branch of the supplementary circuit 17, 21 is active. Together with an input capacitor 31 of the respective field-effect transistor 5, 7, which is the sum of the capacitances between gate and source and between gate and drain of the field-effect transistor 5, 7, and a parasitic inductance of further components of the switching arrangement 1, the first circuit branch then forms a series resonant circuit which is excited by changes in the respective control voltage U.sub.C1, U.sub.C2.

(24) When the auxiliary switch 29 is closed, the effect of the series resonant circuit is suppressed and the respective supplementary circuit 17, 21 acts substantially like an ohmic resistor arranged upstream of the respective gate terminal G1, G2.

(25) FIG. 5 shows time profiles of control voltages U.sub.C1, U.sub.C2 generated with the switching arrangement 3 shown in FIG. 4 and of the consequently generated gate-source voltages U.sub.GS1, U.sub.GS2 of field-effect transistors 5, 7. The profiles of control voltages U.sub.C1, U.sub.C2 and gate-source voltages U.sub.GS1, U.sub.GS2 are shown as a function of a time t during changing according to the invention of a switching state of the switching half-bridge 1 from a first switching state, in which the first field-effect transistor 5 is switched on and the second field-effect transistor 7 is switched off, to a second switching state, in which the first field-effect transistor 5 is switched off and the second field-effect transistor 7 switched on. In the first switching state, the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 adopts the switch-on level U.sub.on and the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 adopts the first switch-off level U.sub.off1. In the second switching state, the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 adopts the first switch-off level U.sub.off1 and the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 adopts the first switch-on level U.sub.on.

(26) Starting from the first switching state, at a first point in time t.sub.1, the first control voltage U.sub.C1 is firstly changed by the first gate driver 15 from the switch-on level U.sub.on to the first switch-off level U.sub.off1, wherein the auxiliary switch 29 of the first supplementary circuit 17 is opened, such that the first supplementary circuit 17, the input capacitor 31 of the first field-effect transistor 5 and the parasitic inductor of further components of the switching arrangement 1 form a series resonant circuit as described above. The damping resistor 25 and the inductor 27 of the supplementary circuit 17 are selected such that, after a duration T, the change in the first control voltage U.sub.C1 from the switch-on level U.sub.on, to the first switch-off level U.sub.off1 brings about an overshoot of the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 up to the second switch-off level U.sub.off2 and the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 then rapidly settles with damping to the first switch-off level U.sub.off1. At a second point in time t.sub.2, the second control voltage U.sub.C2 is changed by the second gate driver 19 from the first switch-off level U.sub.off1 to the switch-on level U.sub.on, wherein the auxiliary switch 29 of the second supplementary circuit 21 is closed, such that the second supplementary circuit 21 substantially acts as an ohmic resistor arranged upstream of the gate terminal G2 of the second field-effect transistor 7 and the gate-source voltage U.sub.GS2 of the second field-effect transistor 7 virtually instantaneously follows the second control voltage U.sub.C2. The time gap between the second point in time and the first point in time t.sub.1 is here defined by the duration T which is determined and definitively adjusted beforehand.

(27) In both of the above-described exemplary embodiments, when the first field-effect transistor 5 is switched off, the gate-source voltage U.sub.GS1 thereof is thus firstly reduced to the second switch-off level U.sub.off2 before the second field-effect transistor 7 is switched on and the gate-source voltage U.sub.GS1 of the first field-effect transistor 5 is adjusted to the first switch-off level U.sub.off1 or the first switch-off level U.sub.off1 is reached. This temporary reduction in the gate-source voltage U.sub.GS1 advantageously prevents parasitic switching back on (self turn-on) of the first field-effect transistor 5 in the event of its being rapidly switched off.

(28) In both of the above-described exemplary embodiments, changing of the switching state of the switching half-bridge 1 from the second switching state to the first switching state proceeds in a similar manner to the described changing of the switching state from the first switching state to the second switching state, wherein the gate driver 15, 19 and supplementary circuit 17, 21 merely swap their roles.

(29) Although the invention has been illustrated and described in greater detail with reference to preferred exemplary embodiments, the invention is not limited by the disclosed examples and other variations may be derived therefrom by a person skilled in the art without going beyond the scope of protection of the invention.