MAGNETIC MEMORY SLOT

Abstract

A memory slot including a pad formed of a stack of regions made of thin layers, including a first region made of a nonmagnetic conducting material; a second region made of a magnetic material exhibiting a magnetization in a direction perpendicular to the principal plane of the pad; a third region made of a nonmagnetic conducting material of different characteristics to those of the first region; the pad resting on a conducting track adapted to cause the flow of a programming current of chosen sense, in which the pad has an asymmetric shape with respect to any plane perpendicular to the plane of the layers and parallel to the central axis of the track, and with respect to its barycenter.

Claims

1. A memory cell comprising a pad formed of a stack of regions in thin layers, comprising: a first region made of a conductive material; a second region made of a magnetic material having a magnetization in a direction perpendicular to the main plane of the pad; a third region made of a non-magnetic material having characteristics different from those of the first region; said pad integrally resting on a conductive track capable of circulating a programming current of selected direction, wherein said pad has an asymmetrical shape, on the one hand with respect to any plane perpendicular to the plane of the layers and parallel to the central axis of the track, and on the other hand with respect to its barycenter, whereby the direction of the magnetization in the second layer is programmable by the circulation direction of said programming current, in the absence of an external magnetic field.

2. The memory cell of claim 1, wherein the first region corresponds to a portion of the track underlying the pad or to an overthickness of this underlying portion.

3. The memory cell of claim 1, wherein the pad has a triangular shape with a first side parallel to the direction of the programming current and two other sides for example forming an angle from ±20° to ±70° relative to the first side.

4. The memory cell of claim 3, wherein the pad has a triangular shape with rounded corners.

5. The memory cell of claim 1, wherein the pad only extends across a portion of the width of the track.

6. The memory cell of claim 1, wherein the second region comprises an alloy having a specific perpendicular magnetic anisotropy, that is, in particular, FePt, FePd, CoPt, or also a rare earth/transition metal alloy, particularly GdCo, TbFeCo.

7. The memory cell of claim 1, wherein the second region comprises a metal or an alloy having in the stack a perpendicular magnetic anisotropy induced by the interfaces, particularly Co, Fe, CoFe, Ni, CoNi.

8. The memory cell of claim 1, wherein at least the first region or the third region is conductive and is made of a non-magnetic material, such as Pt, W, Ir, Ru, Pd, Cu, Au, Bi, Hf or of an alloy of these metals, or is formed of a stack of a plurality of layers of each of these metals.

9. The memory cell of claim 1, wherein the third region is made of a dielectric oxide such as SiOx, AlOx, MgOx, TiOx, TaOx, HfOx or of a dielectric nitride such as SiNx, BNx.

10. The memory cell of claim 1, wherein the thickness of the first (40) and third (42) regions is in the range from 0.5 to 200 nm, more particularly from 0.5 to 100 nm, and preferably smaller than 3 nm.

11. The memory cell of claim 1, wherein the third region is covered with a readout layer made of a magnetic material and with a readout electrode.

12. The memory cell of claim 1, wherein the thickness of the second region is smaller than 3 nm.

13. The memory cell of claim 1, wherein the first region is made of a conductive antiferromagnetic material.

14. The memory cell of claim 13, comprising a conductive buffer layer between the first region and the track.

15. The memory cell of claim 13, wherein the thickness of the first region made of an antiferromagnetic material is in the range from 1 to 200 nm, and preferably smaller than 10 nm.

16. A method of programming the memory cell of claim 13, comprising the step of conducting in the track, and accordingly in the first region of antiferromagnetic material, a current having an intensity capable of heating the material to disorganize its magnetization, the direction of the current being selected to program the

Description

BRIEF DESCRIPTION OF THE DRAWING

[0032] The foregoing and other features and advantages will be discussed in detail in the following non-limiting description of dedicated embodiments in connection with the accompanying drawings, among which:

[0033] FIGS. 1A, 1B, and 2 are simplified representations of a memory cell such as described in French patent application Nr. 2963152;

[0034] FIG. 3 is a simplified perspective view of an embodiment of a memory cell;

[0035] FIG. 4 is a simplified top view of the pad of FIG. 3;

[0036] FIGS. 5A to 5J are simplified top views of contours of various embodiments of a memory cell;

[0037] FIG. 6 is a simplified perspective view of another embodiment of a memory cell; and

[0038] FIG. 7 shows various curves illustrating the operation of the memory cell of FIG. 6.

[0039] For clarity, the same elements have been designated with the same reference numerals in the various drawings and, further, as usual in the representation of integrated components, the various drawings are not to scale.

DETAILED DESCRIPTION

[0040] As shown in FIG. 3, an embodiment of a memory cell comprises a pad 30 integrally arranged on a conductive track 1 comprising, at its ends, connection layers 20 and 21 connected to terminals A and B. Pad 30 comprises the same stack of layers as previously-described pad 3. Thus, pad 30 comprises a region 40 made of a non-magnetic conductive material, a region 41 made of a magnetic material, a region 42 made of a non-magnetic material, region 42 exhibiting a difference with respect to region 40, a region 43 made of a magnetic material, and an electrode 44. The same variations as those described hereabove and in the above-mentioned French patent application apply.

[0041] Unlike pad 3 of FIG. 2, pad 30 has a doubly asymmetrical configuration. On the one hand, it is asymmetrical with respect to any plane perpendicular to the plane of the layers and parallel to the central axis of track 1. On the other hand, it is asymmetrical with respect to its barycenter, which corresponds to point C in FIG. 3. As can be better seen in the top view of FIG. 4, this pad for example has a triangular shape. A first side is parallel to the direction of the programming current (from A to B). The two other sides for example form an angle in the range from ±20° to ±70° and preferably from ±30° to ±60° relative to the first side. Due to the photolithography defects, the corners of the triangle will generally be rounded. It may be intentionally desired to obtain such a rounded shape.

[0042] It has been observed that with a pad having such doubly asymmetrical shape (with respect to a plane and with respect to its barycenter) and integrally arranged on a track, the application of a programming current between terminals A and B flowing in the track under the pad and around the pad is sufficient to program layer 41 so that its magnetization is directed upwards or downwards according to the direction of the programming current. This is done with no application of an external magnetic field. Of course, if a conductive region 40 is provided, its resistivity and that of track 1 are selected so that a significant portion of the current between terminals A and B flows through region 40. It should be reminded that if track 1 is made of a non-magnetic material, region 40 may correspond to the track portion underlying the pad or to an overthickness of this region.

[0043] FIGS. 5A to 5J show as an example various shapes of asymmetrical pads which may be used on a track 1. These drawings will be considered as incorporated herein by reference.

[0044] Pads 50 and 51 of FIGS. 5A and 5B have triangle shapes like the pad of FIG. 4, but with different proportions and centers.

[0045] Pad 52 of FIG. 5C has the shape of a crescent elongated in the track direction. In other words, pad 52 has a trapezoidal shape provided with two tapered protrusions 52A and 52B at the ends of the base of the trapeze. It is now considered that the presence of the tapered protrusions eases the triggering of the reversal of the magnetization at the passing of the programming current.

[0046] Pads 53 to 55 of FIGS. 5D to 5F have herringbone shapes, the tip of the herringbone being directed towards a side of track 1, the herringbones having various dimensions and positions relative to the track width.

[0047] Pads 56 to 59 of FIGS. 5G to 5J are pads in the shape of triangles and of herringbones with rounded corners.

[0048] The various shapes described hereabove may be combined and modified from the moment that the double asymmetry rule mentioned herein is respected. In particular, all the envisaged shapes may be “rounded” or only extend across a portion of the width of track 1.

[0049] As concerns the materials and the thicknesses of the various regions of the pad, reference may be made to the above-mentioned French patent application.

[0050] As an example: [0051] the magnetic region (41) may comprise an alloy having a specific perpendicular magnetic anisotropy, that is, in particular, FePt, FePd, CoPt, or also a rare earth/transition metal alloy, particularly GdCo, TbFeCo. [0052] the magnetic region (41) may comprise a metal or an alloy having in the stack a perpendicular magnetic anisotropy induced by the interfaces, particularly Co, Fe, CoFe, Ni, CoNi, [0053] at least region (40) or region (42) may be conductive, made of a non-magnetic material, such as Pt, W, Jr, Ru, Pd, Cu, Au, Bi, Hf, or of an alloy of these metals, or in the form of a stack of a plurality of layers of each of these metals, [0054] region (42) may be made of a dielectric oxide such as SiOx, AlOx, MgOx, TiOx, TaOx, HfOx or of a dielectric nitride such as SiNx, BNx, having a thickness capable of allowing a tunnel effect, [0055] the thickness of one of the regions (40) and (42) may be in the range from 0.5 nm to 200 nm, more particularly from 0.5 nm to 100 nm, and preferably smaller than 3 nm, [0056] the upper region (42) may be covered with a readout layer (43) made of a magnetic material, or of a compound of magnetic materials, or of a plurality of layers of magnetic and non-magnetic materials, and with a read electrode (44), and [0057] the thickness of the magnetic region may be smaller than 3 nm.

[0058] In top view, the lateral dimensions of the pad may be in the range from 10 to 100 nm.

[0059] The above-described memory cells may be assembled in a memory array, as described in the above-mentioned French patent application.

Embodiment with a High Thermal Stability

[0060] The previously-described memory cells have satisfactory operations. However, to avoid having an excessive intensity of the current necessary for the programming, storage layers which are as thin as possible should be provided. Storage layers having a thickness smaller than 3 nanometers, and even having, for example, a thickness smaller than one nanometer, can thus be formed. Such a thickness decrease favors the decrease in the intensity of the programming current but results in a lack of stability of the memory cells. Indeed, memory cells comprising such a thin storage layer, risk incidentally switching state, particularly due to disturbances such as thermal agitation or parasitic magnetic fields. Thus, such memory cells have, in average, a limited thermal stability, which leads to providing a periodic reprogramming thereof.

[0061] To overcome this disadvantage, it is provided to couple the magnetic, generally ferromagnetic, storage region with a region of an antiferromagnetic material.

[0062] FIG. 6 shows an embodiment of a memory cell having an increased thermal stability, corresponding to the embodiment of FIG. 3. In FIG. 6, non-magnetic conductive layer 40 of FIG. 3 is replaced with a conductive layer 60 made of an antiferromagnetic material. The antiferromagnetic material couples by exchange interaction with the magnetic, for example, ferromagnetic, material of storage layer 41. This enables to trap the magnetization of this magnetic layer and to provide a thermal stability.

[0063] This structure is likely to have a number of variations. Particularly, a conductive buffer sub-layer (not shown), particularly intended to enable to satisfactorily deposit antiferromagnetic material layer 60, may be provided under antiferromagnetic material layer 60. Further, a thin layer of a non-magnetic conductive material, for example, copper, may be arranged between the ferromagnetic and antiferromagnetic regions to decrease, if need be, the coupling between these regions.

[0064] As illustrated in the curves of FIG. 7, the memory cell programming is carried out as follows. From a time tO, a current pulse I is sent between terminals A and B, the current having a direction capable of causing the reversal of the magnetization of magnetic layer 41. First, nothing occurs due to the coupling between magnetic and antiferromagnetic layers 41 and 60. However, temperature T.sub.af of the antiferromagnetic material increases by Joule effect and the magnetization organization of the material, whereby the coupling between magnetic materials and antiferromagnetic layers 41 and 60 decreases. From a time t1, the coupling becomes sufficiently low for magnetization “pol” of layer 41 to reverse under the effect of the portion of current I flowing through the ferromagnetic and antiferromagnetic layers of the pad. Once the current pulse between terminals A and B stops, at a time t2, temperature T.sub.af of the antiferromagnetic material decreases and the latter recovers, at a time t3, an organized state which couples back with the modified polarization of the magnetization in storage layer 41 and ensures its stability. To avoid possible write errors due to thermal agitation during the cooling of the memory cell, current I may be gradually decreased and controlled to control the temperature of the pad and the amplitude of the couples responsible for the reversal of the magnetization more independently. Current I will for example be gradually decreased over a time interval shorter than 1 μs, more particularly shorter than 100 ns, and preferably shorter than or equal to 10 ns.

[0065] A layer of antiferromagnetic material of a nature such that temperature TR for which the decrease of the exchange coupling with the magnetic layer, which enables the magnetization therein to be freer to reverse, is much higher than the temperatures of use provided for the operation of the memory cell or of the memory where the memory cell is incorporated, will be selected. Temperature TR is for example in the order of 140° C. for slow writing operations and in the range from 220 to 300° C. for fast writing operations.

[0066] As an example of antiferromagnetic materials which may be used herein, alloys such as for example those based on Mn such as IrMn, FeMn, PtMn, or alloys of these compounds such as PtFeMn, or also materials obtained by lamination of these compounds, or also oxides such as CoOx or NiOx may be mentioned, the magnetic material, preferably ferromagnetic, used for the storage layer then being a material such as previously described for layer 41. Generally, the electric conductivity of the antiferromagnetic material should be sufficient for current to flow therethrough during the write phase and any ferromagnetic material complying with this condition, coupling by exchange with the ferromagnetic material and having a blocking temperature in the range from 120 to 450° C., may be used.

[0067] Thus, the previously-described memory cell may be stabilized, even by providing a very thin magnetic layer, of a thickness smaller than 3 nm and preferably smaller than 1 nm. Antiferromagnetic material layer 60 will have a thickness in the range from 1 to 200 nm, more particularly from 1 to 50 nm, and preferably smaller than 10 nm. Such a thickness will depend on the material used, for example, in the order of 10 nm for FeMn, and in the range from 4 to 5 nm for IrMn. The time of reversal of such a magnetic cell may be very short. The current pulses I shown in FIG. 7 may for example have a duration shorter than 15 nanoseconds.