Abstract
An electronic switching circuit, in particular a solid state relay, provides bidirectional electronic power switching. The circuit can be connected to a load and an electrical voltage source. It includes two field effect transistors and a control circuit. The control circuit is conductively connected to the respective gate terminal of the field effect transistors. The field effect transistors are connected in an anti-serial configuration.
Claims
1. An electronic switching circuit for bidirectional electronic switching of power which can be connected in series between a consumer and a direct current electrical voltage source, comprising: two field effect transistors connected to one another in an anti-serial configuration; and a control circuit which is conductively connected to respective gate terminals of the two field effect transistors, wherein the control circuit comprises a negative voltage regulator.
2. The electronic switching circuit according to claim 1, wherein the two field effect transistors are p-channel IGFETs.
3. The electronic switching circuit according to claim 2, wherein the p-channel IGFETs are self-blocking.
4. The electronic switching circuit according to claim 3, wherein the field effect transistors are power IGFETs.
5. The electronic switching circuit according to claim 1, wherein source connections of the two field effect transistors are conductively connected to one another.
6. The electronic switching circuit according to claim 1, wherein the control circuit comprises a Schmitt Trigger.
7. The electronic switching circuit according to claim 1, wherein the control circuit comprises a rectifier.
8. The electronic switching circuit according to claim 1, further comprising at least two further field effect transistors, one of the at least two further field effect transistors being arranged in parallel with each of the two field effect transistors.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The invention may be more completely understood in consideration of the following detailed description of various embodiments of the invention in connection with the accompanying drawings, in which:
(2) FIG. 1 is a circuit diagram of an electronic switching circuit in a ground circuit;
(3) FIG. 2 is a circuit diagram of an electronic switching circuit according in a plus circuit;
(4) FIG. 3 shows a circuit diagram of an electronic switching circuit in a ground circuit with opposite polarity;
(5) FIG. 4 is a circuit diagram of an electronic switching circuit in a plus circuit with opposite polarity;
(6) FIG. 5 is a detailed partial view of the switching circuit as in FIGS. 1 to 4 with overvoltage protection;
(7) FIG. 6 is a circuit diagram of a control circuit;
(8) FIG. 7 is a side view of a housing of a solid state relay;
(9) FIG. 8 is a bottom view of the solid state relay as in FIG. 7;
(10) FIG. 9 shows a connector image according to FIG. 7;
(11) FIG. 10 shows an alternative control circuit;
(12) FIG. 11 shows a detail of control electronics; and
(13) FIG. 12 shows a detail of a voltage generator.
DETAILED DESCRIPTION
(14) FIGS. 1 to 4 each show a circuit diagram of a solid state relay with an assembly comprising a control circuit L1, which is connected via terminals 15 and 31 to a supply voltage, for example a battery. The positive pole of the battery +UBATT is connected via an input switch S1 to the control circuit L1, while the negative pole UBATT is connected via a second switch S2 to the terminal 31 of the control circuit L1.
(15) While an output of the control circuit L1 is connected to an internal ground IM, a second output leads to the gates of the field effect transistors T1, T2, which, as shown in FIGS. 1 to 4, are provided as self-blocking (normally open) power p-channel IGFETs, in particular power p-channel MOSFETs. A third output leads via the switch S2 to the negative pole UBATT
(16) As illustrated in FIGS. 1 and 2, the field effect transistors T1, T2 are connected in anti-series. The anti-serial circuit is designed such that the drain of the first field effect transistor T1 leads via the terminal 30 to the positive pole +UBATT. The source of the first field effect transistor T1 is conductively connected to the source of the second field effect transistor T2. The drain of the second field effect transistor T2 leads via the terminal 87 to the negative pole UBATT.
(17) In contrast, FIGS. 3 and 4 show an opposite polarity. Again, the field effect transistors T1, T2 are connected in anti-series. The anti-serial circuit is designed such that the drain of the first field effect transistor T1 leads via the terminal 87 to the positive pole +UBATT. The source of the first field effect transistor T1 is conductively connected to the source of the second field effect transistor T2. The drain of the second field effect transistor T2 leads via the terminal 30 to the negative pole UBATT.
(18) FIGS. 1 to 4 also show the respective body diodes D1, D2 of the field effect transistors T1, T2.
(19) Overall, therefore, a load circuit between the terminals 30 and 87 and a control circuit between the terminals 15 and 31 is defined.
(20) As shown in FIGS. 1 and 3, a consumer V can be switched to ground. Likewise, it is possible to switch a load in plus circuit, as shown in FIGS. 2 and 4.
(21) FIG. 5 shows a detail of the circuit diagrams of FIGS. 1 to 4 with an additional suppressor diode D4 and a Zener diode D3. The suppressor diode D4 is connected in parallel to the field effect transistors T1, T2 and to the diodes D1, D2. The Zener diode D3 connects the control circuit L1 to the source-source connection of the field effect transistors T1, T2. As a result, a comprehensive overvoltage protection is realized.
(22) FIG. 6 shows a circuit diagram of the control circuit L1. The control circuit has a rectifier GR, an overvoltage protection in the form of a varistor VR and control electronics A. The control electronics are connected in series between the rectifier and the gates. The control electronics has a hysteresis circuit in the form of a Schmitt trigger (FIG. 11). The control circuit L1 is particularly preferred when the solid state relay is used as a separation relay.
(23) The solid state relay is thus completely bidirectional. A consumer can be switched with the solid state relay in plus circuit and in ground circuit, i.e. in a switched ground or a switched power configuration. In addition, the solid-state relay is absolutely protected against reverse polarity.
(24) FIGS. 7 and 8 show a housing G (height h=40 mm) with a square bottom plate B, in which the entire assembly is embedded by a heat-conductive potting compound. Standardized plug-in contact elements (DIN 46 244 A) extend from the bottom plate B. FIG. 9 shows a connector pinout thereof. This connector pinout is compatible with standardized electromagnetic plug-in relays, so that a problem-free replacement is possible.
(25) The plug contact elements (pins) for the two terminals 30 and 87 have according to DIN 46 244 A the dimensions 9.51.2 mm, those for the two terminals 15 and 31, the size of 6.30.8 mm. Further, then versions 2.80.8 mm could be possible.
(26) Other housing dimensions may be used, especially those with 30 or 40 mm height or bottom plates with 6.3 mm or 2.8 mm contacts.
(27) FIG. 10 shows an alternative control circuit L2. This is particularly advantageous when the solid state relay is used as an opening relay or as a change-over relay.
(28) In this case, the DC regulator GR is not connected to terminals 15 and 31. Instead, the DC regulator is connected to the terminals of supply circuits 30 and 87. The DC regulator GR is also connected in series with the control electronics A.
(29) The control circuit L2 has overvoltage protection in the form of a varistor. Alternatively, the overvoltage protection can also be designed as a suppressor diode.
(30) The control electronics A is shown in detail in FIGS. 11 and 12. Its configuration is the same in both control circuits L1, L2. The control electronics A has a hysteresis circuit H1 in the form of a Schmitt trigger. The Schmitt trigger is conductively connected in series with a transmitter UT.
(31) The embodiment of the transmitter UT is shown in FIG. 12. It includes a voltage generator SE, which supplies a positive or a negative control voltage +Ugate/Ugate depending on the field effect transistors used. If, as in the present example, self-blocking p-channel IGFETs T1, T2 are used, the voltage generator is formed as a negative voltage regulator. This may in particular be a DC-DC converter or a series regulator. The series regulator can be realized in particular as a voltage inverter or with a switching regulator. Alternatively, if self-blocking n-channel IGFETs are used, the voltage generator is designed as at least one charge pump.
