Bi-Directional Vector Modulator/Active Phase Shifter
20200287282 ยท 2020-09-10
Inventors
Cpc classification
H04B1/50
ELECTRICITY
H03H11/20
ELECTRICITY
H03C5/00
ELECTRICITY
H04B1/001
ELECTRICITY
International classification
H04B1/50
ELECTRICITY
Abstract
A novel bi-directional vector modulator to be used as an active phase shifter is proposed. The advantages of the active phase shifter include: 1) Compact sizeBy active current combining technique, short transmission lines are used to perform signal combining rather than using area-consuming Wilkinson combiner or splitter; 2) High phase resolution and flexibilityphase interpolation can be performed by vector addition through m-path vector modulators; 3) High efficiencyno signal switch loss, only switched matching capacitor; 4) Simplified signal interconnection; 5) No passive combiner neededeliminate large size and losses in the passive combiner); 6) Can have unequal combining and/or splitting by changing the gain of vector modulator, which is difficult to realize with passive combining and/or splitting network; and 7) Can combine different signals.
Claims
1. A bi-directional (BD) vector modulator, comprises: a quadrature-phase coupler coupled to a first IC terminal and two first matching networks (MN1s), wherein the quadrature phase coupler converts an input signal to an I signal and a Q signal; a first bi-directional variable gain amplifier (BD-VGA) that receives the I signal, wherein the first BD-VGA amplifies the I signal by a first gain value and outputs an I signal onto a common node; a second BD-VGA that receives the Q signal, wherein the second BD-VGA amplifies the Q signal by a second gain value and outputs a Q signal onto the common node; and a shared second matching network (MN2) coupled to the common node and a second IC terminal for outputting an output signal, wherein the first and the second BD-VGAs share the same MN2, and wherein the BD vector modulator has adjustable input impedance and output impedance that match to the BD-VGAs for both switched amplifier directions.
2. The BD vector modulator of claim 1, wherein input signals flow from the first IC terminal to the quadrature phase coupler, wherein output currents from the BD-VGAs are summed onto the common node, wherein MN1s become input matching networks, and wherein MN2 becomes an output matching network for the BD vector modulator.
3. The BD vector modulator of claim 1, wherein input signals flow from the second IC terminal to MN2, wherein an input current on the common node is shared by the BD-VGAs, wherein MN1s become output matching networks, and wherein MN2 becomes an input matching network for the BD vector modulator.
4. The BD vector modulator of claim 1, wherein current summing or current sharing occurs on the common node and thereby achieving active combining or splitting, for both switched amplifier directions without using passive structures.
5. The BD vector modulator of claim 1, wherein each BD-VGA is formed by a pair of high isolation cascode amplifiers to provide input and output isolation, wherein the pair of cascode amplifiers are connected in complementary for bi-directionality.
6. The BD vector modulator of claim 1, wherein each BD-VGA comprises a pair of amplifiers that provides a main gain level and a set of positive and negative gain steps to achieve variable gain levels in both switched amplifier directions.
7. The BD vector modulator of claim 1, wherein each BD-VGA comprises adjustable match loads with switched matching to achieve matched input and output impedance in both switched amplifier directions.
8. The BD vector modulator of claim 1, wherein the output signal phase is controlled by at least the amplitudes of the I and Q signals.
9. The BD vector modulator of claim 1, wherein the output signal phase is controlled by a set of non-uniform amplitude steps of the I and Q signals.
10. The BD vector modulator of claim 1, wherein each BD-VGA further comprises a polarity switch to create a four-quadrant phase shifter.
11. The BD vector modulator of claim 1, wherein a polyphase generator comprises the quadrature-phase coupler and two polarity switches to create four-quadrant phase signals with equal magnitude.
12. The BD vector modulator of claim 1, wherein the quadrature phase coupler, MN1s, and the first and the second BD-VGAs form a BD vector modulator element, and wherein the BD vector modulator comprises multiple BD vector modulator elements sharing the same MN2.
13. A method of active phase shifting using a bi-directional (BD) vector modulator, comprising: receiving an input signal by a quadrature phase coupler coupled to two first matching networks (MN1s), wherein the quadrature phase coupler converts the input signal to an I signal and a Q signal; amplifying the I signal by a first gain value using a first bi-directional variable gain amplifier (BD-VGA), wherein the first BD-VGA outputs an I signal onto a common node; amplifying the Q signal by a second gain value using a second BD-VGA, wherein the second BD-VGA outputs a Q signal onto the common node; and performing active current summing or current sharing at the common node, wherein the common node is coupled to a shared second matching network (MN2) for outputting an output signal, wherein the first and the second BD-VGAs share the same MN2, and wherein the BD vector modulator has adjustable input impedance and output impedance that match to the BD-VGAs for both switched amplifier directions.
14. The method of claim 13, wherein input signals flow from the first IC terminal to the quadrature phase coupler, wherein output currents from the BD-VGAs are summed onto the common node, wherein MN1s become input matching networks, and wherein MN2 becomes an output matching network for the BD vector modulator.
15. The method of claim 13, wherein input signals flow from the second IC terminal to MN2, wherein an input current on the common node is shared by the BD-VGAs, wherein MN1s become output matching networks, and wherein MN2 becomes an input matching network for the BD vector modulator.
16. The method of claim 13, wherein current summing or current sharing occurs the common node and thereby achieving active combining or splitting, for both switched amplifier directions without using passive structures.
17. The method of claim 13, wherein each BD-VGA is formed by a pair of high isolation cascode amplifiers to provide input and output isolation.
18. The method of claim 13, wherein each BD-VGA comprises a pair of amplifiers that provides a main gain level and a set of positive and negative gain steps to achieve variable gain levels in both switched amplifier directions.
19. The method of claim 13, wherein each BD-VGA comprises adjustable match loads with switched matching to achieve matched input and output impedance in both switched amplifier directions.
20. The method of claim 13, wherein the output signal phase is controlled by at least the amplitude of the I and Q signals.
21. The method of claim 13, wherein the output signal phase is controlled by a set of non-uniform amplitude steps of the I and Q signals.
22. The method of claim 13, wherein each BD-VGA further comprises a polarity switch to create a four-quadrant phase shifter.
23. The method of claim 13, wherein a polyphase generator comprises the quadrature-phase coupler and two polarity switches to create four-quadrant phase signals with equal magnitude.
24. The method of claim 13, wherein the quadrature phase coupler, MN1s, and the first and the second BD-VGAs form a BD vector modulator element, and wherein the BD vector modulator comprises multiple BD vector modulator elements sharing the same MN2.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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[0013]
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[0019]
DETAILED DESCRIPTION
[0020] Reference will now be made in detail to some embodiments of the invention, examples of which are illustrated in the accompanying drawings.
[0021]
[0022] If the input signal enters through the Quadrature-Phase coupler 101 (from the left side), the input signal is split into I and Q signals, resulting in a 90-degree phase shift between the I and Q signals. The two variable gain amplifiers (BD-VGA1 and BD-VGA2) adjust the amplitudes of the I and Q signals and the resultant I and Q signals are summed to achieve any signal phase shift within a quadrant. If the polarity of each of the I and Q signals can be inverted, the phase shifting can cover four quadrants (360-degree). This above description is for the case when the signal enters from the Quadrature-Phase coupler (from the left side) and the second and fourth transistors (112 and 114) from the top of the BD-VGA1 and BD-VGA2 are turned off. If the input signal enters from the active summing (the right) side, the first and third transistors (111 and 113) from the top of the BD-VGA1 and BD-VGA2 are turned off. It is necessary to change the current summer into a current divider under the control of V.sub.TX0 and V.sub.RX0 which indicates the signal flow direction (enters from right side or left side). The input signal enters from the right side is divided into two equal phase signals which go through the two BD-VGAs before they are combined through the Quadrature-Phase coupler 101.
[0023] When signal amplification direction is changed, the switchable impedance matching circuit are incorporated to achieve input and output matching. The key idea is to make the input and output impedance of each transistor pair (the pair consists of transistors 111 and 112, and the pair consists of transistors 113 and 114) looks identical regardless of whether the signal enters from the right side or left side. To achieve this, the switchable impedance matching circuit is switched on in one amplifier direction and switched off in another amplifier direction. In a preferred embodiment, each BD_VGA comprises match loads with switched matching to achieve identical input and output impedance in both switched amplifier directions. The two matching networks (IMNs and OMN) connected to the opposite sides of the two BD-VGAs are identical, which requires the two BD-VGAs to have the identical impedance in either amplifier direction.
[0024] The novel active bi-directional vector modulator 100 can be used to create a high-resolution phase shifter. Traditionally, a vector modulator uses a 90-degree splitter, two variable gain amplifiers, and a passive output summer. Such traditional vector modulator is a one directional phase shifter, and both 90-degree splitter and passive summer occupy large area. The novel vector modulator 100 replaces two variable gain amplifiers and the passive output summer with an active combiner which uses current combining technique to sum up the output current from two the variable gain amplifiers BD-VGA1 and BD-VGA2 (with invertible polarity). The two variable gain amplifiers BD-VGA1 and BD-VGA2 adjust the output currents to achieve variable gain, and thereby achieving the phase shifting of four quadrants (360-degree phase shift). As depicted in
[0025] The output current combining or input current sharing mechanism may be realized by two ways. First, a cascode amplifier is used in each BD_VGA to achieve high output impedance and input to output isolation. Second, an output matching network (e.g., OMN, preferred to be a differential transformer coil), is placed at the right node to transform impedance, also used as a matching component and the amplifier load. Using the switch matching in the BD-VGAs, the condition for achieving impedance match of active combining or splitting is met where the (input) left node impedance of each of the BD-VGA maintains the same in both signal flow directions, and the (output) right node impedance of each of the BD-VGA maintains the same in both signal flow directions, implying the right node impedance of the connected right nodes of BD-VGAs maintains the same in both signal flow directions.
[0026]
[0027] Current summing at the output matching network can be achieved in single phase shifter or sum of multiple phase shifters. To achieve the current summing, the output matching network OMN 230 must have significantly lower impedance than the output impedance of the transistor pairs in the BD-VGAs of the corresponding bi-directional vector modulator. Thus, the current from both pairs of transistors can flow to the output matching network. In
[0028]
[0029]
[0030] For each high isolation VGA, it comprises stack cascode transistor, transconductance amplifier, phase compensation, and VGA control. The stack cascode transistor T.sub.cas is in common-gate configuration which can not only increase VGA's isolation but also VGA's output impedance. Transistor T.sub.m is main transconductance amplifier (main amplifier) which gives a reference gain level (main gain level). Each transconductance pair (T.sub.0 to T.sub.n) contains a positive transconductance amplifier and a negative transconductance amplifier. Negative transconductance is created by swapping output differential terminals with respect to positive transconductance amplifier. Positive transconductance amplifiers and negative transconductance amplifiers are complementary turned on or off by B.sub.0 to B.sub.n. Positive gain step is achieved via current summing to the main amplifier and negative gain step is achieved via current subtraction to the main amplifier. The amount of gain step is precisely controlled by the transistor size ratio between the gain step amplifier and the main amplifier. There are two separate gain controls, one for each signal direction.
[0031] C.sub.c can be made of metal-oxide-metal (MOM) capacitor or metal-insulator-metal (MIM) capacitor or transistor or diode or any kind of component that can contribute capacitance. One example is to use the MOM capacitor and it's capacitance is set equal to T.sub.m's intrinsic gate-to-drain capacitance to perform neutralization which means the T.sub.m's intrinsic gate-to-drain capacitance would be canceled out. It not only can compensate out the phase dependence when VGA's gain is changed but also increase VGA's isolation. B.sub.0 and B.sub.1 . . . are used to control the amplifier gain. Mechanism of variable gain amplifier is as follow. Maximum gain level is created when all negative transconductance in transconductance pairs are turned off. The second peak gain level is created when only one negative transconductance in transconductance pairs is turned on. The third peak gain level is created when only two negative transconductance in transconductance pairs are turn on, so on so forth. The transconductance ratio (size of transistor T.sub.0 to T.sub.n) is selected to create desired gain step. Total gain step number is equal to transconductance pair number k.
[0032] The match load is used to make input and output capacitance to be equal. In this way, the optimized matching can be simultaneously achieved at input and output. In transmitter mode, the match load at Bi-directional VGA's output will be turned on and the match load at input will be turned off. While in receiver mode, the match load at Bi-directional VGA's output will be turned on and the match load at input will be turned off. Only one cascode transistor stack is turned on at a time. The match load with the switch (S.sub.a) attached to the cascode transistor stack is used to make the transistor impedance (capacitance) looks the same when one of the cascode transistor stack is switched off as when the cascode transistor stack is switched on. It switches on and off to connect or disconnect the capacitor (C.sub.m), to create the same parasitic when the amplifier switches direction. Thus, it is matched in either amplifier direction (i.e., the same input matching network and output matching network work for both amplifier directions). It should be noted that the invention is not restricted to the switched capacitor embodiment, any other switched impedance structure which provides the same impedance in both directions can be adopted in the current invention.
[0033] C.sub.m can be made of metal-oxide-metal (MOM) capacitor or metal-insulator-metal (MIM) capacitor or transistor or diode or any kind of component that can contribute capacitance. The reason is explained as following. When in transmitter mode, input of bi-directional VGA would see a cascode amplifier's input capacitance C.sub.gs capacitance while output would see a cascode amplifier's output capacitance C.sub.cas. Usually C.sub.gsC.sub.cas and if matching is optimized at specific frequency at input. For example, an inductor L.sub.1 is used to resonate out C.sub.gs at specific frequency. Then in receiver mode, now the input become receiver's output, once again, inductor L.sub.2 is used to resonate out C.sub.cas at the same frequency. Because C.sub.modC.sub.cas so L.sub.1L.sub.2. If resonate frequency is the same, as a result, simultaneous matching of transmitter input and receiver output would not occur. Also, it is hard to change L.sub.1 to L.sub.2 or L.sub.2 to L.sub.1 on chip. On the other hand, by adding a capacitor C.sub.m to make C.sub.mod=C.sub.cas C.sub.m, then the inductor could be used the same one to have the same resonate frequency. In other words, input and output of modulator can be simultaneously matched.
[0034] In accordance with one novel aspect, the proposed bi-directional vector modulator is an active phase shifter with low power implementation. The advantages of the proposed bi-directional vector modulator include: 1) Compact sizeBy active current combining technique, short transmission lines are used to perform signal combining rather than using area-consuming Wilkinson combiner or splitter; 2) High phase resolution and flexibilityphase interpolation can be performed by vector addition through m-path vector modulators; 3) High efficiencyno signal switch loss, only switched matching capacitor; 4) Simplified signal interconnection; 5) No passive combiner neededeliminate large size and losses in the passive combiner); 6) Can have unequal combining/splitting by changing the gain of vector modulator, which is difficult to realize with passive combining/splitting network; and 7) Can combine different signals (note passive combiner will have losses in isolation resistor).
[0035]
[0036]
Output.sub.p=.Math.{right arrow over (A)}.sub.I+.Math.{right arrow over (A)}.sub.Q(1)
[0037] Assume I-vector VGA is 90-degree phase difference with Q-vector VGA, then the {right arrow over (A)}.sub.I and {right arrow over (A)}.sub.Q are orthogonal. If we regard {right arrow over (A)}.sub.I as 0-degree phase reference and {right arrow over (A)}.sub.Q is positive 90-degree phase difference than {right arrow over (A)}.sub.I. Output.sub.p then can be expressed in polar coordinate system as following:
Where
[0038]
[0041] Therefore, by properly designing the amplitude gain values and in the BD-VGAs, phase shifting can be performed with a desired phase. Note that control signals B.sub.s1, B.sub.s2 in polarity switches 511 and 512 give the ability to assign whether and is positive or negative value. As shown in
[0042] The value of and can be scaled by multiplying a real number. To maintain the same magnitude for each state, and are designed as cosine and sine function. The uniform signal phase step is controlled by a set of non-uniform amplitude steps of the I=.Math.{right arrow over (A)}.sub.I and Q=.Math.{right arrow over (A)}.sub.Q signals. Note that the non-uniform steps are obtained from the projection of signal constellation onto I and Q axis. To make the circuit to be realizable, the value of and are carefully designed to prevent too much digitals number after its decimal point. Control B.sub.n is used to choose the Gm sign of the transconductance pairs, in other words, to decide whether positive or negative Gm the transconductance pair is. The total Gm for the VGA can be expressed as following:
[0043] Where [0044] Gm.sub.main is the Gm of main transconductance stage, [0045] Gm.sub.i are the Gm of transconductance pairs, [0046] K.sub.i is the value of 1 or 1 depending on control bits B.sub.n, [0047] n is the number of transconductance pairs.
[0048] By properly designing the transistor size for main stage transconductance and the transconductance pairs, the desired and can be derived with some scaling task. Note that the output loading is very stable when Gm is changed in the BD-VGAs owing to the neutralization of the transistor. That is, the change of output signal magnitude is only depending on VGA's Gm.
[0049] Note that the gain steps of the first variable gain amplifier are determined by the projection of each phase point onto axis, i.e., r*cos(i). Thus, the gain steps of the first variable gain amplifier are not uniform. The gain step controlled by each differential transistor pair is proportional to the transistor size (width). The second variable gain amplifier implements the project of phase points onto axis, i.e., r*sin(i). Similarly, the gain step controlled by each differential transistor pair in the second variable gain amplifier is proportional to the transistor size (width).
[0050] To extend the phase range from 90 degree to 360 degree, the polarity switch is designed in the vector modulator. It can swap the signal by controlling B.sub.s1, B.sub.s2, in other words, it can make the signal be with positive or negative sign. The value of and then can be either positive or negative. That is, states in quadrant I can be transformed to quadrant II, III, or IV by the sign change of and . Note that in m paths vector modulator, each path of vector modulator represents a vector that can be added or subtracted by others based on vector addition mathematic of equation (1). There will be m vectors to be signal combined which can further increase the phase resolution, as compared to only one path vector modulator is adopted.
[0051]
[0052] The coupled lines are designed by two vertically-coupled metal lines for symmetricity, and is with spiral geometric. The spiral geometric is to increase inductive energy stored in the couple lines and to reduce area consumptions. The couple lines with high inductive energy can slow the signal wave velocity, and can make it reach the quarter-wave resonate frequency under smaller area occupation. Coupled line's input and through ports are at top metal, while coupled and isolated ports are at the metal which is below the top metal. The ground is at bottom metal. The isolated port will be terminated by 50 ohm resistance, R.sub.b, as depicted in
[0053] For phase compensation, the through port would be 90-degree phase lagging to couple port by coupled line natural response. Due to through port is at top metal which is farer from ground located at bottom metal layer than coupled port, the through port would be less than 90-degree phase lagging to coupled port. As depicted in
[0054]
[0055] Although the present invention has been described in connection with certain specific embodiments for instructional purposes, the present invention is not limited thereto. Accordingly, various modifications, adaptations, and combinations of various features of the described embodiments can be practiced without departing from the scope of the invention as set forth in the claims.