Method and control system for controlling a voltage source converter using power-synchronization control

Abstract

A method of controlling a grid-connected voltage source converter, VSC, using power-synchronisation control, wherein the method includes: determining an active power control error, determining a VSC phase angle based on an integration of a sum including a scaled active power control error and a scaled imaginary part of a voltage of common coupling, determining a damping component based on a virtual damping resistance, a VSC current vector and a reference current vector for the VSC current vector, determining a voltage vector based on a VSC voltage magnitude and the damping component, transforming the voltage vector to a current vector, comparing a magnitude of the current vector with a maximum threshold current value, and in case the magnitude of the current vector is greater than the maximum threshold current value: reducing the magnitude of the current vector to a value below the maximum threshold current value to obtain a limited current vector, transforming the limited current vector to a limited voltage vector, controlling the VSC based on the VSC phase angle and the limited voltage vector, multiplying an imaginary part of a voltage of common coupling with a gain to obtain a scaled imaginary part of voltage of common coupling.

Claims

1. A method of controlling a grid-connected voltage source converter, VSC, using power-synchronisation control, wherein the method comprises: determining a VSC phase angle () based on an integration of a sum including a scaled active power control error and a scaled imaginary part of a voltage of common coupling, determining a damping component based on a virtual damping resistance (R.sub.a), a VSC current vector (i) and a reference current vector (i.sub.ref) for the VSC current vector (i), determining a voltage vector (v) based on a VSC voltage magnitude (V) and the damping component, transforming the voltage vector (v) to a current vector (i.sub.ref.sup.inner), comparing a magnitude of the current vector (i.sub.ref.sup.inner) with a maximum threshold current value (I.sub.max), and in case the magnitude of the current vector (i.sub.ref.sup.inner) is greater than the maximum threshold current value (I.sub.max): reducing the magnitude of the current vector (i.sub.ref.sup.inner) to a value below or equal to the maximum threshold current value (I.sub.max) to obtain a limited current vector (i.sub.ref.sup.inner,limited), transforming the limited current vector (i.sub.ref.sup.inner,limited) to a limited voltage vector-(v.sup.limited), controlling the VSC based on the VSC phase angle () and the limited voltage vector (v.sup.limited), multiplying an imaginary part (v.sub.pq) of a voltage of common coupling with a gain to obtain the scaled imaginary part of voltage of common coupling.

2. The method as claimed in claim 1, wherein the gain is a PLL gain (K.sub.PLL) divided with a power control gain (K.sub.p) and the scaled imaginary part of voltage of common coupling is added to the active power control error.

3. The method as claimed in claim 2, comprising transforming the limited voltage vector (v.sup.limited) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the controlling involves using the transformed voltage vector (v.sup.s) to control the VSC.

4. The method as claimed in claim 2, wherein in case the magnitude of the current vector (i.sub.ref.sup.inner) is below the maximal threshold current value (I.sub.max), the method includes: transforming the current vector (i.sub.ref.sup.inner) back to the voltage vector (v), and controlling the VSC based on the VSC phase angle () and the voltage vector (v).

5. The method as claimed in claim 1, wherein in case the magnitude of the current vector (i.sub.ref.sup.inner) is below the maximal threshold current value (I.sub.max), the method includes: transforming the current vector (i.sub.ref.sup.inner) back to the voltage vector (v), and controlling the VSC based on the VSC phase angle () and the voltage vector (v).

6. The method as claimed in claim 5, comprising transforming the voltage vector (v) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the controlling involves using the transformed voltage vector (v.sup.s) to control the VSC.

7. The method as claimed in claim 1, wherein the damping component is determined by determining a current error vector based on the reference current vector (i.sub.ref) and the VSC current vector (i), and multiplying the virtual damping resistance (R.sub.a) with the current error vector.

8. The method as claimed in claim 1, wherein the gain (K.sub.PLL) is a PLL gain (K.sub.PLL) and the scaled imaginary part of voltage of common coupling is added to a scaled active power control error which is the active power control error multiplied with a power control gain (K.sub.p) and to a nominal angular grid frequency (.sub.1).

9. The method as claimed in claim 1, comprising transforming the limited voltage vector (v.sup.limited) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the controlling involves using the transformed voltage vector (v.sup.s) to control the VSC.

10. A non-transitory computer-readable medium storing a computer program comprising computer code which when executed by processing circuitry of a control system causes the control system to perform a method including: determining a VSC phase angle based on an integration of a sum including a scaled active power control error and a scaled imaginary part of a voltage of common coupling, determining a damping component based on a virtual damping resistance, a VSC current vector and a reference current vector for the VSC current vector, determining a voltage vector based on a VSC voltage magnitude and the damping component, transforming the voltage vector to a current vector (i.sub.ref.sup.inner), comparing a magnitude of the current vector (i.sub.ref.sup.inner) with a maximum threshold current value, and in case the magnitude of the current vector (i.sub.ref.sup.inner) is greater than the maximum threshold current value: reducing the magnitude of the current vector (i.sub.ref.sup.inner) to a value below or equal to the maximum threshold current value to obtain a limited current vector (i.sub.ref.sup.inner,limited), transforming the limited current vector (i.sub.ref.sup.inner,limited) to a limited voltage vector, controlling the VSC based on the VSC phase angle and the limited voltage vector, multiplying an imaginary part of a voltage of common coupling with a gain to obtain the scaled imaginary part of voltage of common coupling.

11. A control system for controlling a grid-connected voltage source converter, VSC, using power-synchronization control, wherein the control system comprises: a storage medium comprising computer code, and processing circuitry, wherein when the computer code is executed by the processing circuitry, the control system is configured to: determine a VSC phase angle () based on an integration of a sum including a scaled active power control error and a scaled imaginary part of a voltage of common coupling, determine a damping component based on a virtual damping resistance (R.sub.a), a VSC current vector (i) and a reference current vector (i.sub.ref) for the VSC current vector (i), determine a voltage vector (v) based on a VSC voltage magnitude (V) and the damping component, transform the voltage vector (v) to a current vector (i.sub.ref.sup.inner), compare a magnitude of the current vector (i.sub.ref.sup.inner) with a maximum threshold current value (I.sub.max), and in case the magnitude of the current vector (i.sub.ref.sup.inner) is greater than the maximum threshold current value (I.sub.max): reduce the magnitude of the current vector (i.sub.ref.sup.inner) to a value below the maximum threshold current value to obtain a limited current vector (i.sub.ref.sup.inner,limited), transform the limited current vector (i.sub.ref.sup.inner,limited) to a limited voltage vector (v.sup.limited), control the VSC based on the VSC phase angle () and the limited voltage vector (v.sup.limited), multiply an imaginary part (v.sub.pq) of a voltage of common coupling with a gain to obtain a scaled imaginary part of voltage of common coupling.

12. The control system as claimed in claim 11, wherein the control system is configured to transform the limited voltage vector (v) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the control system is configured to control the VSC using the transformed voltage vector (v.sup.s).

13. The control system as claimed in claim 11, wherein in case the magnitude of the current vector (i.sub.ref.sup.inner) is below the maximal threshold current value (I.sub.max), the control system is configured to: transform the current vector back (i.sub.ref.sup.innerr) to the voltage vector (v), and control the VSC based on the VSC phase angle () and the voltage vector (v).

14. The control system as claimed in claim 13, wherein the control system is configured to transform the voltage vector (v) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the control system is configured to control the VSC using the transformed voltage vector (v.sup.s).

15. The control system as claimed in claim 11, wherein the control system is configured to determine the damping component by determining a current error vector based on the reference current vector (i.sub.ref) and the VSC current vector (i), and multiplying the virtual damping resistance with the current error vector.

16. The control system as claimed in claim 11, wherein the gain is a PLL gain (K.sub.PLL), wherein the control system is configured to add the scaled imaginary part of voltage of common coupling to a scaled active power control error which is the active power control error multiplied with a power control gain (K.sub.p), and to a nominal angular grid frequency.

17. The control system as claimed in claim 11, wherein the gain is a PLL gain (K.sub.PLL) divided with a power control gain (K.sub.p), wherein the control system is configured to add the scaled imaginary part of voltage of common coupling to the active power control error.

18. The control system as claimed in claim 17, wherein the control system is configured to transform the limited voltage vector (v) to a stationary frame using the VSC phase angle () to obtain a transformed voltage vector (v.sup.s), wherein the control system is configured to control the VSC using the transformed voltage vector (v.sup.s).

19. The control system as claimed in claim 17, wherein in case the magnitude of the current vector (i.sub.ref.sup.inner) is below the maximal threshold current value (I.sub.max), the control system is configured to: transform the current vector back (i.sub.ref.sup.inner) to the voltage vector (v), and control the VSC based on the VSC phase angle () and the voltage vector (v).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The specific embodiments of the inventive concept will now be described, by way of example, with reference to the accompanying drawings, in which:

(2) FIG. 1 schematically shows an example of a control system for controlling a grid-connected VSC using power-synchronisation control;

(3) FIG. 2 schematically shows a circuit model of a grid-connected VSC controlled by the control system in FIG. 1;

(4) FIG. 3a schematically depicts a block diagram showing one example of the control of a grid-connected VSC using the herein described power-synchronisation control;

(5) FIG. 3b schematically depicts a block diagram showing another example of the control of a grid-connected VSC using the herein described power-synchronisation control;

(6) FIG. 4a shows a fault response for traditional power-synchronisation control; and

(7) FIG. 4b shows the corresponding fault response using the control method shown in FIG. 3a or 3b.

DETAILED DESCRIPTION

(8) The inventive concept will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplifying embodiments are shown. The inventive concept may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided by way of example so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concept to those skilled in the art. Like numbers refer to like elements throughout the description.

(9) FIG. 1 shows an example of a control system 1 for controlling a grid-connected VSC using power-synchronisation control. The control system 1 comprises processing circuitry 3 and a storage medium 5.

(10) The processing circuitry 3 may use any combination of one or more of a suitable central processing unit (CPU), multiprocessor, microcontroller, digital signal processor (DSP), application specific integrated circuit (ASIC), field programmable gate arrays (FPGA) etc., capable of executing any herein disclosed operations concerning VSC control.

(11) The storage medium 5 may for example be embodied as a memory, such as a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), or an electrically erasable programmable read-only memory (EEPROM) and more particularly as a non-volatile storage medium of a device in an external memory such as a USB (Universal Serial Bus) memory or a Flash memory, such as a compact Flash memory.

(12) FIG. 2 shows a grid-connected VSC 7. The control system 1 is configured to control the VSC 7. The VSC 7 is connected to an AC network 9 and to a DC network ii. An inductor 13 with inductance L.sub.c symbolises the filter inductance of the VSC 7. A voltage of common coupling v.sub.p.sup.s is located at one end of the inductor 13. In particular, the inductor 13 has one terminal connected to the VSC 7 and the voltage of common coupling v.sub.p.sup.s is at the other end of the inductor 13.

(13) The control system 1 is configured to obtain electric parameters from the grid. Such electric parameters may for example be VSC currents to obtain a measured stationary VSC current vector i.sup.s and VSC voltages to obtain a measured stationary VSC voltage vector v.sup.s, used for determining an active power output P, and the voltage of common coupling v.sub.p.sup.s. A current/voltage meter may for example be used to measure these parameters. Alternatively, the voltage of common coupling could be estimated based on the inductance 13 and the measured stationary VSC current vector i.sup.s. With the term stationary is meant that the electric parameter in question is in a stationary frame. The s superscript denotes the stationary frame, in particular the -frame.

(14) FIG. 3a depicts a block diagram showing an example of the control of the grid-connected VSC 7 by means of the control system 1, using power-synchronisation control. The blocks of the block diagram are implemented by the processing circuitry 3 as hardware and/or software.

(15) In a first block 15 an active power control error is determined. The active power control error is determined by the difference between the active power output P and an active power reference P.sub.ref for the VSC 7.

(16) In a second block 17, the active power control error is multiplied with a power control gain K.sub.p, to obtain a scaled active power control error. The power control gain K.sub.p is a constant. The power control gain K.sub.p typically has unit rad/(Ws) or similar, generally based on how the system is normalised.

(17) In a third block 19, an angular frequency .sub.1, is added to the scaled active power control error. The angular frequency .sub.1 is in particular the nominal angular grid frequency. The angular frequency .sub.1 corresponds to the angular frequency with which the space vectors of e.g. the measured stationary VSC current vector i.sup.s rotate in the stationary frame.

(18) In an integration block 21, the sum of the scaled active power control error and the angular frequency .sub.1 is integrated according to equation (1). In this manner, the VSC phase angle is obtained.

(19) The output from the integration block 21, i.e. the VSC phase angle is sent to a first exponential block 22 to obtain e.sup.j.

(20) The output from the integration block 21, i.e. the VSC phase angle is also sent to a second exponential block 23 to obtain e.sup.j.

(21) In a fourth block 25, the output from the second exponential block 23, i.e. e.sup.j is multiplied with the stationary VSC current vector i.sup.s as obtained by a measurement. The stationary VSC current vector i.sup.s is thus transformed into a VSC current vector i in the dq-frame.

(22) In a fifth block 27, a current error vector from the VSC current vector i in the dq-frame and the reference current vector i.sub.ref is determined. In particular, one of the VSC current vector i and the reference current vector i.sub.ref is subtracted from the other to obtain the current error vector.

(23) In a sixth block 29, a damping component is determined. In particular a virtual damping resistance R.sub.a is multiplied with the current error vector to obtain the damping component R.sub.a*(ii.sub.ref) or R.sub.a*(i.sub.refi), the sign depending on the direction of the VSC current vector i. The virtual damping resistance R.sub.a, also known as active resistance or virtual resistance, does not form part of the actual grid. The virtual damping resistance R.sub.a is used to increase the robustness of the control, in particular to provide damping in the event of transients.

(24) In a seventh block 31, a voltage vector v is determined by adding the damping component and a VSC voltage magnitude V. Thus, the voltage vector v=V+R.sub.a*(ii.sub.ref), or alternatively V+R.sub.a*(i.sub.refi) is obtained. The VSC voltage magnitude V can for example be selected to be constant, e.g. 1 per unit (p.u.).

(25) Alternatively, the VSC magnitude V can be selected using a specific control loop for this purpose. The voltage magnitude V is a real component in the dq-frame. The voltage vector v=V+R.sub.a*(i.sub.refi) is a real number in a stationary state, because then i.sub.refi=0. During transients R.sub.a*(i.sub.refi) provides damping and may include a complex and a real component, the latter then being added to the real-valued voltage magnitude V in the dq-frame.

(26) In an eighth block 33 the voltage vector i.sup.s transformed to a current vector i.sub.ref.sup.inner. The magnitude, i.e. the modulus of the current vector i.sub.re.sup.inner is compared with a maximum threshold current value I.sub.max in a ninth block 35. To this end, the absolute value |i.sub.ref.sup.inner| is compared to I.sub.max.

(27) In the event that the magnitude of the current vector i.sub.ref.sup.inner is larger than the maximum threshold current value I.sub.max, the magnitude of the current vector i.sub.ref.sup.inner is reduced in the ninth block 35 to become less than or equal to the maximum threshold current value I.sub.max. In a variation where the magnitude of the current vector i.sub.ref.sup.inner is reduced to be less than the maximum threshold current value I.sub.max, the magnitude may be set to any number just below the maximum threshold current value I.sub.max, i.e. |i.sub.ref.sup.inner|<I.sub.max. The angle of the current vector i.sub.ref.sup.inner is hence not affected by this operation; only the magnitude is reduced/scaled down. In this manner the current vector i.sub.ref.sup.inner becomes a limited current vector i.sub.ref.sup.inner,limited. This situation typically occurs during a grid fault.

(28) In the aforementioned event with the limited current vector i.sub.ref.sup.inner,limited, in a tenth block 37 the limited current vector i.sub.ref.sup.inner, limited is transformed to a limited voltage vector v.sup.limited. This transformation is an inverse transformation of the transformation carried out in the eighth block 33. In an eleventh block 39 the limited voltage vector v.sup.limited is transformed to the stationary frame, in particular the -frame by multiplication with the output from the first exponential block 22, i.e. e.sup.j. A transformed voltage vector v.sup.s=v.sup.limited e.sup.j is thus obtained. The transformed voltage vector v.sup.s is in the -frame.

(29) The transformed voltage vector v.sup.s is used for controlling the VSC 7. The control system 1 is thus configured to control the VSC 7 based on the transformed voltage vector v.sup.s.

(30) If it is determined that the magnitude of the current vector i.sub.ref.sup.inner is larger than the maximum threshold current value I.sub.max in the ninth block 35, the ninth block 35 sends a flag with the value 1 to a twelfth block 41. An imaginary part v.sub.pq of a voltage of common coupling v.sub.p is multiplied with the flag in the twelfth block 41, i.e. the imaginary part v.sub.pq of the voltage of common coupling v.sub.p is multiplied with 1. The imaginary part v.sub.pq of the voltage of common coupling v.sub.p is a component in the dq-frame. The imaginary part v.sub.pq of the voltage of common coupling v.sub.p is in particular the q-component of the voltage of common coupling v.sub.p in the dq-frame.

(31) According to the example in FIG. 3a, the output from the twelfth block 41, i.e. the imaginary part v.sub.pq of the voltage of common coupling v.sub.p is multiplied with a PLL gain K.sub.PLL in a thirteenth block 43a to obtain a scaled imaginary part of the voltage of common coupling v.sub.p. The PLL gain K.sub.PLL has unit rad/Vs.

(32) The scaled imaginary part of the voltage of common coupling v.sub.pq is fed to the third block 19 together with a subsequent scaled active power control error from the second block 17. The subsequent scaled active power control error is the scaled active power control error obtained in the subsequent iteration of the control method, which has not yet been used for controlling the VSC 7.

(33) The scaled imaginary part of the voltage of common coupling v.sub.p is added to an angular frequency .sub.1, and to the subsequent scaled active power control error obtained from the second block 17. These three components are then integrated in the integration block 21 to obtain a subsequent phase angle :
=[.sub.1+K.sub.p(PP.sub.ref)+K.sub.PLL*v.sub.pq]dt(2)

(34) The general form of the above expression may be written as
=[.sub.1+K.sub.p(PP.sub.ref)+K.sub.PLL*v.sub.pq.sup.PLL]dt(3)

(35) V.sub.pq may according to one variation be filtered through a low-pass filter to suppress harmonics and the fundamental negative-sequence component, if present.

(36) The subsequent phase angle is sent to the first exponential block 22 to obtain e.sup.j. The subsequent phase angle is also sent to the second exponential block 23, and the steps performed in blocks 25-33 as described above are repeated using the subsequent phase angle . The magnitude of the current vector i.sub.ref.sup.inner is again compared with the maximum threshold current value I.sub.max in the ninth block 35. If it is again determined that the magnitude of the current vector i.sub.ref.sup.inner is larger than the maximum threshold current value I.sub.max, the magnitude of the current vector i.sub.ref.sup.inner is limited in the ninth block 35 to become less than or equal to the maximum threshold current value I.sub.max. The thus obtained limited current vector i.sub.ref.sup.inner,limited is transformed to the limited voltage vector v.sup.limited in the tenth block 37 and sent to the eleventh block 39 for controlling of the VSC 7 as described above. The flag maintains the value 1, and the imaginary part v.sub.pq of the voltage of common coupling v.sub.p is again sent through the thirteenth block 43a as previously described and the procedure is repeated.

(37) If on the other hand it is determined in block 35 that the magnitude of the current vector i.sub.ref.sup.inner is smaller than or equal with the maximum threshold current value I.sub.max, no current limitation is necessary. This is typically the case when the grid operates under normal conditions. The ninth block 35 then sends a flag with the value 0 to the twelfth block 41. Thus, the imaginary part v.sub.pq of the voltage of common coupling v.sub.p is multiplied with 0 and the output of the twelfth block 41 is zero. The current vector i.sub.ref.sup.inner is transformed back to the voltage vector v in the tenth block 37 and sent to the eleventh block 39 where it is transformed to the stationary frame, by multiplication with the output from the first exponential block 22, i.e. e.sup.j. A transformed voltage vector v.sup.s=ve.sup.j is thus obtained, which is used for controlling the VSC 7.

(38) FIG. 3b shows a block diagram of an example which slightly differs from the configuration shown in FIG. 3a. In this example, when the flag is set to 1, the imaginary part v.sub.pq of the voltage of common coupling v.sub.p is sent to the thirteenth block 43b which has a gain K.sub.PLL/K.sub.p which is the PLL gain K.sub.PLL divided with the power control gain K.sub.p. The output of the thirteenth block 43b is sent to the first block 15 and added to the subsequent active power control error PP.sub.ref so that the first block 15 outputs PP.sub.ref+v.sub.pq*K.sub.PLL/K.sub.p to the second block 17. The output of the second block 17 is sent to the third block 19 where the nominal angular grid frequency .sub.1 is added. The output of the third block 19 is integrated in integration block 21 to obtain a subsequent phase angle :

(39) $\begin{array}{cc}=\left[{}_1+K_p\left(P-P_{\mathrm{ref}}+\frac{K_{\mathrm{PLL}}}{K_p}*v_{\mathrm{pq}}\right)\right]\mathrm{dt}& \left(4\right)\end{array}$

(40) The general form of the above expression may be written as

(41) $\begin{array}{cc}=\left[{}_1+K_p\left(P-P_{\mathrm{ref}}+\frac{K_{\mathrm{PLL}}}{K_p}*v_{\mathrm{pq}}^{\mathrm{PLL}}\right)\right]\mathrm{dt}& \left(5\right)\end{array}$

(42) The remaining steps of this variation are the same as in the example shown in FIG. 3a.

(43) Thus, in general, it can be stated that the scaled imaginary part of the voltage of common coupling v.sub.p is added as a term in the integration only in instances when current limitation is being performed.

(44) FIG. 4a shows the response for traditional power-synchronisation control using current limitation in a simulation of a balanced fault. In this simulation, the grid is strong, and the balanced fault occurs at t=0.2 s. The fault is cleared at t=0.6 s. Transient overcurrent is avoided, but synchronism is lost. The uppermost graph shows the angle , which is the angle difference between the VSC voltage and grid voltage, and the imaginary part and the real part of the voltage vector v. The second graph from the top shows the real parts and imaginary parts of the current i vector and the reference current vector i.sub.ref, the third graph shows the active power output P and the active power reference P.sub.ref, and the lowermost graph shows the DC voltage v.sub.dc at the DC side of the VSC 7. The synchronisation is lost at the onset and at the end of the fault. By contrast, referring to FIG. 4b, for the corresponding simulation with the herein described control method, the synchronism is maintained.

(45) The inventive concept has mainly been described above with reference to a few examples. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the inventive concept, as defined by the appended claims. For example, in one variation, the flag may always be greater than zero, i.e. flag>0. In this case, in the event that the magnitude of the current vector is smaller than or equal to the maximum threshold current value the flag may have a value close to zero that in effect makes the product of the multiplication with the imaginary part of voltage of common coupling essentially zero. In case the magnitude of the current vector is larger than the maximum threshold current value a flag with the value 1 may be used as described above.