Radar Transceiver

Abstract

Example embodiments relate to radar transceivers. One embodiment includes a radar transceiver. The radar transceiver includes a chirp generator for generating a chirp having an initial frequency and a final frequency. The radar transceiver also includes a controllable variable gain amplifier having an input connected to an output of the chirp generator. Further, the radar transceiver includes a control unit connected to a control input on the chirp generator and to a control input on the controllable variable gain amplifier. The control unit is adapted to output a first control signal to the chirp generator such that the chirp generator starts generating the chirp. The control unit is also adapted to output a second control signal to the controllable variable gain amplifier such that the controllable variable gain amplifier starts increasing an amplification in the controllable variable gain amplifier from a first amplification level to a second amplification level.

Claims

1. A radar transceiver, comprising: a chirp generator for generating a chirp having an initial frequency and a final frequency; a controllable variable gain amplifier having an input connected to an output of the chirp generator; and a control unit connected to a control input on the chirp generator and to a control input on the controllable variable gain amplifier, wherein the control unit is adapted to: output a first control signal to the chirp generator such that the chirp generator starts generating the chirp; output a second control signal to the controllable variable gain amplifier such that the controllable variable gain amplifier starts increasing an amplification in the controllable variable gain amplifier from a first amplification level, along a slope, to a second amplification level; and output the first control signal and the second control signal such that a start of generating the chirp coincides with a start of the increase in amplification.

2. The radar transceiver according to claim 1, wherein the chirp generator comprises a digitally controlled oscillator.

3. The radar transceiver according to claim 1, wherein the controllable variable gain amplifier comprises a digitally controlled amplifier.

4. The radar transceiver according to claim 1, wherein the chirp ends after a chirp duration, and wherein the control unit is further adapted to output the second control signal to the controllable variable gain amplifier such that the controllable variable gain amplifier starts decreasing the amplification in the controllable variable gain amplifier from the second amplification level, along a slope, to a third amplification level such that an end of the chirp duration coincides with a time at which the amplification in the controllable variable gain amplifier reaches the third amplification level.

5. The radar transceiver according to claim 4, wherein the control unit is further adapted to output the first control signal such that a time duration between a start of at least two consecutive chirps is greater than the chirp duration.

6. The radar transceiver according to claim 5, wherein the controllable variable gain amplifier has a first operating mode and a second operating mode, wherein a power consumption in the controllable variable gain amplifier is higher in the first operating mode than in the second operating mode, and wherein the control unit is further adapted to set the controllable variable gain amplifier in the first operating mode before a start of the chirp duration and set the controllable variable gain amplifier in the second operating mode after an end of the chirp duration.

7. The radar transceiver according to claim 6, wherein the slope is linear.

8. The radar transceiver according to claim 7, wherein a time duration during which the amplification in the controllable variable gain amplifier increases from the first amplification level to the second amplification level is between 0% and 10% of the chirp duration.

9. The radar transceiver according to claim 8, wherein a time duration during which the amplification in the controllable variable gain amplifier decreases from the second amplification level to the third amplification level is between 0% and 10% of the chirp duration.

10. The radar transceiver according to claim 9, wherein the radar transceiver comprises receiver circuitry adapted to operate in a first operating mode and a second operating mode, wherein a power consumption in the receiver circuitry is higher in the first operating mode than in the second operating mode, and wherein the control unit is further adapted to set the receiver circuitry in the second operating mode after an end of the chirp duration.

11. The radar transceiver according to claim 10, wherein the control unit is further adapted to: receive an input signal representative of a presence or a velocity of an object within a detection range of the radar transceiver; and adjust a time duration between a start of at least two consecutive chirps based on the received input signal.

12. A method implemented in a radar transceiver, comprising: generating a chirp using a chirp generator; simultaneously amplifying, using a controllable variable gain amplifier, the chirp at a first amplification level; and increasing the amplification of the chirp from the first amplification level along a slope to a second amplification level during at least a portion of a time interval during which the chirp is generated.

13. The method according to claim 12, wherein the chirp ends after a chirp duration, and wherein the method further comprises decreasing, subsequent to reaching the second amplification level, the amplification along a slope to a third amplification level such that an end of the chirp duration coincides with a time instant at which the amplification reaches the third amplification level.

14. The method according to claim 13, further comprising generating consecutive chirps such that a time duration between a start of at least two consecutive chirps is greater than the chirp duration.

15. The method according to claim 14, wherein the controllable variable gain amplifier has a first operating mode and a second operating mode, wherein a power consumption in the controllable variable gain amplifier is higher in the first operating mode than in the second operating mode, and wherein the method further comprises: setting the controllable variable gain amplifier in the first operating mode before a start of the chirp duration; and setting the controllable variable gain amplifier in the second operating mode after an end of the chirp duration.

16. The method according to claim 15, wherein the slope is linear.

17. The method according to claim 16, wherein a time duration during which the amplification in the controllable variable gain amplifier increases from the first amplification level to the second amplification level is between 0% and 10% of the chirp duration.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The above, as well as additional features, will be better understood through the following illustrative and non-limiting detailed description of example embodiments, with reference to the appended drawings, where the same reference numerals will be used for similar elements.

[0052] FIG. 1 is a schematic block diagram of a transceiver, according to example embodiments.

[0053] FIG. 2 diagrammatically illustrates timing signals for the transceiver in FIG. 1, according to example embodiments.

[0054] FIG. 3 diagrammatically illustrates timing signals for chirp generation, according to example embodiments.

[0055] FIG. 4 diagrammatically illustrates timing signals for chirp generation, according to example embodiments.

[0056] FIG. 5 diagrammatically illustrates timing signals for chirp generation, according to example embodiments.

[0057] FIG. 6 diagrammatically illustrates timing signals for chirp generation, according to example embodiments.

[0058] FIG. 7 diagrammatically illustrates timing signals for chirp generation, according to example embodiments.

DETAILED DESCRIPTION

[0059] FIG. 1 illustrates a radar transceiver 100 according to example embodiments. A control unit 101, comprising a number of outputs 101a-101c, generates control signals to control the operation of other components in the transceiver 100. The control signals can be, but are not limited to, trigger pulses, enable signals, and/or ramp signals. According to different embodiments, the control unit 101 can be a chirp finite-state-machine, FSM, a processor with software code portions for generating control signals, or any other type of device suitable for generating control signals.

[0060] A chirp generator 102, comprising an input 102a and an output 102b, receives the control signals provided at output 101b from the control unit at the input 102a. As a response to receiving a signal at the input 102a, the chirp generator 102 generates a frequency chirp having an initial frequency, f.sub.0, and a final frequency, f.sub.1, and provides it at the output 102b. According to example embodiments, the chirp generator 102 is based on a digitally controlled oscillator, DCO. In order to provide a chirp with a well-defined frequency spectrum, the DCO may be first locked to an initial frequency f.sub.0 by a frequency-locked loop, FLL. At the start of the chirp, the loop is opened, and the DCO frequency starts to chirp to the targeted final frequency

[0061] The output 102b of the chirp generator 102 is forwarded to a controllable variable gain amplifier 103. The controllable variable gain amplifier 103, comprising a signal input 103a and a control input 103b and an output 103c, receives the output 102b from the chirp generator 102 at the signal input 103a. The level of amplification in the controllable variable gain amplifier 103, at which the signal received at the first input 103a is amplified and sent out at the output 103c, can be varied and controlled by sending a signal to the control input 103b.

[0062] A control signal is sent from the output 101a of the control unit 101 to the control input 103b of the controllable variable gain amplifier 103. As a response to the signal received at control input 103b, the controllable variable gain amplifier 103 starts increasing the amplification from a first amplification level, A.sub.1, along a slope, to a second amplification level, A.sub.2. According to example embodiments, the control unit 101 is adapted to output the control signal at output 101b to the chirp generator 102 and the control signal at output 101a to the controllable variable gain amplifier 103 such that the start of generating the chirp coincides with the start of the increase in amplification.

[0063] According to one embodiment, the control unit 101 is further adapted to send a control signal from output 101a of the control unit 101 to the control input 103b of the controllable variable gain amplifier 103, such that the controllable variable gain amplifier 103 starts decreasing the amplification from the second amplification level, A.sub.2, along a slope, to a third amplification level, A.sub.3. This may be done such that the end of the chirp (i.e. when the frequency at the output 102b of chirp generator 102 has reached frequency f.sub.1) coincides with a time instant when the amplification in the controllable variable gain amplifier 103 reaches the third amplification level, A.sub.3. The amplification levels A.sub.1 and A.sub.3 may be different. However, in some embodiments, A.sub.1 and A.sub.3 are equal. In addition, in some embodiments, A.sub.1 and A.sub.3 are equal to zero.

[0064] According to some embodiments, the controllable variable gain amplifier 103 is a digitally controlled amplifier, DCA. The control signals received at the control input 103b may be in serial or parallel form. The signals may be binary coded or coded in any other format suitable for controlling the amplification in the DCA.

[0065] According to some embodiments, the controllable variable gain amplifier 103 is an analog voltage or current controlled amplifier. The control signals received at the control input 103b may in this case be a voltage or current signal suitable for controlling the amplification in the amplifier.

[0066] The amplified output 103c signal from the controllable variable gain amplifier 103 is forwarded to a transmitting antenna 104, from which the amplified chirp signal is transmitted as a radar signal.

[0067] The transmitted radar signal is reflected on a target and returned to transceiver where the returning signal is picked up by a receiving radar antenna 105. From the receiving antenna 105, the signal is forwarded to a receiver circuitry 106. According to an embodiment, the receiver circuitry comprises a low-noise amplifier, LNA, 107, a frequency mixer 108, a high-pass filter, HPF, 109, a low-pass filter, LPF, 110, and an analog-to-digital convertor, ADC, 111 for digitization.

[0068] The signal from the receiving radar antenna 105 is received at the input of a low-noise amplifier 107. At the low-noise amplifier 107, the signal is amplified in order to provide a signal of a sufficient amplitude for the subsequent components of the receiver circuitry 106.

[0069] A frequency mixer 108, comprising a first 108a and a second 108b input and an output 108c, receives the output from the low-noise amplifier 107 at its first input 108a. The chirp signal sent from the chirp generator 102 to the controllable variable gain amplifier 103 is also sent to the frequency mixer 108 and received at the second input 108b. As the signal received by the receiving radar antenna 105 may be Doppler shifted with respect to the signal originally transmitted by the transmitting antenna 104, the mixer outputs the difference between the two frequencies received at the inputs 108a and 108b.

[0070] The output 108c of the frequency mixer 108 is forwarded to a high-pass filter, HPF, 109. The HPF 109 suppresses interfering signals of low frequency in the input signal. Typically, these interfering signals originate from leakage between transmitter and receiver, or DC components.

[0071] The output of the HPF 109 is forwarded to a low-pass filter, LPF, 110. The LPF 110 suppresses unwanted high frequency noise and interference in the input signal. Typically, these interfering signals are higher order harmonics.

[0072] An analog-to-digital converter, ADC, 111 receives the output signal from LPF 110. The ADC is used for digitization of the signal and sends the digital signal to the output 111a for further processing.

[0073] FIG. 2 shows a wave illustration in time domain of signals present in a radar transceiver 100, according to example embodiments. The four graphs illustrate the following waves as a function of time; the output frequency 200 from the chirp generator 102, the amplification level 210 in the controllable variable gain amplifier 103, the receiver circuitry RX enable signal 220, and the receiver circuitry RX output signal 230 after signal digitization/demodulation.

[0074] The first graph illustrates the output frequency 200 from the chirp generator 102 as a function of time. The output frequency is set to f.sub.0 (the base line in the signal 200) prior to the start of the chirp 201. When the control unit 101 initiates the start of the chirp by sending a control signal at the output 101b to the input 102a of the chirp generator, the frequency chirp 201 starts and the frequency is swept from the initial frequency, f.sub.0, to the final frequency, f.sub.1 (at the top of the stepped curve in FIG. 2). According to example embodiments, the chirp 201 last for a time duration, T.sub.1, 202, after which the output frequency returns to the initial frequency f.sub.0.

[0075] According to some embodiments, a time T.sub.2, 203, is allowed to lapse between the start of two consecutive chirps. This is sometimes referred to as pulse repetition interval, PRI). In some embodiments, the PRI 203 is greater than the chirp duration time. Thus T.sub.2>T.sub.1, meaning that the chirp generator 102 is not continuously chirping, but is instead duty-cycled to pulsed chirp operation.

[0076] The second graph illustrates the amplification level 210 in the controllable variable gain amplifier 103 as a function of time. When the control unit 101 initiates the start of the chirp, the control unit 101 also sends a signal to the controllable variable gain amplifier 103. As a response, the amplification 210 in the controllable variable gain amplifier 103 starts increasing from a first amplification level, A.sub.1, 213 along a slope 211, to a second amplification level, A.sub.2, 214. The control unit 101 is adapted to output control signals such that the start of the chirp coincides with the start of the increase in amplification as indicated by the dashed line in FIG. 2.

[0077] According to an embodiment, the amplification level 210 in the controllable variable gain amplifier 103 decreases at the end of the chirp duration, T.sub.1, 202 from the second amplification level, A.sub.2, 214 along a slope 212, to a third amplification level, A.sub.3, 215. This is done such that the end of the chirp duration, T.sub.1, 202 coincides with a time at which the amplification 210 in the controllable variable gain amplifier 103 reaches the third amplification level, A.sub.3, 215 as indicated by the dashed line in FIG. 2. In some embodiments, the amplification slopes 211, 212 follow a linear shape (i.e. a straight line). However, the slopes 211, 212 are not limited to follow a linear shape, but may follow also a polynomial, exponential, logarithmic, or any other shape.

[0078] As previously mentioned, the amplification levels A.sub.1 213 and A.sub.3 215 may be different. However, in some embodiments amplification levels A.sub.1, 213 and A.sub.3, 215 are both equal to zero. After the end of the chirp duration, T.sub.1, 202, the amplification 210 has reached amplification level A.sub.3 215 and remains at this level until the start of the next frequency chirp.

[0079] The third graph illustrates the receiver circuitry RX enable signal 220 as a function of time. As shown in the graph, the receiver circuitry 106 is enabled 221 earlier than the controllable variable gain amplifier 103, according to one embodiment. This is to ensure that the receiver circuitry 106 has sufficient time to settle 231 the DC voltage prior to outputting the actual signal 232, as shown in the fourth graph, illustrating the receiver circuitry RX output signal 230 after signal digitization/demodulation. This settling behavior 231 is primarily due to the HPF 109 in the receiver circuitry 106. The higher the HPF 109 corner frequency, the shorter the settling time 231, but the further the subject should be away from the radar transceiver 100. At the end of the chirp, the receiver circuitry RX enable signal 220 disables 222 the receiver circuitry 106 again. As a result, the receiver circuitry RX output signal 230 returns to its lower level 233, awaiting the start of the next cycle.

[0080] The control unit 101 in the radar transceiver 100 may turn on the controllable variable gain amplifier 103 and the receiver circuitry 106 only during the chirp, so the radar is duty-cycled to meet power consumption, average and sidelobe PSD, and distance requirements. By way of example, a PM 203 of 1.3 ms can be chosen to capture fast movements of an indoor subject (e.g., sudden falling) with a Doppler velocity up to 7 m/s. With 0 dBm amplifier output power, a duty cycling factor may be less than 3% to meet the average PSD regulations, thus resulting in a 40 s chirp time. All the radar circuits may be disabled outside the chirp duration 202, which significantly reduce the average power consumption by about a factor of 33.

[0081] FIG. 3 shows an illustration of the timing of the amplification slope 301 and the frequency chirp 302, together with the corresponding frequency spectrum 303, according to some embodiments. The amplification slope 301 starts simultaneously with the start of the frequency chirp 302. This timing results in a transmitted radar signal with the frequency spectrum indicated by reference 303. By this arrangement the sidelobe energy in the frequency spectrum 303 is minimized, and thus a frequency spectrum 303 that falls within the spectrum regulations 304 is achieved.

[0082] FIG. 4 shows an illustration of the effects of using a step function 401 for increasing the amplification, instead of increasing the amplification along a slope. The amplification step 401 coincides with the start of the frequency chirp 402. By this arrangement the resulting frequency spectrum 403 suffers from increasing sidelobe energy 405 that may fall outside the spectrum regulations 404. Due to the possible violation of the spectrum regulations 404, this arrangement may be avoided.

[0083] FIG. 5 shows an illustration of the effect of starting the amplification slope 501 earlier than the start of the frequency chirp 502. In the present example the amplification slope 501 is started 1 s earlier that the frequency chirp 502, however, the spectral effects discussed here are not limited to an amplification slope 501 advancement of 1 s only, and should rather be seen as a result of any advancement of the amplification slope 501 with respect to the frequency chirp 502. Before the start of the frequency chirp 502, the frequency at the output 102b of the chirp generator 102 is at its lowest (f.sub.0) awaiting the trigger for starting the chirp, as discussed earlier. Thus when the amplification slope 501 starts early, this low frequency content is being amplified early. This introduces a spur 505 in the lower part of the frequency spectrum 503 that falls outside the spectrum regulations 504. Due to the violation of the spectrum regulations 504, this arrangement may be avoided.

[0084] FIG. 6 shows an illustration of the effect of starting the amplification slope 601 later than the start of the frequency chirp 602. When the amplification slope 601 is started later than the start of the frequency chirp, this initial, low frequency, part of the chirp is not amplified and thus not transmitted. This can be seen in the frequency spectrum 603 as a reduction of bandwidth 605 at the lower end of the frequency spectrum 603. By this arrangement the frequency spectrum is still in compliance with the spectrum regulations 604. However, the reduction of bandwidth causes degradation in radar range resolution. Degradation in radar range resolution may be an unwanted effect. As such, this arrangement may be avoided.

[0085] FIG. 7 shows an illustration of the effect of a too slow amplification slope 701, compared to the duration of the frequency chirp 702. A too slow amplification slope 701 causes reduction of bandwidth 705 in the frequency spectrum 703. By this arrangement the frequency spectrum is still in compliance with the spectrum regulations 704. However, the reduction of bandwidth causes degradation in radar range resolution. Degradation in radar range resolution may be an unwanted effect and, as such, may be avoided. In order to avoid reduction of bandwidth, the time of the amplification slope 701 may be within the range of 0-10% of that of the frequency chirp 702. By way of example, the effects of some embodiments are achieved using a range for the amplification slope that is larger than 0% but, in some embodiments, not exceeding the chirp duration. The time of the amplification slope may hence, by way of example, be 1%, 2%, 3%, 4%, 5%, 6%, 7%, 8%, 9%, 10% or a higher percentage of the chirp time.

[0086] As has been shown above, the timing of the start of the amplification slope as well as the duration of the amplification slope with respect to the frequency chirp, have significant effect on the frequency spectrum transmitted from the radar transceiver. A very precise timing and duration will result in a frequency spectrum that is in compliance with the regulations and at the same time maintains bandwidth and thus radar range resolution.

[0087] The disclosure has mainly been described above with reference to a few embodiments. However, as is readily appreciated by a person skilled in the art, other embodiments than the ones disclosed above are equally possible within the scope of the disclosure, as defined by the appended patent claims.