Programmably configured switchmode audio amplifier

Abstract

A multi-channel switchmode audio amplifier is configured by a programmed processor such that each channel drives separate loads, is connected in parallel or is configured in a bridge-tied mode as well as combinations thereof. In one embodiment, amplifier channels that are connected in parallel have power amplifiers that are driven with signals from a single modulator. A feedback circuit and error amplifier from one channel controls the modulated signal that is applied to each parallely connected amplifier channel. Current feedback circuits for parallely connected amplifier channels are eliminated by tightly controlling the timing of switching in the power amplifier output stages.

Claims

1. A multi-channel amplifier, comprising: a number of amplifier channels for driving speaker loads, the number of amplifier channels being configurable to drive the speaker loads in a single channel amplifier configuration, a parallel channel amplifier configuration, a bridge-tied load configuration and a parallel, bridge-tied load configuration; a number of switches that are controllable to connect two or more of the amplifier channels in the parallel and in the bridge-tied load configuration, and wherein the switches are arrangeable in at least first, second, third and fourth configurations for driving the speaker loads; a programmed processor that is configured to: receive impedance and power rating specifications of first and second speakers to be driven by the multi-channel amplifier; automatically control a first configuration of the switches based on one or both of the received impedance and power rating specifications for the first speaker to be driven such that the multi-channel amplifier is configured to drive the first speaker with one of: the first configuration comprising a single channel of the multi-channel amplifier; the second configuration comprising two or more channels of the multi-channel amplifier that are connected in parallel; the third configuration comprising two or more channels of the multi-channel amplifier that are connected in the bridge-tied load configuration; or the fourth configuration comprising two or more channels of the multi-channel amplifier that are connected in the parallel, bridge-tied load configuration; and automatically control a second configuration of the switches different than the first configuration based on one or both of the received impedance and power rating specifications for the second speaker to be driven such that the multi-channel amplifier is configured to drive the second speaker with another one of the first, second, third or fourth configurations.

2. The multi-channel amplifier of claim 1, wherein the programmed processor is configured to prompt a user to enter the impedance and power rating specifications for the speaker to be driven.

3. The multi-channel amplifier of claim 1, wherein the programmed processor is configured to search a database for the impedance and power rating speaker specifications based on input received from a user.

4. The multi-channel amplifier of claim 1, wherein the processor is configured to provide instructions to a user regarding how to connect the speaker to be driven to one or more of the amplifier channels.

5. The multi-channel amplifier of claim 1, wherein the programmed processor is configured to receive the impedance and power rating specifications for a speaker to be driven from a remote computing device.

6. The multi-channel amplifier of claim 5, wherein the remote computing device is connected to the programmed processor through a wired communication link.

7. The multi-channel amplifier of claim 5, wherein the remote computing device is connected to the programmed processor through a wireless communication link.

8. A multi-channel amplifier, comprising: a number of amplifier channels for driving speaker loads, the number of amplifier channels being configurable to drive the speaker loads in a single channel amplifier configuration, a parallel channel amplifier configuration, a bridge-tied load configuration and a parallel, bridge-tied load configuration; a number of switches that are controllable to connect two or more of the amplifier channels in the parallel and in the bridge-tied load configuration, and wherein the switches are arrangeable in at least first, second, third and fourth configurations for driving the speaker loads; a control circuit that is configured to: receive an input comprising impedance and power rating specifications of a first speaker to be driven by the amplifier; automatically control a first configuration of the switches based on the received impedance and power rating specifications for the first speaker to be driven such that the multi-channel amplifier is configured to drive the first speaker with one of: the first configuration comprising a single channel of the multi-channel amplifier; the second configuration comprising two or more channels of the multi-channel amplifier that are connected in parallel; the third configuration comprising two or more channels of the multi-channel amplifier that are connected in the bridge-tied load configuration; or the fourth configuration comprising two or more channels of the multi-channel amplifier that are connected in the parallel, bridge-tied load configuration; receive a second input comprising impedance and power rating specifications of a second speaker to be driven by the amplifier; and automatically control a second configuration of the switches different than the first configuration based on the received impedance and power rating specifications for the second speaker to be driven such that the multi-channel amplifier is configured to drive the second speaker with another one of the first, second, third or fourth configurations.

9. The multi-channel amplifier of claim 8, wherein the control circuit is an FPGA controller or ASIC controller.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram of a programmably configurable, switchmode power amplifier in accordance with an embodiment of the disclosed technology;

(2) FIG. 2 illustrates a number of signal switches in and between amplifier channels that are selectively opened or closed by a programmed processor in accordance with an embodiment of the disclosed technology;

(3) FIG. 3 illustrates how current sharing between amplifier channels is controlled in accordance with an embodiment of the disclosed technology;

(4) FIGS. 4A-4I illustrate a number of different amplifier configurations that can be selected by a programmed processor in accordance with an embodiment of the disclosed technology; and

(5) FIGS. 5A-5B illustrate a flow diagram of steps performed by a programmed processor to configure an amplifier to drive a desired speaker load in accordance with an embodiment of the disclosed technology.

DETAILED DESCRIPTION

(6) As will be discussed in further detail below, the technology disclosed herein relates to amplifiers and in particular to switchmode audio amplifiers that can be configured in a number of ways to drive different speaker loads.

(7) FIG. 1 is a block diagram of a switchmode multi-channel amplifier constructed in accordance with an embodiment of the disclosed technology. In the embodiment shown, a configurable multi-channel amplifier 50 receives an audio input signal and produces amplified audio signals on a number different output channels 1-4. The output channels, shown as 1.sub.out, 2.sub.out, 3.sub.out, 4.sub.out, drive a number of speaker different loads SP.sub.1, SP.sub.2 etc. In one configuration, each output channel drives a separate speaker load. In another configuration, two or more output channels are coupled together drive a speaker load in parallel. In a third configuration, two or more of the output channels are connected drive a speaker load in a bridge-tied mode configuration. Of course other combinations are possible such as a parallel bridge-tied mode where pairs of parallely connected output channels drive a speaker load in a bridge-tied configuration.

(8) A programmed processor 52 such a microprocessor, FPGA, ASIC or other control circuit is configured to receive information from a user selection via an input 54. The input 54 may be a number of keys or buttons on the amplifier with which the user provides information regarding the speaker load they would like drive. Alternatively, the input 54 can be a port configured to receive signals using a direct wired or wireless connection or from commercially available wired or wireless networks. A remote control 55 can be a dedicated device similar to a hand-held TV remote control or an application program that operates on a general purpose device such as a smartphone, tablet, computer or other convenient platform. In yet another embodiment, the input 54 is a port and associated communication electronics that are configured to receive information from a remote computing device (not shown) via computer communication link such as the Internet.

(9) As indicated above, the programmed processor 52 is configured to receive information from the user regarding the number and type of speakers they wish to drive. The programmed processor accesses a database 56 that stores the specifications for a number of common speaker brands or models. These specifications include at least the impedance of a particular brand/model and its maximum power rating. If the database does not include the specifications for the particular brand/model of speaker to be driven, the programmed processor produces a prompt on a display 58 that asks the user to supply the requested information. In addition, the programmed processor 54 receives or prompts the user for an indication of whether multiple speakers are to be driven in parallel or otherwise in a manner that would change the effective impedance of the speaker load.

(10) From the information provided, the programmed processor 52 determines how the amplifier should be configured to drive the desired number and type of speakers. Some channels may be configured to drive separate speaker loads. Alternatively, two or more channels may be connected drive a speaker load in parallel or two channels may be connected to drive a speaker load in a bridge-tied load configuration or in another combination such as parallel bridge-tied load.

(11) In one embodiment, the programmed processor 52 provides a connection wizard that prompts the user with instructions on the display 58 to enter or otherwise provide information regarding the number of speakers they wish to drive as well as their brand/model and impedance. The connection wizard program then determines the appropriate configuration of the amplifier 50 to drive the speakers and sets the position of one or more switches within the amplifier to configure the amplifier in the determined configuration.

(12) In one embodiment, the display 58 is located on the chassis of the amplifier. However the display could also be implemented by sending the instructions via a wired or wireless communication link to a remote device (controller, computer, smart phone etc.).

(13) FIG. 2 is a block diagram of a multi-channel programmable amplifier 50 in accordance with an embodiment of the disclosed technology. In the embodiment shown, there are four amplifier channels labeled as channels 72, 74, 76 and 78. Although four channels are shown in the disclosed embodiment, it will be appreciated that the programmable amplifier 50 could have a greater number (e.g. 8) or a fewer number (e.g. 2) of channels if desired. In the embodiment shown, each channel includes the same major components so only one channel need be described.

(14) Each channel, such as the channel 72, includes an error amplifier 72a, a modulator 72b, a power amplifier stage 72c and a filter circuit 72d. The error amplifier 72a has one input that receives an input signal to be amplified and another input that receives a sample of the output signal of the amplifier channel via a feedback loop 72e. The output of the error amplifier 72a is applied to an input of the modulator 72b. In one embodiment, the modulator 72b is a pulse width modulator. The output of the modulator 72b is provided to an input of the power amplifier stage 72c. The output of the power amplifier stage 72c is fed through an inductor/capacitor (LC) filter circuit 72d that is in turn connected to a speaker terminal (not shown). The feedback loop 72e couples a sample of the output of the amplifier channel back to an input of the error amplifier 72a to control the signal that is applied to the input of the modulator 72b.

(15) In the embodiment shown, a number of signal switches S.sub.1-S.sub.3 selectively connect the inputs of the power amplifiers stages together. A switch S.sub.1 connects the input of the amplifier stage 72c to the input of power amplifier stage 74c. A switch S.sub.2 connects the input of the power amplifier stage 74c to the input of the power amplifier stage 76c and a switch S.sub.3 connects the input of the amplifier stage 76c to the input of the power amplifier stage 78c.

(16) As will be appreciated, by closing the switch S.sub.1, the output of the modulator 72b in channel 72 is supplied to the inputs of both power amplifier stages 72c and 74c. By closing switches S1 and S2, the output of the modulator 72b is supplied to inputs of the power amplifier stages 72c, 74c and 76c etc.

(17) A number of signal switches S.sub.4-S.sub.6 are provided to selectively connect or disconnect an output of a modulator in a channel from an input of a power amplifier stage in the same channel. For example switch S.sub.4 is connected between the output of modulator 74b and an input of the power amplifier stage 74.sub.c. Switch S.sub.5 is connected between the output of modulator 76b and an input of the power amplifier stage 76c. Switch S.sub.6 is connected between the output of modulator 78b and an input of the power amplifier stage 78c.

(18) In the embodiment shown, there is no switch between the output of the modulator 72b and the input of the power amplifier stage 72c. Therefore, when operated in parallel, the channel 72 always operates as a master channel (i.e. supplied the signal to drive the power amplifier stages). However, a switch could be provided if desired so that other channels could operate as the master channel.

(19) Signal switches O.sub.1-O.sub.3 selectively connect the outputs of the power amplifier stages together. Specifically switch O.sub.1 connects the output of power amplifier stage 72c to the output of amplifier stage 74c. Switch O.sub.2 connects the output of power amplifier stage 74c to the output of amplifier stage 76c. Switch O.sub.3 connects the output of power amplifier stage 76c to the output of amplifier stage 78c.

(20) In one embodiment, the signal switches S.sub.1-S.sub.6 are digitally controlled CMOS switches controlled by the programmed processor. The output signal switches O.sub.1-O.sub.3 are relays (either mechanical or electronic) with sufficient current carrying capability to handle the currents produced by each power amplifier stage.

(21) As will be appreciated by those skilled in the art, the multi-channel amplifier circuit also includes inverting circuits or programmed software, (which can be done in within a DSP 57) that invert a signal applied to different channels that drive a speaker load in a bridge-tied load configuration.

(22) The position of the switches (and whether signal inversion is performed) is controlled based on signals supplied by the programmed processor 52. As indicated above, the connection wizard program determines the most appropriate amplifier configuration based on the number of speakers to be driven, their impedance and power handling capability. The programmed processor controls the position of the switches in the amplifier and provides instructions to the user regarding how to connect the speakers to the outputs of the amplifiers.

(23) Depending on the type of speaker load to be driven, any of the channels in the amplifier can operate as stand alone channels, can be connected in parallel or can be configured in a bridge-tied load configuration. If the channels are to be connected in parallel, one or more of the output signal switches O.sub.1-O.sub.3 between the channels are closed. In addition, the output from the modulator of the master channel is connected to the inputs of the power amplifier stages for the slave channel(s). For example, if channel 72 is designated as the master channel to be connected in parallel with the slave channel 74, then the output switch O.sub.1 is closed to connect the outputs of the power amplifier stages 72c, 74c together. The switch S.sub.1 is closed to connect the output of modulator 72b to the input of the power amplifier stage 74c and the switch S.sub.4 is opened to disconnect the output of the modulator 74b from reaching the input of the power amplifier stage 74c.

(24) Because the switch S.sub.4 is open, the power amplifier stage for the slave channel is no longer controlled by the feedback loop 74e and the error amplifier 74a. In known multi-channel amplifiers, additional feedback loops are provided to prevent parallely connected amplifier channels from becoming mismatched in the current they provide to the load. However, the disclosed amplifier avoids the need to provide these additional feedback circuits by carefully controlling the driving signals applied to the power amplifier stages.

(25) FIG. 3 shows a portion of a pair of half bridge amplifier stages that are connected in parallel. Each stage has a pair of Class-D switching transistors 110a, 110b, 112a, 112b that control how current flows through the stages. When transistor 110a is closed or conducting, current flows one way through the load and transistor 110b is open or non-conducting. The Class-D switches then alternate so that transistor 110b is closed while transistor 110a is open so that current flows the other way through the load. Each pair of transistors is controlled by a gate driver 114a, 114b.

(26) If the bridge circuits are connected in parallel and are operating correctly, Class-D switches 110a and 112a should open and close at almost exactly the same time. Similarly, switches 110b, 112b should open and close at almost exactly the same time. If however, the timing of the Class-D switches becomes mismatched, then it is possible that switch 110a could be closed at the same time that switch 112b is closed. Similarly switch 112a may be closed at the same time that switch 110b is closed. The result is a short circuit that causes one amplifier stage to conduct more current than the other stage over the on/off cycle of the half bridge circuit.

(27) One embodiment of the disclosed technology eliminates the need for current feedback circuits in the amplifier by controlling the timing of the switches in each power amplifier stage to open or close (conduct or stop conducting) within 100 ns of each other and more preferably to within 60 ns of each other. Such tight control is achieved by careful layout and by using fast switching transistors and gate drivers in the power amplifier stages. In one embodiment, the switching transistors 110a, 110b, 112a, 112b of the half bridges circuits are mosfets, while the gate drivers are configured to have low propagation delay and isolated outputs.

(28) In addition, the traces on the circuit boards of the amplifier are arranged so that any differences in the signal delay from the output of the modulator of the master channel to the power amplifier stages of the slave channels are minimized.

(29) Because the timing difference in the switching signals to the switching transistors and gate drivers is tightly controlled, any difference in the current conducted between the parallely connected stages is buffered by the inductors of the filter sections. Because current cannot instantaneously change through either inductor, the actual current supplied by each half bridge circuit is kept nearly the same without the use of current control feedback circuitry.

(30) Because the current control loops normally required to equalize the current between the parallely connected power amplifier stages have been eliminated, the cost to manufacture each switchmode amplifier channel is reduced. In addition, having only a single feedback loop associated with the master channel to control multiple switchmode amplifier stages eliminates potential sources of circuit instability.

(31) With four channels there are 15 different ways that various speaker loads can be connected. If more channels are present in the switchmode power amplifier, (e.g. 8 channels) then there are substantially more connection configurations that are possible. In one embodiment, the connection wizard only provides instructions for the most commonly used speaker connections. FIGS. 4A-4H show examples of these common configurations for a four channel amplifier embodiment.

(32) In FIG. 4A, the amplifier channel outputs O.sub.1-O.sub.4 drive four separate speaker loads.

(33) In FIG. 4B, the amplifier channel outputs O.sub.1 and O.sub.2 are connected in parallel to drive a single speaker load, while the channel outputs O.sub.3 and O.sub.4 drive separate speaker loads.

(34) In FIG. 4C, the channel outputs O.sub.1 and O.sub.2 connect to a single speaker load in a bridge-tied load configuration, while the channel outputs O.sub.3 and O.sub.4 drive separate speaker loads.

(35) In FIG. 4D, the channel outputs O.sub.1 and O.sub.2 are connected in a bridge-tied load configuration to drive a single load. Channels outputs O.sub.3 and O.sub.4 are also connected in a bridge-tied load configuration to drive a single speaker load.

(36) In FIG. 4E, the channel outputs O.sub.1 and O.sub.2 are connected in parallel to drive a single load. Channel outputs O.sub.3 and O.sub.4 are also connected in parallel to drive a single speaker load. As used herein single speaker load refers to the fact that a single amplifier channel drives one or more speakers and the single speaker load may itself contain one or more speakers.

(37) In FIG. 4F, the channel outputs O.sub.1-O.sub.3 are connected in parallel to a single speaker load, while the channel output O.sub.4 is connected to a separate speaker load.

(38) In FIG. 4G, channel outputs O.sub.1 and O.sub.2 are connected in parallel to a single speaker load, while channel outputs O.sub.3 and O.sub.4 are connected in a bridge-tied load configuration to drive a single speaker load.

(39) In FIG. 4H, the amplifier is configured such that channel outputs O.sub.1-O.sub.4 are all connected in parallel to a single speaker load.

(40) Finally, in FIG. 4I, the channel outputs O.sub.1 and O.sub.2 are connected in parallel, channel outputs O.sub.3 and O.sub.4 are connected in parallel and the pair of parallel channels are connected to a single speaker load in a bridge-tied load configuration.

(41) FIGS. 5A-5B show a flow diagram of steps performed by a programmed processor to configure an amplifier in order to drive one or more speakers as requested by the user. As will be understood by those skilled in the art, a processor, computer or the like executes a series of program instructions stored in a non-transitory computer readable media such a flash memory, hard drive, CD ROM or the like. The instructions cause the microprocessor to prompt the user for information about what type of speakers they want to drive with the amplifier. After receiving the speaker information, the programmed processor configures the amplifier in a way that will most appropriately drive the described load. Although the steps are described in particular order for ease of explanation, it will be appreciated that the steps could be performed in a different order or different steps could be performed to achieve the functionality described.

(42) Beginning at 200, the programmed processor prompts the user for the number and type of speakers to be driven by the amplifier at 202. The user can enter the number of speakers to be driven together (e.g. 1-10 speakers in parallel), their brand name and model number. At 204, the processor looks in a database to determine if the speaker specifications (e.g. impedance and maximum power capacity) are listed in the database. If not, the programmed processor prompts the user to provide the specification information at 206. At 208, the programmed processor recalls the speaker specification information. At 210, the programmed processor determines if the current required to drive the speaker(s) to their rated maximum is greater than the maximum current that can be produced by a single switchmode amplifier channel. If so, the programmed processor activates the internal signal switches in the amplifier to combine two or more amplifier channels in parallel at 212.

(43) At 214, the programmed processor determines if the voltage required to drive the speaker(s) to their maximum power rating exceeds the maximum voltage that can be produced from a single channel. If so, the programmed processor activates sets the position of one or more signal switches in the amplifier to operate two or more channels in a bridge-tied load configuration at 216.

(44) At 218, the programmed processor provides instructions to the user that indicate how the speakers should be connected to the outputs of the amplifiers. In some cases the speaker load requested by the user may exceed the capabilities of the amplifier in which case, the programmed processor prompts the user to change their desired speaker configuration.

(45) From the foregoing, it will be appreciated that specific embodiments of the invention have been described herein for purposes of illustration, but that various modifications may be made without deviating from the spirit and scope of the invention. Accordingly, the invention is not limited except as by the appended claims.