A SYSTEM FOR STABILIZING DELAY

Abstract

The present invention relates to pulse power technology. The system includes an input channel, a pulse edge detector (2) connected in series with two inputs, a filter (3), a variable delay unit (4), and a feedback channel from the generator to one of the inputs of the pulse edge detector (2). The system comprises a reference delay unit (1), and the input channel is connected both to the variable delay unit (4) and to a reference delay unit (1) for simultaneous supply of input to said units. Signals to both inputs of the pulse edge detector (2) are synchronous on average, i.e. tstab.avg=1/τ∫ tstab dt=tref with τ>>τest.oper where: tstab.avg—generator output delay relative to the input signal, averaged over the operation time of the system τ at a given tref; tref—reference unit (1) output delay relative to the input signal; τest.oper—stabilization system time response to changes in external parameters, with the stabilization delay tstab determined from the condition tstab=tvar+tunstab where: tvar—delay of the variable delay unit (4); tunstab—unstable delay of the generator. The stabilization of the delay is independent of the pulse repetition frequency.

Claims

1. A delay stabilization system designed primarily for a pulse voltage generators, said delay stabilization system comprising: at least one input channel connected in series; a pulse edge detector with two inputs; a filter; a variable delay unit, and a feedback channel of the pulse voltage generator connected to one of the inputs of the pulse edge detector, with a special feature; a reference delay unit wherein the at least one input channel is connected both to the variable delay unit and to the reference delay unit for simultaneous input signal to the variable delay unit and the reference delay unit, whereby the signals to both inputs of the pulse edge detector are synchronous on average, i.e. tstab.avg=1/τ∫ tstab dt=tref with τ>>τest.oper where: tstab.avg is a generator output delay relative to the input signal, averaged over the operation time of the delay stabilization system ti at a given tref; wherein tref is a reference unit output delay relative to the input signal; τest.oper is a stabilization system time response to changes in external parameters, with the stabilization delay tstab is determined from the condition tstab=tvar+tunstab where: tvar—delay of the variable delay unit and tunstab—unstable delay of the pulse voltage generator.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Other advantages of the present invention will be readily appreciated as the same becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawings wherein:

[0014] FIG. 1 is a functional block diagram; and

[0015] FIG. 2 shows timing charts of the voltage change.

DETAILED DESCRIPTION OF THE INVENTION

[0016] The proposed delay stabilization system can be used to stabilize the delay and synchronize buffer logic devices, amplifiers and impulse voltage generators. An example of a particular implementation is given for the delay stabilization of a generator with unstable delay.

[0017] A delay stabilization system of the present invention includes the following elements connected in series: a reference delay unit 1, a pulse edge detector 2, a filter 3 and a variable delay unit 4 as shown in FIG. 1. The delay stabilization system includes an input channel A triggering a system for receiving a sequence of triggering voltage pulses U1, shown as a plot “a” in FIG. 2. Input A is connected both to the reference delay unit 1 and to the variable delay unit 4 for simultaneous input to the said units.

[0018] The reference delay unit 1 is intended to provide a delay time tref of the first input pulse sequence (input signal). The delay tref from reference delay unit 1 may be fixed or adjustable. Adjustment is carried out by an external signal or via control interface, such as a potentiometer, in the reference delay unit 1. As the pulse edge detector 2, a flip-flop is used in the system, having two inputs B and C, as well as an output channel D.

[0019] Input B is used to receive a signal coming from the reference delay unit 1 with the delay time tref relative to the input signal. Input C is used for receiving a signal with a delay time tstab relative to the input signal from the feedback channel from the voltage pulse generator, shown at D in FIG. 1.

[0020] The pulse edge detector 2 is used to generate a high or low voltage output signal that is feed to the filter 3. The filter 3 is an integrator whose output signal voltage increases or decreases depending on the signal received from the pulse edge detector 2, whereby the voltage at the output of the filter 3 corresponds to the mean value of the voltage supplied from the pulse edge detector 2.

[0021] The variable delay unit 4 has an input for receiving the input signal and an input D for receiving the signal from the filter 3. The variable delay unit 4 includes a delay element, a control delay depending on the voltage from the filter 3. The variable delay unit 4 is connected to the generator with unstable delay tunstab.

[0022] The system works as follows. The input channel A signal is fed with pulse voltage generator start signal. The input of the reference delay unit 1 receives a signal U1 in the form of pulses with a repetition frequency f and period T=1/f, shown as plot “a” in FIG. 2.

[0023] The reference delay unit 1 introduces, for example, a fixed stable delay tref to the signal U1, and the input B of the pulse edge detector 2 receives the signal U2, which is delayed relative to signal U1 by a delay time tref, shown as plot “b” in FIG. 2.

[0024] The input C of the pulse edge detector 2 receives signal U3 with a stabilization delay tstab, which is the sum of unstable delay tunstab of the generator and variable delay tvar of the variable delay unit 4, i.e. tstab=tvar+tunstab relative to the start signal U1, shown as plot “a” in FIG. 2.

[0025] At its output point, the pulse edge detector 2 generates a logical signal U4, shown as plot “d” in FIG. 2, depending on which input B or C previously received rising pulse edge, if tref>tunstab+tvar, then 1−a high voltage or 0−a low voltage.

[0026] The logic signal U4 from the pulse edge detector 2 is supplied to the filter 3, which generates a control voltage Uctrl (U5) for the variable delay unit 4, shown as plot “e” in FIG. 2.

[0027] The variable delay unit 4 delays the signal U1 by a time close to the value of tvar=tref−tunstab=t (Uctrl), shown as plot “f” in FIG. 2. Thus, the signal delay from the input channel to the output of the generator is close to the value tvar+tunstab=tref.

[0028] Here is an example of particular parameters. Let pulse voltage generator delay tunstab vary in the range of 40-60 ns, the time change Tunstab of unstable delay much higher than reaction time of the system, the reference delay tref is set to 60 ns. Then at τest.oper<<<<τunstab, the average stabilization delay is:

[00001]$=1/\tau .Math.{\int }_0^{\tau }.Math..Math..Math.\mathrm{dt}=1/\tau .Math.{\int }_0^{\tau }.Math.\left(+\right).Math..Math.\mathrm{dt}==1/\tau .Math.{\int }_0^{\tau }.Math..Math..Math.\mathrm{dt}+=+=$

[0029] The stabilization system adjusts the variable delay so that: at tunstab=40 ns, tvar.avg=tref−tunstab=60 ns−40 ns=20 ns, at tunstab=50 ns, tvar.avg=tref−tunstab=60 ns−50 ns=10 ns, at tunstab=60 ns, tvar.avg=tref−tunstab=60 ns−60 ns=0 ns. In all cases, the average delay from the start signal to the output of the generator is equal to tstab.avg=tvar.avg+tunstab=tref=60 ns.

INDUSTRIAL APPLICABILITY

[0030] The proposed delay stabilization system adds a variable delay to stabilize an unstable generator delay and thus compensates for changes in the delay of the generator. The delay stabilization system stabilizes the delay between the input A of the system and the generator output, while the pulses on the inputs B and C of the pulse edge detector arrive synchronously, eliminating the dependence of stabilized delay on the pulse repetition frequency. The proposed system stabilizes the delay of the pulse sequence of the duration from a few nanoseconds and more, with precision of a few picoseconds regardless of the pulse repetition frequency.