METHOD FOR PRODUCING AN OPTOELECTRONIC SEMICONDUCTOR CHIP, AND OPTOELECTRONIC SEMICONDUCTOR CHIP

Abstract

The invention relates to a method for producing an optoelectronic semiconductor chip (100) comprising the steps: A) providing a surface (2) in a chamber (5), B) providing at least one organic first precursor (3) and one second precursor (4) in the chamber (5), wherein the organic first precursor (3) comprises a gaseous III-compound material (3), wherein the second precursor (4) comprises a gaseous phosphorus-containing compound material (41), C) epitaxial deposition of the first and the second precursor (3, 4) at a temperature between 540 C. inclusive and 660 C. inclusive and a pressure between 30 mbar inclusive and 300 mbar inclusive onto the surface (2) in the chamber (5) to form a first layer (12), comprising a phosphide compound semiconductor material (6), wherein the ratio between the second and the first precursor (3, 4) is between 5 inclusive and 200 inclusive, wherein the phosphide compound semiconductor material (6) produced is doped with carbon, wherein the carbon doping concentration is at least 410.sup.19 cm.sup.3.

Claims

1. A method for producing an optoelectronic semiconductor chip comprising the steps: A) providing a surface in a chamber, B) providing at least one organic first precursor and one second precursor in the chamber, wherein the organic first precursor comprises a gaseous III-compound material, wherein the second precursor comprises a gaseous phosphorus-containing compound material, C) epitaxial deposition of the first and the second precursor at a temperature between 540 C. inclusive and 660 C. inclusive and a pressure between 30 mbar inclusive and 300 mbar inclusive onto the surface in the chamber to form a first layer comprising a phosphide compound semiconductor material, wherein the ratio between the second and the first precursor is between 5 inclusive and 200 inclusive, wherein the phosphide compound semiconductor material produced is doped with carbon, wherein the carbon doping concentration is at least 410.sup.19 cm .sup.3 and wherein after step C) a cooling step is performed without the second precursor and only with a carrier gas.

2. The method according to claim 1, wherein after step C) a cooling step of at least the phosphide compound semiconductor material is performed in the chamber, wherein the chamber is free of the second precursor.

3. The method according to claim 1, wherein hydrogen is used as the carrier gas in step C).

4. The method according to claim 1, wherein additionally a gaseous organic third precursor CBr.sub.4 is used.

5. The method according to claim 1, wherein the first layer comprises a layer thickness of 5 nm inclusive to 200 nm inclusive or of 50 nm inclusive to 500 nm inclusive.

6. The method according to claim 1, wherein the temperature in step C) is between 540 C. and 620 C. for a first layer formed as a p-contact layer or between 560 C. and 660 C. for a first layer formed as a p-current spreading layer.

7. The method according to claim 1, wherein the pressure in step C) is between 60 mbar and 70 mbar.

8. The method according to claim 1, wherein the carbon doping concentration is between 510.sup.19 cm.sup.3 and 110.sup.21 cm.sup.3 for a first layer formed as a p-contact layer or between 410.sup.19 cm.sup.3 and 310.sup.20 cm.sup.3 for a first layer formed as a p-current spreading layer.

9. The method according to claim 1, wherein the ratio between the second and first precursor is between 5 inclusive and 150 inclusive or between 10 inclusive and 200 inclusive.

10. The method according to claim 1, wherein the organic first precursor and/or the III-compound material is trimethylgallium (TMGa), trimethylindium (TMIn) or trimethylaluminum (TMAl).

11. The method according to claim 1, wherein the second precursor and/or the phosphorus-containing compound material is phosphine (PH.sub.3).

12. The method according to claim 1, wherein the epitaxial deposition in step C) is a metal organic vapor phase epitaxy (MOVPE).

13. The method according to claim 1, wherein the phosphide compound semiconductor material is a GaP or AlGaP.

14. The method according to claim 1, wherein the surface is the surface of a semiconductor layer sequence comprising an active region provided for generating radiation, an n-conducting region and a p-conducting region, wherein the active region is arranged between the n-conducting region and the p-conducting region.

15. The method according to claim 1, wherein the first layer directly adjoins the surface of a semiconductor layer sequence and is formed as a p-contact layer and/or a p-current spreading layer.

16. An optoelectronic semiconductor chip with a semiconductor layer sequence comprising a carbon-doped phosphide compound semiconductor material and having an active region provided for generating radiation, an n-conducting region and a p-conducting region, wherein the active region is arranged between the n-conducting region and the p-conducting region, the p-conducting region comprises a first layer or the first layer adjoins the p-conducting region, wherein the first layer is based on the carbon doped phosphide compound semiconductor material, wherein the carbon doping concentration is at least 510.sup.19 cm.sup.3, wherein the first layer is formed as a p-contact layer and p-current spreading layer.

17. The optoelectronic semiconductor chip according to claim 16, wherein the thickness of the first layer is between 5 nm and 200 nm.

18. The optoelectronic semiconductor chip according to claim 16, wherein a dielectric layer is arranged in regions between the current spreading layer and the p-connecting contact.

19. An optoelectronic semiconductor chip with a semiconductor layer sequence comprising a carbon-doped phosphide compound semiconductor material and having an active region provided for generating radiation, an n-conducting region and a p-conducting region, wherein the active region is arranged between the n-conducting region and the p-conducting region, the p-conducting region comprises a first layer or the first layer adjoins the p-conducting region, wherein the first layer is based on the carbon doped phosphide compound semiconductor material, wherein the carbon doping concentration is at least 510.sup.19 cm.sup.3, wherein the first layer is formed as a p-contact layer and p-current spreading layer, wherein the p-contact layer and the current spreading layer are broken through in a region.

Description

[0037] According to at least one embodiment, an additional precursor, a gaseous organic third precursor, is used. The third precursor is preferably formed from CBr.sub.4. The third precursor serves to increase the carbon doping concentration in the first layer.

[0038] According to at least one embodiment, the first layer comprises a thickness of 5 nm inclusive to 200 nm inclusive. Alternatively, the first layer comprises a layer thickness of 50 nm inclusive to 500 nm inclusive, in particular of 200 nm inclusive to 350 nm inclusive. In particular, the thickness of the first layer is between 5 and 200 nm if the first layer is formed as a p-contact layer. In particular, the thickness of the first layer is between 50 nm and 500 nm when the first layer is formed as a p-current spreading layer.

[0039] According to at least one embodiment, the temperature in step C) has a value between 560 C. and 600 C., for example 600 C.

[0040] According to at least one embodiment, the pressure in step C) has a value between 60 mbar and 70 mbar, for example 66 mbar.

[0041] According to at least one embodiment, the carbon doping concentration has a value between 1.Math.10.sup.20 cm.sup.3 and 5.Math.10.sup.20 cm.sup.3 or between 5.Math.10.sup.19 cm.sup.3 and 3.Math.10.sup.20 cm.sup.3.

[0042] According to at least one embodiment, the temperature and/or pressure in step C) are constant. In other words, there is no temperature and/or pressure ramp during method step C).

[0043] According to at least one embodiment, the ratio between the second and first precursor is between 5 inclusive and 150 inclusive. Alternatively, the ratio between the second and first precursor is between 10 inclusive and 200 inclusive. The ratio between 5 inclusive and 150 inclusive is preferably present in a first layer formed as a p-contact layer. The ratio between 10 and 200 inclusive is preferably present in a first layer formed as a p-current spreading layer.

[0044] According to at least one embodiment, the phosphide compound semiconductor material is a gallium phosphide.

[0045] According to at least one embodiment, the phosphide compound semiconductor material is an aluminum gallium phosphide.

[0046] According to at least one embodiment, the first layer directly adjoins the surface of a semiconductor layer sequence. The first layer is preferably formed as a p-contact layer and/or as a p-current spreading layer.

[0047] According to at least one embodiment, a cooling step is performed after step C). In this cooling step at least the phosphide compound semiconductor material is cooled in the chamber. In particular, the chamber is free of the second precursor material.

[0048] According to at least one embodiment, a cooling step without second precursor, in particular without a phosphide compound, and only with a carrier gas, for example hydrogen, is performed after step C).

[0049] After the epitaxial growth of, for example, carbon-doped gallium phosphide, the surface, for example the epi disks, is cooled in the chamber of the reactor without phosphine. This avoids carbon-hydrogen passivation, which leads to a high U.sub.F of, for example, 30 mV to 50 mV.

[0050] After the usual epitaxial process, the surface, for example the epi disks, is cooled under the second precursor, for example in the presence of phosphine, AsH.sub.3 or NH.sub.3, as it avoids desorption from the epi surface.

[0051] In the case with the gallium phosphide surface, desorption during cooling without phosphine is not observed. Therefore, no aging effect is observed. In other words, it is unusual to perform the cooling process without the second precursor, since it is known that the first layer is stabilized in the presence of the second precursor. The inventor has recognized that the absence of the second precursor in the cooling step prevents carbon-hydrogen passivation and thus reduces a high U.sub.F.

[0052] According to at least one embodiment, a first layer formed as a p-contact layer comprises a high carbon doping of 1.Math.10.sup.20 cm.sup.3 to 5.Math.10.sup.20 cm.sup.3 and an absorption coefficient of 600 cm.sup.1 to 2000 cm.sup.1. A lower contact resistance and a high brightness of the semiconductor chip are produced. The contact resistance is well below the values described in the previous literature for ITO/GaP 1.Math.10.sup.5 to 1.Math.10.sup.4 cm.sup.2, Au/GaP of approximately 2.Math.10.sup.5 cm.sup.2, PtAu/GaP of approximately 7.Math.10.sup.6 cm.sup.2.

[0053] According to at least one embodiment, a first layer formed as a p-current spreading layer comprises a high carbon doping of 4.Math.10.sup.19 to 3.Math.10.sup.20 cm.sup.3 with a low specific resistance of 0.002 to 0.006 .Math.cm.sup.2 and an absorption parameter in the range of 400 to 650 cm.sup.1. In comparison to the current spreading layer of, for example, AlGaAs:C, carbon-doped gallium phosphide has a better moisture stability and adhesion and thus a smaller or comparable absorption. Compared to the current spreading layer of magnesium-doped gallium phosphide, carbon-doped gallium phosphide does not have magnesium doping, thus significantly reducing the risk of aging.

[0054] So far, no method for producing an optoelectronic semiconductor chip is known which uses a combination of the method parameters described here, such as temperature, pressure and ratio values, during epitaxial deposition to produce the first layer. Thus, a phosphide compound semiconductor material layer highly doped with carbon can be produced, which is also moisture stable and has a high absorption.

[0055] So far, for example, only methods using lower temperatures of, for example, 470 C. and a pressure of 50 mbar with hydrogen carrier gas are known (Japanese Journal of Appl. Phys. Vol. 47, No. 9, 2008, pages 7023 to 7025). However, the carbon-doped phosphide compound semiconductor material layer produced therein comprises a lower carbon concentration of 3.2.Math.10.sup.19 cm.sup.3. The Journal of Electrochemical Society, Vol. 157, No. 4, 2010, pages H459 to H462 also describes a carbon-doped phosphide compound semiconductor material layer with a concentration greater than 1.Math.10.sup.19 cm.sup.3. However, these layers are produced at a lower temperature of 530 C. with a ratio of second precursor to first precursor of 11 with hydrogen carrier gas.

[0056] According to at least one embodiment, the carbon doping in the phosphide compound semiconductor material functions as a p-doping. In other words, the carbon doping functions as an acceptor. For example, the carbon is incorporated at the group V lattice sites, in particular at phosphorus lattice sites.

[0057] It has been found that the method described here can be used to produce a semiconductor chip that has improved moisture stability and lower absorption losses and further a high conductivity and thus an efficient current spreading.

[0058] Carbon is characterized by a particularly low diffusion within the semiconductor layer sequence. The risk of damage with the semiconductor layer sequence, in particular to the active region, due to diffusion of the carbon into the active region and the associated light loss of the semiconductor layer sequence is efficiently avoided.

[0059] With regard to the design of the semiconductor chip, reference is made to the claims and figures of DE 10 2017 101 637.6 and DE 10 2017 104 719.0, the disclosure content of which is hereby incorporated by reference.

[0060] According to at least one embodiment, the first layer is free of magnesium.

[0061] Further advantageous embodiments and further developments result from the exemplary embodiments described in the following.

[0062] FIGS. 1A to 1D show a method for producing an optoelectronic semiconductor chip according to an embodiment,

[0063] FIGS. 2A to 3D each show a schematic side view of an optoelectronic semiconductor chip according to an embodiment.

[0064] In the exemplary embodiments and figures, the same, similar and similar-acting elements can each be provided with the same reference signs. The depicted elements and their proportions among each other are not to be regarded as true to scale. Rather, individual elements, such as layers, components, parts and areas, may be shown in exaggerated size for better representability and/or better understanding.

[0065] FIGS. 1A to 1D show a method for producing an optoelectronic semiconductor chip according to an embodiment.

[0066] FIG. 1A shows providing a surface in a chamber 5. For example, chamber 5 is part of an epitaxial reactor such as VECCO K475. Surface 2 is preferably a surface of a semiconductor layer sequence 1. The semiconductor layer sequence 1 preferably comprises a phosphide compound semiconductor material. Semiconductor layer sequence 1 is provided for generating radiation. Semiconductor layer sequence 1 comprises an active region 20, which is arranged between an n-conducting region 21 and a p-conducting region 22 (not shown here).

[0067] FIG. 1B shows method step B, providing at least one organic first precursor 3 comprising a gaseous III-compound material 31 and a second precursor 4 comprising a gaseous phosphorus-containing compound material 41. The first precursor 3 may be, for example, trimethylgallium and the second precursor 4 may be, for example, phosphine. In addition, a carrier gas 7, for example hydrogen, can be used to transport the gaseous precursors 3, 4 into the chamber.

[0068] The precursors 3, 4 then partly react already in the gas phase and diffuse to surface 2. In particular, surface 2 is heated. The precursors 3, 4 are absorbed, thereby forming a first layer 12, which comprises or consists of a phosphide compound semiconductor material 6. In particular, the phosphide compound semiconductor material 6 is gallium phosphide (see FIG. 1C).

[0069] The epitaxial deposition of the phosphide compound semiconductor material of the first layer 12 in FIG. 1C is performed at a temperature between 520 C. inclusive or 540 C. and 660 C. inclusive, a pressure between 30 mbar inclusive and 300 mbar inclusive and a ratio between the second and first precursor between 5 inclusive and 200 inclusive. With the parameter window given, the surface quality is good, the conductivity high and the absorption low.

[0070] For example, methane can leave chamber 5 as by-product 11.

[0071] FIG. 1D shows the first layer 12, which comprises or consists of the C-doped phosphide compound semiconductor material 6. The carbon doping concentration comprises a value of at least 510.sup.19 cm.sup.3. The first layer 12 is arranged on the surface 2.

[0072] FIGS. 2A to 2D each show a schematic side view of an optoelectronic semiconductor chip according to an embodiment. In these exemplary embodiments, the first layer 12 is preferably formed as a p-contact layer.

[0073] FIG. 2A shows a schematic side view of an optoelectronic semiconductor chip 100 according to an embodiment. The semiconductor chip 100 comprises a semiconductor layer sequence 1, preferably comprising a phosphide compound semiconductor material 6. The semiconductor layer sequence 1 is provided for generating radiation. The semiconductor layer sequence 1 comprises an active region 20, which is arranged between a p-conducting region 22 and an n-conducting region 21.

[0074] The p-conducting region 22 comprises a first layer 12, or the first layer 12 adjoins, preferably directly, the p-conducting region 22. The first layer 12 comprises a carbon-doped phosphide compound semiconductor material 6, preferably carbon-doped gallium phosphide with a carbon doping concentration of at least 510.sup.19 cm.sup.3. In this case, the first layer 12 is formed as a p-contact layer 9. The p-contact layer 9 is arranged between a p-doped indium gallium aluminum phosphide (p-InGaAlP) layer. The p-contact layer 9 adjoins a current spreading layer 13. The p-contact layer 9 can form the outermost semiconductor layer of the p-side of the optoelectronic semiconductor chip 100.

[0075] The current spreading layer 13 contains a transparent conductive oxide, for example ITO. Alternatively, the transparent conductive oxide can be zinc oxide or IZO, for example. The current spreading layer 13 adjoins a p-connecting contact made of a metal or metal alloy.

[0076] The p-connecting contact 14 is used as an electrical contact to conduct an electric current into the semiconductor layer sequence 1. An n-connecting contact 15 is used for electrical contacting from the n-side and can be arranged on the back side of a carrier 16, for example. In particular, the re-connecting contact 15 is arranged on the back side of a carrier 16 if an electrically conductive carrier is used. Alternatively, however, other arrangements of the n-connecting contact 15 are also possible.

[0077] Here, the current spreading layer 13 has the advantage that, due to its high transparency, it can be applied to the entire p-contact layer 9, which results in good current spreading without significant absorption losses. The thickness of the current spreading layer 13 is preferably between 10 nm and 300 nm, for example about 60 nm.

[0078] The p-contact layer 9 is advantageously formed as a thin layer with only less than 100 nm, preferably 1 nm to 35 nm.

[0079] Such a small thickness of the p-contact layer 9 is possible in particular because the current spreading already takes place in the adjoining current spreading layer 13 of the transparent conductive oxide. The p-contact layer 9, made of carbon-doped gallium phosphide, therefore does not need to be used for current spreading. In contrast to conventional light-emitting diode chips, in which one or more comparatively thick p-type semiconductor layers are usually used for current spreading, the very thin p-contact layer 9 has the advantage that the absorption is merely very low.

[0080] Furthermore, the thin p-contact layer 9 is characterized by a low roughness. The rms-surface roughness of the p-contact layer 9 at the interface to the current spreading layer 13 is advantageously less than 2 nm. The low roughness is made possible in particular by the low thickness, since the p-contact layer 9 is essentially not yet completely relaxed at such a low layer thickness. In other words, the p-contact layer 9 is grown strained on the underlying semiconductor layer sequence 1. A transition to the lattice constant of the gallium phosphide semiconductor material would only occur at a greater layer thickness through the formation of dislocations.

[0081] In particular, the p-contact layer 9 is free of aluminum. A high aluminum content of the p-contact layer 9 would in itself have the advantage that the absorption is low due to the large electronic band gap caused by the high aluminum content. On the other hand, it has been shown that a semiconductor layer with a high aluminum content is comparably sensitive to moisture. Since the absorption of the p-contact layer 9 described here is already very low due to the small layer thickness, the semiconductor material of the p-contact layer 9 can be advantageously free of aluminum without significant absorption occurring in the p-contact layer 9.

[0082] The doping of the p-contact layer 9 with carbon has the advantage that a diffusion of the conventionally used dopant magnesium into deeper lying semiconductor layers, in particular the active region 20, does not occur. The problem of diffusion is less of a problem when using carbon as a dopant than when using magnesium.

[0083] FIG. 2B shows a schematic side view of an optoelectronic semiconductor chip 100 according to an embodiment. The optoelectronic semiconductor chip 100 is here formed as a so-called thin-film LED. In the thin-film LED, the semiconductor layer sequence 1 is detached from its original growth substrate. On the side opposite the original growth substrate, the semiconductor chip 100 is arranged on a carrier substrate 161 with at least one connection layer 18, for example, a solder layer. Viewed from the active area 20, the p-contact layer 9 thus faces the carrier substrate 161. The carrier substrate 161 may, for example, comprise a semiconductor material, such as silicon, germanium, molybdenum or a ceramic.

[0084] As already described in conjunction with FIG. 2A, the semiconductor chip 100 of FIG. 2B contains a p-contact layer 9 with carbon-doped gallium phosphide and adjoins the current spreading layer 13, which contains a transparent conductive oxide such as ITO.

[0085] In this context, all the explanations on the p-contact layer 9 in FIG. 2B also apply as already described in conjunction with FIG. 2A.

[0086] The p-connecting contact 14 can be made of silver or gold. Silver or gold are characterized by a high reflectivity. In the example shown here, a dielectric layer 19, which can be a silicon oxide layer in particular, is arranged in some regions between the current spreading layer 13 and the p-connecting contact 14. Due to the comparatively low refractive index of the dielectric material of the dielectric layer 19, the dielectric layer 19 can cause a total reflection of part of the radiation emitted in the direction of the carrier substrate 161 towards the radiation emission surface.

[0087] Other advantageous configurations and the resulting advantages of the exemplary embodiment in FIG. 2B correspond to the explanations for FIG. 2A and are therefore not explained in detail again.

[0088] FIG. 2C shows a schematic side view of an optoelectronic semiconductor chip 100 according to an embodiment. The semiconductor chip of FIG. 2C differs from the semiconductor chip of FIG. 2B in that the p-contact layer 9 and the current spreading layer 13 are broken through in a region. For example, during the production of the optoelectronic semiconductor chip 100, a recess is produced in the current spreading layer 13 and the p-contact layer 9 before the application of the dielectric layer 19 and the p-connecting contact 14. This structuring is performed in particular before the growth substrate is detached and before the semiconductor chip 100 is connected to the carrier substrate 161. This has the advantage that the current flow through the active region 20 is reduced. In this way it is achieved that less radiation is generated below the re-connecting contact 15 and thus absorption losses are reduced.

[0089] Otherwise, the exemplary embodiment in FIG. 2C corresponds to the embodiments of the semiconductor chip in FIG. 2B.

[0090] The semiconductor chip of FIGS. 2A to 2C was produced in particular at a temperature between 540 C. and 650 C., at a pressure between 30 mbar and 300 mbar and a ratio between second and first precursor of 5 to 150. The resulting layer thickness of the first layer 12 is in particular between 5 nm and 200 nm, preferably 5 nm to 35 nm.

[0091] FIGS. 3A to 3D each show a schematic side view of an optoelectronic semiconductor chip according to an embodiment. Here, the first layer 12 is formed in particular as a p-current spreading layer. In addition, the first layer 12 can have a p-contact function.

[0092] The semiconductor chip of FIG. 3A comprises an active region 20, which is arranged between an n-conducting region 21 and a p-conducting region 22.

[0093] The active region 20 is based on a phosphide compound semiconductor material. For example, the active region 20 is formed as a quantum structure with a plurality of quantum layers 201 and barrier layers 202 arranged between them. By selecting the material composition of the phosphide compound semiconductor material and/or the layer thickness of the quantum layers 201, the emission wavelength of the radiation to be generated in the active region 20 can be varied from the green, yellow, and red to the infrared spectral range.

[0094] The p-conducting region 22 comprises the first layer 12, which here is formed as a p-current spreading layer 6. The current spreading layer 6 is doped with carbon and comprises a phosphide compound semiconductor material, in particular C-doped GaP. The carbon doping concentration is in particular between 210.sup.19 and 310.sup.20 cm.sup.3.

[0095] All the definitions and explanations given so far for the first layer 12 also apply to the exemplary embodiment in FIG. 3A, which is therefore not explained in detail here.

[0096] The semiconductor chip of FIGS. 3A to 3D was produced in particular at a temperature between 540 C. and 660 C., at a pressure between 30 mbar and 300 mbar and a ratio between second and first precursor of 10 and 200. The resulting layer thickness of the first layer 12 is in particular between 50 nm and 500 nm, preferably 200 nm to 350 nm.

[0097] In particular, the current spreading layer 6 is free of aluminum and/or indium.

[0098] The current spreading layer 6 is characterized by a high transmission in the above-mentioned spectral range for the radiation to be generated in the active region 20. In addition, such a current spreading layer is more moisture stable compared to an aluminum gallium arsenide current spreading layer.

[0099] In contrast to the other layers of the semiconductor layer sequence 1, the current spreading layer 6 is completely or partially relaxed and therefore does not have the lattice constant of the growth substrate. All layers of the semiconductor layer sequence arranged on the side of the current spreading layer 6 facing the active region 20 therefore have the same lattice constant.

[0100] The p-conducting region 22 can further comprise a subregion 221 on the side of the current spreading layer 6 facing the active region 20. Subregion 221 is p-conductively doped by means of a second dopant. In particular, the second dopant is different from carbon. For example, the second dopant is magnesium.

[0101] FIG. 3B shows a semiconductor chip 100, which has a carrier 16. The carrier 16 is attached to the semiconductor layer sequence 1 by means of a connection layer 18, for example, a solder layer or an electrically conductive adhesive layer. A mirror layer 200 may be arranged between the carrier 16 and the semiconductor layer sequence 1. The mirror layer 200 is simultaneously used for electrically contacting the current spreading layer 6. The semiconductor chip 100 also comprises a p-conductive region 22, an active region 20 and an n-conductive region 21. In addition, the semiconductor chip 100 comprises a p-connecting contact 14 and an n-connecting contact 15. The n-connecting contact 15 adjoins the n-conducting region 21, the p-connecting contact 14 adjoins the carrier 16.

[0102] Other advantageous configurations and the resulting advantages of this exemplary embodiment essentially correspond to the exemplary embodiment in FIG. 3A.

[0103] In particular, the semiconductor chip according to FIG. 3B is formed as a volume emitter. This refers to a semiconductor chip in which a substantial part of the radiation, for example, at least 30% of the radiation, emerges from the side of the semiconductor chip.

[0104] FIG. 3C shows another exemplary embodiment of a semiconductor chip 100. This exemplary embodiment corresponds essentially to the exemplary embodiment described in conjunction with FIG. 3B.

[0105] In contrast to this, the current spreading layer 6 comprises a structuring in lateral direction. The structuring is formed in the form of a plurality of recesses 210 in the current spreading layer 6. The recesses 210 are provided, for example, for an interference of waveguide effects. The decoupling efficiency can thus be increased.

[0106] FIG. 3D shows another exemplary embodiment of a semiconductor body 100 according to an embodiment. This exemplary embodiment corresponds essentially to the exemplary embodiment described in conjunction with FIG. 3A. Contrary to this, the p-conducting region comprises a superlattice structure 220. The superlattice structure 220 is arranged between the current spreading layer 6 and the active region 20. For example, the superlattice structure 220 comprises a plurality of first sublayers 2210 and a plurality of second sublayers 2220. For a simplified representation, FIG. 3D shows only one first sublayer 2210 and one second sublayer 2220. Gallium phosphide is suitable for the first sublayer 2210 and aluminum indium phosphide for the second sublayer 2220.

[0107] By means of the superlattice structure 220, the risk of a continuation of lattice defects starting from the current spreading layer 6 towards the active region 20 can be largely reduced. The resulting loss of light can thus be avoided.

[0108] Overall, the semiconductor bodies described here and the semiconductor chip formed with them are characterized by high moisture stability, low light loss and, at the same time, good current spreading and/or p-contacting due to a high electrical conductivity with simultaneously low absorption losses. In addition, the reliability of the semiconductor chip can be improved due to improved adhesion of a dielectric layer on a current spreading layer.

[0109] The exemplary embodiments described in conjunction with the figures and their features can also be combined with each other according to further exemplary embodiments, even if such combinations are not explicitly shown in the figures.

[0110] Furthermore, the exemplary embodiments described in conjunction with the figures may have additional or alternative features according to the description in the general part.

[0111] The invention is not limited to the exemplary embodiments by the description. Rather, the invention comprises each feature as well as each combination of features, which in particular includes each combination of features in the patent claims, even if this feature or this combination itself is not explicitly indicated in the patent claims or exemplary embodiments.

[0112] The present patent application claims the priority of the German patent application DE 10 2017 123 542.6, the disclosure content of which is hereby incorporated by reference.

REFERENCES

[0113] 100 optoelectronic semiconductor chip

[0114] 1 semiconductor layer sequence

[0115] 2 surface of the semiconductor layer sequence

[0116] 20 active region

[0117] 21 n-conducting region

[0118] 22 p-conducting region

[0119] 3 first precursor

[0120] 4 second precursor

[0121] 31 III-compound material

[0122] 41 phosphorus-containing compound material

[0123] 5 chamber

[0124] 6 phosphide compound semiconductor material

[0125] 7 carrier gas

[0126] 8 third precursor

[0127] 9 p-contact layer

[0128] 10 p-current spreading layer

[0129] 11 by-product

[0130] 12 first layer

[0131] 13 current spreading layer

[0132] 14 p-connecting contact

[0133] 15 n-connecting contact

[0134] 16 carrier

[0135] 161 carrier substrate

[0136] 17 p-InGaAlP layer

[0137] 18 connection layer

[0138] 19 dielectric layer

[0139] 200 mirror layer

[0140] 210 recesses

[0141] 220 superlight structures

[0142] 2210 first subregion

[0143] 2220 second subregion