Selenium photomultiplier and method for fabrication thereof
11710798 · 2023-07-25
Assignee
Inventors
Cpc classification
H01L31/107
ELECTRICITY
H01L31/20
ELECTRICITY
H01L31/10
ELECTRICITY
H01L31/054
ELECTRICITY
Y02E10/52
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
H01L31/054
ELECTRICITY
H01L31/107
ELECTRICITY
H01L31/08
ELECTRICITY
Abstract
Provided is a field shaping multi-well photomultiplier and method for fabrication thereof. The photomultiplier includes a field-shaping multi-well avalanche detector, including a lower insulator, an a-Se photoconductive layer and an upper insulator. The a-Se photoconductive layer is positioned between the lower insulator and the upper insulator. A light interaction region, an avalanche region, and a collection region are provided along a length of the photomultiplier, and the light interaction region and the collection region are positioned on opposite sides of the avalanche region.
Claims
1. A method for fabricating a photomultiplier with a field-shaping multi-well avalanche detector, the method comprising: forming a lower insulator adjacent to a substrate, wherein the lower insulator includes a first face facing the substrate; forming an upper insulator spaced apart from a second face of the lower insulator, wherein the second face is provided on a side of the lower insulator opposite to the first face; forming a plurality of grids; forming an a-Se photoconductive layer between the lower insulator and the upper insulator; providing a high voltage source on the second face of the lower insulator, in a light interaction region of the photomultiplier; and providing a collector on the second face of the lower insulator, wherein the collector is positioned in a collection region that is opposite the light interaction region, with an avalanche region positioned between the light interaction region and the collection region.
2. The method of claim 1, wherein the substrate is a glass substrate.
3. The method of claim 1, further comprising performing photolithography to define the avalanche region along a portion of the a-Se photoconductive layer.
4. The method of claim 1, wherein the upper insulator is a chemical vapor deposited poly(p-xylylene) polymer configured to provides a moisture and dielectric barrier.
5. The method of claim 1, wherein the lower insulator is Polyimide.
6. The method of claim 1, further comprising forming a plurality of optical windows in the light interaction region.
7. The method of claim 1, wherein the avalanche region is formed along a first axis.
8. The method of claim 7, wherein the lower insulator, the a-Se photoconductive layer, and the upper insulator are formed along a second axis perpendicular to the first axis.
9. The method of claim 7, wherein the plurality of grids are configured to be biased to create a high-field region, to provide multi-stage avalanche gain that eliminates formation of field hot-spots inside the a Se photoconductive layer, and eliminate charge injection from high-field metal-semiconductor interfaces.
10. The method of claim 1, wherein the plurality of grids are provided along the avalanche region.
11. The method of claim 10, wherein each grid of the plurality of grids is provided at a predetermined distance from an adjacent another grid of the plurality of grids.
12. The method of claim 10, wherein each grid of the plurality of grids includes a first part and a second part, with the first part being opposite to the second part.
13. The method of claim 12, wherein the first part is formed on or in the upper insulator and the second part is formed on or in the lower insulator.
14. The method of claim 12, wherein the plurality of grids form a plurality of lateral Frisch grids with a plurality of amplification stages therebetween.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The above and other aspects, features and advantages of certain embodiments of the present disclosure will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:
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DETAILED DESCRIPTION
(9) The following detailed description of certain embodiments of the present disclosure will be made with reference to the accompanying drawings, with explanation about related functions or constructions known in the art are omitted for the sake of clearness in understanding the concept, to avoid obscuring the invention with unnecessary detail.
(10) Disclosed herein is a solid-state avalanche radiation detector, and a method for constructing same, using amorphous material as the photoconductive layer. The solid-state avalanche radiation detector is based on field-shaping by localizing the high-field avalanche region between a plurality of low-field regions, improving on the devices of Sauli [7], U.S. Pat. No. 6,437,339 to Lee, et al., U.S. Pat. No. 8,129,688 to A. H. Goldan, et al., U.S. Pat. Publ. No. 2016/0087113 A1 of U.S. application Ser. No. 14,888,879 to A. H. Goldan, et al. and U.S. Pat. Publ. No. 2015/0171232 A1 of U.S. application Ser. No. 14/414,607 to A. H. Goldan, et al., the content of each of which is incorporated herein by reference.
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(12) As shown in
(13) The avalanche region 150 is formed in a longitudinal direction, i.e., along a horizontal orientation, via photolithography, rather than by a vertical film thickness, as in conventional devices. Defining the avalanche region 150 via photolithography creates a stable, reliable and repeatable detector architecture.
(14) The light interaction region 140 has an upper, i.e., front, optical window 141 and a lower, i.e., back, optical window 142, for input of first light 144 and second light 146, from above and below the cascaded lateral SWAD structure 100, respectively.
(15) A high voltage source 149 is provided at a distal end of the light interaction region 140, and a collector 182 is provided at a distal end of the collection region 180, with the high voltage source 149 and the collector 182 provided on opposite horizontal ends of the cascaded lateral SWAD structure 100.
(16) The a-Se photoconductive layer 130 is positioned between the lower insulator 112 and the upper insulator 114. The lower insulator 112 is preferably Polyimide and the upper insulator 114 is preferably a chemical vapor deposited polyp-xylylene) polymer that provides a moisture and dielectric barrier. e.g., Parylene. The lower insulator 112 is positioned adjacent to and above a substrate 110, which is preferably a glass substrate.
(17) A plurality of grids 152, 154, 156, 158, i.e., lateral Frisch grids, are provided at predetermined intervals along a horizontal length of the avalanche region 150 of the cascaded lateral SWAD structure 100, with each grid of the plurality of grids 152, 154, 156, 158 provided at one or more predetermined distances from an adjacent another grid of the plurality of grids 152, 154, 156, 158.
(18) In the multi-well Se-PM of
(19) A high-field region is created by biasing the electrodes of each grid of the plurality of grids 152, 154, 156, 158, thereby achieving multi-stage avalanche gain. Accordingly, a practical Se-PM is provided with insulating blocking layers that eliminate the formation of field hot-spots inside the a-Se, and also eliminates charge injection from metal to semiconductor, with all grid electrodes being encapsulated with dielectric/insulator.
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(21) Reducing the number of grids reduces gain. Alternatively, increasing the number of grids provides corresponding gain increases. Essentially unlimited gain can be obtained by increasing the number of grids. Since grids are added in a horizontal orientation by photolithography, the gain is provided without increasing vertical thickness.
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(23) As shown in
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(26) As shown in
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(29) While the invention has been shown and described with reference to certain aspects thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the appended claims and equivalents thereof.
REFERENCES
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(31) [2] H. Shimamoto, T. Yamashita et al., IEEE Micro 31, p. 51 (2011).
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(35) [6] A. H. Goldan, J. A. Rowlands, M. and W. Zhao, Proc. Conf. Rec. IEEE NSS/MIC N32-4, Seattle, Wash. (2014).
(36) [7] F. Sauli, GEM: A new concept for electron amplification in gas detectors. Nucl. Instr. and Meth. A, 386(2-3):531-534, 1997.