Method and device for manufacturing semiconductor substrate

Abstract

This disclosure provides a method and a device for manufacturing a semiconductor substrate. The method for manufacturing a semiconductor substrate comprises the following steps: heating a semiconductor material to a molten state to obtain a molten semiconductor material; thermally spraying the molten semiconductor material onto a baseplate by using a thermal spraying gun, then cooling to solidify the molten semiconductor material on the baseplate to obtain the semiconductor substrate. The disclosed method offers, when manufacturing the semiconductor substrate, high material utilization, low manufacturing cost, and the ability to manufacture larger semiconductor substrate, with controllable thickness and high purity, providing broad application prospects.

Claims

1. A method for manufacturing a semiconductor substrate, comprising the following steps: heating a semiconductor material to a molten state to obtain a molten semiconductor material; thermally spraying the molten semiconductor material onto a baseplate by using a thermal spraying gun, then cooling to solidify the molten semiconductor material on the baseplate to obtain the semiconductor substrate; wherein before the cooling, an inert gas having a temperature higher than the molten point of the semiconductor material is blown onto the molten semiconductor material on the baseplate for purification.

2. The method of claim 1, wherein the thermally spraying is controlled to a rate of 0.1-0.5 L/s.

3. The method of claim 1, wherein the cooling is controlled to a rate of 0.1-10 C./min.

4. The method of claim 1, wherein when the thermally spraying is performed, the thermal spraying gun or the baseplate is continuously moved at a speed of 0.1 to 2 m/min.

5. The method of claim 1, further comprising: photo-etching, or applying anti-reflecting, on the semiconductor substrate.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1 is a schematic view of a method for manufacturing a semiconductor substrate according to an embodiment of this disclosure;

(2) FIG. 2 is a schematic structural view of a device for manufacturing a semiconductor substrate according to an embodiment of this disclosure.

(3) TABLE-US-00001 Description of the reference signs 1: Sealed chamber; 2: First heating 3: Thermal spraying gun; portion; 4: Baseplate; 5: Second heating 51: Heating chamber; portion; 52: Heating rod; 6: Roller.

DESCRIPTION OF EMBODIMENTS

(4) In order to make the objectives, technical solutions and advantages of this disclosure clearer, the technical solutions in the embodiments of this disclosure will be clearly and fully described in conjunction with the drawings and embodiments of this disclosure. It is obvious that the described embodiments are only some of the embodiments of this disclosure, rather than all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of this disclosure.

(5) The environment and apparatus for manufacturing the semiconductor substrate are as follows:

(6) Environment: a sealed process chamber that is thermally insulated and dust-free, in which the temperature is higher than the molten point of the semiconductor material. The inner and outer walls of the process chamber are provided with insulation panels for the thermal insulation.

(7) Thermal spraying gun: a contact type or non-contact type spraying gun with heat resistance and uniform atomization. When atomizing with gas, the gas should be heated to a temperature above the molten point of the semiconductor material.

(8) Baseplate: heat resistant metal or non-metal material capable of withstanding temperatures above the molten point of the semiconductor material. The baseplate shall have a flat and smooth surface.

Embodiment 1

(9) As shown in FIG. 1, in a sealed cavity 1 having a temperature of about 1800 C., polysilicon is heated to about 1800 C. by a first heating portion 2, putting the polysilicon in a molten state.

(10) Monosilicon is pre-laid on one end (left end) of the baseplate 4. The baseplate 4 is heated by a second heating portion 5. Heating rods 52 in the heating chamber 51 are controlled individually during the heating, so that the portion of the baseplate 4 receiving the molten silicon is at a temperature of about 1800 C. Then, the molten silicon is thermally sprayed onto the baseplate 4 by the thermal spraying gun 3 at a spraying rate of about 0.3 liter per second (L/s) while the molten silicon is being extended from the end of the baseplate 4 laid with the monosilicon, and the baseplate 4 is continuously moved by rollers 6 at a speed of about 0.3 m/min.

(11) Inert gas having a temperature of about 1800 C. is blown onto the molten silicon on the baseplate 4. After the impurities are blown off the baseplate 4, each of the heating rods 52 is controlled to be gradually cooled down at a rate of about 1 Celsius per minute ( C./min) to gradually solidify the molten silicon on the baseplate 4, so that crystals may be formed during the solidification process to produce a flexible silicon substrate having a thickness of 50 m and a purity of 15 9s (that is, there are 15 9s after the decimal point of 99.) Further, the flexible silicon substrate can also be photo-etched or anti-reflected.

Embodiment 2

(12) In a process chamber having a temperature of about 1600 C., gallium arsenide is heated to about 1600 C. to put the gallium arsenide in a molten state.

(13) The molten gallium arsenide is thermally sprayed onto a baseplate by a thermal spraying gun at a spraying rate of about 0.5 L/s while the baseplate is being continuously moved at a speed of about 1 meter per minute (m/min).

(14) Inert gas having a temperature of about 1600 C. is blown onto the molten gallium arsenide on the baseplate. After the impurities are blown off the baseplate, the temperature is gradually cooled down at a rate of 3 C./min to gradually solidify the molten gallium arsenide on the baseplate, producing a gallium arsenide substrate having a thickness of 100 m and a purity of 13 9 (that is, there are 13 9s after the decimal point of 99.).

Embodiment 3

(15) As shown in FIG. 2, the device for manufacturing a semiconductor substrate includes a sealed cavity 1, and a first heating portion 2, a thermal spraying gun 3 and a bearing portion disposed inside the sealed cavity 1. An outlet end of the thermal spraying gun 3 is disposed below an outlet end of the first heating portion 2, and the thermal spraying gun 3 may be moved relative to the bearing portion. The bearing portion has a baseplate 4, and a second heating portion 5 for heating the baseplate 4, the baseplate 4 being disposed below the thermal spraying gun 3.

(16) The sealed cavity 1 is used to provide a sealed, dust-free and thermally insulated environment for thermal spraying. The temperature inside the sealed cavity 1 should be higher than the molten point of the semiconductor material, thereby facilitating the spraying of the semiconductor material. In addition, an thermal insulating layer is disposed on the inner wall and/or the outer wall of the sealed cavity, thereby saving energy and reducing energy consumption.

(17) The manner in which the thermal spraying gun 3 is moved relative to the bearing portion is not specifically limited. For example, it is possible to have the bearing portion be fixed and the thermal spraying gun 3 be movable relative to the bearing portion, or have the thermal spraying gun 3 be fixed and the bearing portion be movable relative to the thermal spraying gun 3. In the case where the bearing portion is movable, a plurality of rollers may be disposed at intervals beneath the bottom of the bearing portion.

(18) In an embodiment, the second heating portion 5 may include a heating chamber 51 and a plurality of heating rods 52. The heating chamber 51 may be disposed under the baseplate 4, and the plurality of heating rods 52 may be sequentially disposed inside the heating chamber 51 along the length direction of the baseplate 4. In this embodiment, the temperature of each of the heating rods 52 can be individually adjusted and controlled to facilitate the implementation of the cooling operation.

(19) Further, the above setup may further include a blowing portion (not shown) disposed above the baseplate 4, the blowing portion having a blowing pipe and a blowing head disposed at one end of the blowing pipe, where the blowing head has a blowing nozzle disposed obliquely outward. The blowing portion thus disposed can blow impurities off the semiconductor substrate outwardly.

(20) In another embodiment, the above setup may further include a blowing portion (not shown) disposed above the substrate, the blowing portion having an blowing pipe and an blowing head disposed at one end of the blowing pipe, where the blowing head can oscillate relative to the blowing pipe. The blowing portion of this arrangement is capable of oscillating and blowing impurities off the semiconductor substrate.

(21) Further, the above setup may further include a fan, an air inlet pipe and a dust removing portion, where one end of the air inlet pipe is connected to the fan, the other end of the air inlet pipe is communicated to the sealed cavity, and the dust removing portion is disposed on the air inlet pipe. The fan, the air inlet pipe and the dust removing portion are arranged to ensure a dust-free environment inside the sealed cavity. The structure of the above dust removing portion is not specifically limited, and can be a conventional dust removing device in the art. In one embodiment, the dust removing unit has a casing and a plurality of dust removing nets stacked within the casing. An adhesive layer is disposed on the dust removing net. This arrangement provides a good dust removal effect.

(22) Finally, it should be noted that the above embodiments are merely intended to illustrate rather than to limit the technical solutions of this disclosure. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that the technical solutions described in the foregoing embodiments may be modified, or some or all of the technical features may be replaced by their equivalents, without causing the resultant technical solution to deviate from the scope of the technical solutions of the embodiments of this disclosure.