Organic electroluminescent device with organic flattening layer having surface Ra of 50 nm or less and method for producing same

Abstract

An organic EL device (100D) according to an embodiment of the present invention has: a substrate (1); a drive circuit layer (2) having a plurality of TFTs formed on the substrate; interlayer insulation layers (2Pa, 2Pb) formed on the drive circuit layer; an organic EL element layer (3) formed on the interlayer insulation layers; and a thin-film sealing structure (10DE) formed so as to cover the organic EL element layer. The interlayer insulation layers have contact holes (CH1, CH2). Contact parts (C1, C2) that connect the drive circuit layer and the organic EL element layer are formed inside the contact holes. The surface (2Pb_Sb) of the interlayer insulation layers and the surface (C_Sb) of the contact parts are flush, and the arithmetic average roughness Ra of the surfaces are 50 nm or less.

Claims

1. An organic electroluminescent device, comprising: a substrate; a driving circuit layer including a plurality of TFTs formed on the substrate, a plurality of gate bus lines and a plurality of source bus lines each connected with one of the plurality of TFTs, a plurality of terminals, and a plurality of lead wires each connecting one of the plurality of terminals, one of the plurality of gate bus lines, or one of the plurality of source bus lines to each other; an interlayer insulating layer formed on the driving circuit layer; an organic electroluminescent element layer formed on the interlayer insulating layer and including a plurality of organic electroluminescent elements each connected with one of the plurality of TFTs; and a thin film encapsulation structure formed so as to cover the organic electroluminescent element layer, wherein the interlayer insulating layer includes a contact hole, wherein in the contact hole, a contact portion connecting the driving circuit layer and the organic electroluminescent element layer to each other is formed, wherein the interlayer insulating layer includes a first inorganic protective layer exposing at least the plurality of terminals and an organic flattening layer formed on the first inorganic protective layer, wherein the organic flattening layer has a surface having an arithmetic average roughness Ra of 50 nm or less, wherein the thin film encapsulation structure includes a first inorganic barrier layer, an organic barrier layer in contact with a top surface of the first inorganic barrier layer and a second inorganic barrier layer in contact with a top surface of the organic barrier layer, the organic barrier layer being formed in a region enclosed by an inorganic barrier layer joint portion where the first inorganic barrier layer and the second inorganic barrier layer are in direct contact with each other, wherein as viewed in a direction of normal to the substrate, the organic flattening layer is formed in a region where the first inorganic protective layer is formed, the plurality of organic electroluminescent elements are located in a region where the organic flattening layer is formed, an outer perimeter of the thin film encapsulation structure crosses the plurality of lead wires and is present between an outer perimeter of the organic flattening layer and an outer perimeter of the first inorganic protective layer, and wherein in a portion where the first inorganic protective layer and the first inorganic barrier layer are in direct contact with each other on the plurality of lead wires, a side surface of a cross-sectional shape, of the first inorganic barrier layer, that is parallel to a line width direction of the plurality of lead wires has a tapering angle of less than 90 degrees.

2. The organic electroluminescent device of claim 1, further comprising a plurality of pixels each including one of the plurality of organic electroluminescent elements, wherein the contact portion is formed inner to the plurality of pixels.

3. The organic electroluminescent device of claim 1, wherein the plurality of electroluminescent elements each include a lower electrode, an organic layer and an upper electrode facing the lower electrode with the organic layer being provided between the lower electrode and the upper electrode, and wherein the contact portion is formed of a material different from a material of the lower electrode.

4. The organic electroluminescent device of claim 1, wherein the tapering angle of the side surface of the first inorganic barrier layer is less than 70 degrees.

5. The organic electroluminescent device of claim 1, wherein the organic flattening layer is formed of polyimide.

6. A method for producing the organic electroluminescent device of claim 1, the method comprising: forming the driving circuit layer on the substrate; forming an interlayer insulating film, including a contact hole, on the driving circuit layer; forming a conductive contact film covering the interlayer insulating film; and subjecting a surface of the contact film and a surface of the interlayer insulating film to chemical mechanical polishing to provide the interlayer insulating layer and the contact portion.

7. The method of claim 6, wherein forming a conductive contact film includes forming a titanium film by sputtering and forming a copper film by plating on the titanium film.

8. The method of claim 6, wherein forming an interlayer insulating film includes forming a first inorganic protective film on the driving circuit layer and forming an organic flattening film on the first inorganic protective film; the method further comprising: heating the interlayer insulating layer to a temperature of 100° C. or higher after subjecting the surface of the contact film and the surface of the interlayer insulating film to chemical mechanical polishing to provide the interlayer insulating layer and the contact portion; and forming an organic layer, included in each of the organic electroluminescent elements, on the interlayer insulating layer after heating the interlayer insulating layer.

9. An organic electroluminescent device, comprising: a substrate; a driving circuit layer including a plurality of TFTs formed on the substrate, a plurality of gate bus lines and a plurality of source bus lines each connected with one of the plurality of TFTs, a plurality of terminals, and a plurality of lead wires each connecting one of the plurality of terminals, and one of the plurality of gate bus lines, or one of the plurality of source bus lines to each other; an interlayer insulating layer formed on the driving circuit layer; an organic electroluminescent element layer formed on the interlayer insulating layer and including a plurality of organic electroluminescent elements each connected with one of the plurality of TFTs; and a thin film encapsulation structure formed so as to cover the organic electroluminescent element layer, wherein the interlayer insulating layer includes a contact hole, wherein in the contact hole, a contact portion connecting the driving circuit layer and the organic electroluminescent element layer to each other is formed, wherein the interlayer insulating layer includes a first inorganic protective layer exposing at least the plurality of terminals, an organic flattening layer formed on the first inorganic protective layer, and a second inorganic protective layer formed on the organic flattening layer, wherein the second inorganic protective layer has a surface having an arithmetic average roughness Ra of 50 nm or less, wherein the thin film encapsulation structure includes a first inorganic barrier layer, an organic barrier layer in contact with a top surface of the first inorganic barrier layer and a second inorganic barrier layer in contact with a top surface of the organic barrier layer, the organic barrier layer being formed in a region enclosed by an inorganic barrier layer joint portion where the first inorganic barrier layer and the second inorganic barrier layer are in direct contact with each other, wherein as viewed in a direction of normal to the substrate, the organic flattening layer is formed in a region where the first inorganic protective layer is formed, the plurality of organic electroluminescent elements are located in a region where the organic flattening layer is formed, an outer perimeter of the thin film encapsulation structure crosses the plurality of lead wires and is present between an outer perimeter of the organic flattening layer and an outer perimeter of the first inorganic protective layer, and wherein in a portion where the first inorganic protective layer and the first inorganic barrier layer are in direct contact with each other on the plurality of lead wires, a side surface of a cross-sectional shape, of the first inorganic barrier layer, that is parallel to a line width direction of the plurality of lead wires has a tapering angle of less than 90 degrees.

10. The organic electroluminescent device of claim 9, further comprising a plurality of pixels each including one of the plurality of organic electroluminescent elements, wherein the contact portion is formed inner to the plurality of pixels.

11. The organic electroluminescent device of claim 10, wherein the plurality of electroluminescent elements each include a lower electrode, an organic layer and an upper electrode facing the lower electrode with the organic layer being provided between the lower electrode and the upper electrode, and wherein the contact portion is formed of a material different from a material of the lower electrode.

12. The organic electroluminescent device of claim 9, wherein the tapering angle of the side surface of the first inorganic barrier layer is less than 70 degrees.

13. The organic electroluminescent device of claim 9, wherein the organic flattening layer is formed of polyimide.

14. A method for producing the organic electroluminescent device of claim 9, the method comprising: forming the driving circuit layer on the substrate; forming an interlayer insulating film, including a contact hole, on the driving circuit layer; forming a conductive contact film covering the interlayer insulating film; and subjecting a surface of the contact film and a surface of the interlayer insulating film to chemical mechanical polishing to provide the interlayer insulating layer and the contact portion.

15. The method of claim 14, wherein forming the conductive contact film includes forming a titanium film by sputtering and forming a copper film by plating on the titanium film.

16. The method of claim 14, wherein forming the interlayer insulating film includes forming a first inorganic protective film on the driving circuit layer and forming an organic flattening film on the first inorganic protective film; the method further comprising: heating the interlayer insulating layer to a temperature of 100° C. or higher after subjecting the surface of the contact film and the surface of the interlayer insulating film to chemical mechanical polishing to provide the interlayer insulating layer and the contact portion; and forming an organic layer, included in each of the organic electroluminescent elements, on the interlayer insulating layer after heating the interlayer insulating layer.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1A is a schematic partial cross-sectional view of an active region of an OLED display device 100 according to an embodiment of the present invention, and FIG. 1B is a partial cross-sectional view of a TFE structure 10 formed on an OLED 3.

(2) FIG. 2 is a schematic plan view of an OLED display device 100A according to an embodiment of the present invention.

(3) FIG. 3A and FIG. 3B are each a schematic cross-sectional view of the OLED display device 100A; FIG. 3A is a cross-sectional view taken along line 3A-3A′ in FIG. 2, and FIG. 3B is a cross-sectional view taken along line 3B-3B′ in FIG. 2; and FIG. 3C is a cross-sectional view showing tapering angles θ of side surfaces of layers.

(4) FIG. 4A through FIG. 4D are each a schematic cross-sectional view of the OLED display device 100A; FIG. 4A is a cross-sectional view taken along line 4A-4A′ in FIG. 2, FIG. 4B is a cross-sectional view taken along line 4B-4B′ in FIG. 2, FIG. 4C is a cross-sectional view taken along line 4C-4C′ in FIG. 2, and FIG. 4D is a cross-sectional view taken along line 4D-4D′ in FIG. 2.

(5) FIG. 5A and FIG. 5B are respectively schematic cross-sectional views of OLED display devices 100B1 and 100B2 according to comparative examples, each corresponding to FIG. 4B.

(6) FIG. 6 is a schematic plan view of an OLED display device 100C according to a comparative example.

(7) FIG. 7A and FIG. 7B are each a schematic cross-sectional view of the OLED display device 100C; FIG. 7A is a cross-sectional view taken along line 7A-7A′ in FIG. 6, and FIG. 7B is a cross-sectional view taken along line 7B-7B′ in FIG. 6.

(8) FIG. 8A through FIG. 8C are each a schematic cross-sectional view of the OLED display device 100C; FIG. 8A is a cross-sectional view taken along line 8A-8A′ in FIG. 6, FIG. 8B is a cross-sectional view taken along line 8B-8B′ in FIG. 6, and FIG. 8C is a cross-sectional view taken along line 8C-8C′ in FIG. 6.

(9) FIG. 9A and FIG. 9B are each a schematic cross-sectional view showing an example of TFT that may be included in an OLED display device according to an embodiment.

(10) FIG. 10A through FIG. 10C are schematic cross-sectional views of another OLED display device according to an embodiment, respectively corresponding to FIG. 4B through FIG. 4D.

(11) FIG. 11A and FIG. 11B are schematic cross-sectional views of still another OLED display device 100D according to an embodiment.

(12) FIG. 12A through FIG. 12C are schematic cross-sectional views showing a method for producing the OLED display device 100D.

(13) FIG. 13A and FIG. 13B are each a schematic cross-sectional view of still another OLED display device 100E according to an embodiment.

(14) FIG. 14A through FIG. 14C are schematic cross-sectional views showing a method for producing the OLED display device 100E.

(15) FIG. 15A and FIG. 15B schematically show a structure of a film formation device 200; FIG. 15A shows a state of the film formation device 200 in a step of condensing a photocurable resin on a first inorganic barrier layer, and FIG. 15B shows a state of the film formation device 200 in a step of curing the photocurable resin.

DESCRIPTION OF EMBODIMENTS

(16) Hereinafter, an OLED display device and a method for producing the same according to an embodiment of the present invention will be described with reference to the drawings. In the following, an OLED display device including a flexible substrate will be described as an example. Nonetheless, embodiments of the present invention are not limited to being directed to an organic EL display device, but may be directed to another organic EL device such as an organic EL illumination device or the like. Embodiments of the present invention are not limited to the embodiments described below as examples.

(17) First, with reference to FIG. 1A and FIG. 1B, a basic structure of an OLED display device 100 according to an embodiment of the present invention will be described. FIG. 1A is a schematic partial cross-sectional view of an active region of the OLED display device 100 according to an embodiment of the present invention. FIG. 1B is a partial cross-sectional view of a TFE structure 10 formed on an OLED 3.

(18) The OLED display device 100 includes a plurality of pixels, and each of the pixels includes at least one organic EL element (OLED). Herein, a structure corresponding to one OLED will be described for the sake of simplicity.

(19) As shown in FIG. 1A, the OLED display device 100 includes a flexible substrate (hereinafter, may be referred to simply as a “substrate”) 1, a circuit (may be referred to as a “driving circuit” or a “backplane”) 2 formed on the substrate 1 and including a TFT, an inorganic protective layer (first inorganic protective layer) 2Pa formed on the circuit 2, an organic flattening layer 2Pb formed on the inorganic protective layer 2Pa, the OLED 3 formed on the organic flattening layer 2Pb, and the TFE structure 10 formed on the OLED 3. Hereinafter, an assembly of the substrate 1, the circuit 2 formed on the substrate 1, the inorganic protective layer 2Pa, the organic flattening layer 2Pb and the OLED 3 may be referred to as an “element substrate 20”. Namely, the assembly of the substrate 1 and the components that are formed on the substrate 1 and are closer to the substrate 1 than the TFE structure 10 may be collectively referred to as the “element substrate”.

(20) The OLED 3 is, for example, of a top emission type. An uppermost portion of the OLED 3 is, for example, an upper electrode or a cap layer (refractive index adjusting layer). A layer including a plurality of the OLEDs 3 may be referred to as an “OLED layer 3”. An optional polarizing plate 4 is located on the TFE structure 10. The circuit 2 and the OLED layer 3 may share a part of the components. For example, a layer having a touch panel function may be located between the TFE structure 10 and the polarizing plate 4. Namely, the OLED display device 100 may be altered to a display device including an on-cell type touch panel.

(21) The substrate 1 is, for example, a polyimide film having a thickness of 15 μm. The circuit 2 including the TFT has a thickness of, for example, 4 μm. The inorganic protective layer 2Pa has a structure of, for example, SiN.sub.x layer (500 nm)/SiO.sub.2 layer (100 nm) (top layer/bottom layer). Alternatively, the inorganic protective layer 2Pa may have a three-layer structure of, for example, SiO.sub.2 layer/SiN.sub.x layer/SiO.sub.2 layer. These layers may have thicknesses of, for example, 200 nm/300 nm/100 nm. Still alternatively, the inorganic protective layer 2Pa may be a single layer of SiN.sub.x (200 nm). The organic flattening layer 2Pb is, for example, an acrylic resin layer, an epoxy resin layer or a polyimide layer having a thickness of 4 μm. The organic flattening layer 2Pb may be formed of a photosensitive resin or a non-photosensitive resin. The OLED 3 has a thickness of, for example, 1 μm. The TFE structure 10 has a thickness of, for example, 2.5 μm or less.

(22) FIG. 1B is a partial cross-sectional view of the TFE structure 10 formed on the OLED 3. A first inorganic barrier layer (e.g., SiN.sub.x layer) 12 is formed immediately on the OLED 3, an organic barrier layer (e.g., acrylic resin layer) 14 is formed on the first inorganic barrier layer 12, and a second inorganic barrier layer (e.g., SiN.sub.x layer) 16 is formed on the organic barrier layer 14.

(23) For example, the first inorganic barrier layer 12 is an SiN.sub.x layer having a thickness of, for example, 1.5 μm, the second inorganic barrier layer 16 is an SiN.sub.x layer having a thickness of, for example, 800 nm, and the organic barrier layer 14 is an acrylic resin layer having a thickness of, for example, less than 100 nm. Each of the first inorganic barrier layer 12 and the second inorganic barrier layer 16 independently has a thickness of 200 nm or greater and 1500 nm or less. The organic barrier layer 14 has a thickness of 50 nm or greater and less than 200 nm. The TFE structure has a thickness of, preferably, 400 nm or greater and less than 3 μm, and more preferably, 400 nm or greater and 2.5 μm or less.

(24) The TFE structure 10 is formed so as to protect the active region (see the active region R1 in FIG. 2) of the OLED display device 100. As described above, the TFE structure 10 includes, on the active region R1, the first inorganic barrier layer 12, the organic barrier layer 14 and the second inorganic barrier layer 16 sequentially provided with the first inorganic barrier layer 12 being closest to the OLED 3. The organic barrier layer 14 is not present as a film covering the entirety of the active region R1, but has an opening. A portion, of the organic barrier layer 14, that excludes the opening, namely, a portion where an organic film is actually present, will be referred to as a “solid portion”. The organic barrier layer 14 may be formed by the method described in, for example, Patent Document No. 1 or 2 or by use of a film formation device 200 described below.

(25) The “opening” (may also be referred to as a “non-solid portion”) does not need to be enclosed by the solid portion, but includes a cutout portion or the like. In the opening, the first inorganic barrier layer 12 and the second inorganic barrier layer 16 are in direct contact with each other. Hereinafter, a portion where the first inorganic barrier layer 12 and the second inorganic barrier layer 16 are in direct contact with each other will be referred to as an “inorganic barrier layer joint portion”.

(26) Now, with reference to FIG. 2 and FIGS. 3A-3C, a structure of, and a method for producing, an OLED display device 100A according to an embodiment of the present invention will be described.

(27) FIG. 2 shows a schematic plan view of the OLED display device 100A according to an embodiment of the present invention. With reference to FIG. 3A through FIG. 3C and FIG. 4A through FIG. 4D, a cross-sectional structure of the OLED display device 100A will be described. FIG. 3A and FIG. 3B are each a schematic cross-sectional view of the OLED display device 100A. FIG. 3A is a cross-sectional view taken along line 3A-3A′ in FIG. 2, and FIG. 3B is a cross-sectional view taken along line 3B-3B′ in FIG. 2. FIG. 3C is a cross-sectional view showing tapering angles θ of side surfaces of layers. FIG. 4A through FIG. 4D are each a schematic cross-sectional view of the OLED display device 100A. FIG. 4A is a cross-sectional view taken along line 4A-4A′ in FIG. 2. FIG. 4B is a cross-sectional view taken along line 4B-4B′ in FIG. 2. FIG. 4C is a cross-sectional view taken along line 4C-4C′ in FIG. 2. FIG. 4D is a cross-sectional view taken along line 4D-4D′ in FIG. 2.

(28) First, FIG. 2 will be referred to. The circuit 2 formed on the substrate 1 includes a plurality of TFTs (not shown), and a plurality of gate bus lines (not shown) and a plurality of source bus lines (not shown) each connected to either one of the plurality of TFTs (not shown). The circuit 2 may be a known circuit that drives the plurality of OLEDs 3. The plurality of OLEDs 3 are each connected with either one of the plurality of TFTs included in the circuit 2. The OLEDs 3 may be known OLEDs.

(29) The circuit 2 further includes a plurality of terminals 34 located in a peripheral region R2 outer to the active region (region enclosed by the dashed line in FIG. 2) R1, where the plurality of OLEDs 3 are located, and also includes a plurality of lead wires 32 each connecting either one of the plurality of terminals 34 and either one of the plurality of gate bus lines or either one of the plurality of source bus lines to each other. The entirety of the circuit 2 including the plurality of TFTs, the plurality of gate bus lines, the plurality of source bus lines, the plurality of lead wires 32 and the plurality of terminals 34 may be referred to as a “driving circuit layer 2”. A portion, of the driving circuit layer 2, that is formed in the active region R1 will be referred to as a “driving circuit layer 2A”.

(30) In FIG. 2 and the like, only the lead wires 32 and/or the terminals 34 may be shown as components of the driving circuit layer 2. Nonetheless, the driving circuit layer 2 includes a conductive layer including the lead wires 32 and the terminals 34 and further includes at least one conductive layer, at least one insulating layer, and at least one semiconductor layer. The structure of the conductive layers, the insulating layer and the semiconductor layer included in the driving circuit layer 2 may be changed in accordance with the structure of the TFT shown in, for example, FIG. 9A or FIG. 9B as an example. An insulating film (base coat) may be formed on the substrate 1 as an underlying layer for the driving circuit layer 2.

(31) As viewed in a direction of normal to the substrate 1, the organic flattening layer 2Pb is formed in a region where the inorganic protective layer 2Pa is formed. The active region R1 (2A, 3) is formed in a region where the organic flattening layer 2Pb is formed. An outer perimeter of the TFE structure 10 crosses the plurality of lead wires 32, and is present between an outer perimeter of the organic flattening layer 2Pb and an outer perimeter of the inorganic protective layer 2Pa. Therefore, the organic flattening layer 2Pb is enclosed, together with the OLED layer 3, by a joint portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other (see FIG. 3B and FIG. 4B). The inorganic protective layer 2Pa is formed by, for example, plasma CVD using a mask (e.g., metal mask) so as to expose at least the plurality of terminals 34. Alternatively, the inorganic protective layer 2Pa may be formed as follows, for example. An inorganic protective film is formed by plasma CVD so as to cover the terminals 34 and then is patterned by a photolithography process (including a dry etching step), so that an opening exposing the terminals 34 is formed. As described below, in the case where a second inorganic protective layer 2Pa2 is formed on the organic flattening layer 2Pb (see FIG. 13A), it is preferred that the patterning including the formation of a contact hole is performed in one step for an inorganic protective film 2Pa (first inorganic protective film 2Pa1), an organic flattening film 2Pb and the second inorganic protective film 2Pa2 (see FIG. 14B).

(32) The inorganic protective layer 2Pa protects the driving circuit layer 2. The organic flattening layer 2Pb flattens a surface of an underlying layer on which the OLED layer 3 is to be formed. Like the organic barrier layer 14, the organic flattening layer 2Pb has a water vapor barrier property lower than that of the inorganic protective layer 2Pa or the inorganic barrier layer 12 or 16. Therefore, as shown in FIG. 6 through FIGS. 8A-8C regarding an OLED display device 100C according to a comparative example, in the case where an organic flattening layer 2Pbc is partially exposed to the air (ambient atmosphere), the organic flattening layer 2Pbc absorbs moisture from the exposed portion. As a result, the organic flattening layer 2Pbc acts as a route that guides the moisture in the air into the active region R1. As described above, in the OLED display device 100A according to an embodiment, the organic flattening layer 2Pb is enclosed by the joint portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other. Therefore, the organic flattening layer 2Pb is prevented from guiding the moisture into the active region R1.

(33) The organic flattening layer 2Pb is formed of, for example, a photosensitive resin. The organic flattening layer 2Pb is formed by any of various application methods or printing methods. In the case where the resin is photosensitive, the organic flattening layer 2Pb may be formed easily only in a predetermined region by a photolithography process. For example, a photosensitive resin is applied onto substantially the entirety of the element substrate and then is exposed to light and developed, so that an organic resin film may be formed in a predetermined region excluding a peripheral region of the element substrate (see, for example, FIG. 11B). Use of a photosensitive resin also allows a contact hole to be formed by a photolithography process. The photosensitive resin may be positive or negative. An acrylic resin, an epoxy resin or a polyimide resin that are photosensitive may be preferably used. Needless to say, in the case where a photoresist is used separately, the organic flattening layer 2Pb may be formed of a non-photosensitive resin.

(34) An organic resin easily absorbs moisture. Meanwhile, as described above, the OLED (especially, an organic light emitting layer and a cathode electrode material) is easily influenced by moisture to be deteriorated. Therefore, it is preferred that before the OLED layer 3 is formed on the organic flattening layer 2Pb, baking is performed in order to remove the moisture contained in the organic flattening layer 2Pb. The baking temperature is preferably, for example, 100° C. or higher (e.g., for 1 hour or longer), and more preferably 250° C. or higher (e.g., for 15 minutes or longer). The atmosphere may have an atmospheric pressure. Baking in a low pressure atmosphere may shorten the baking time. It is preferred to use a resin material having a high thermal resistance, for example, polyimide, in order to prevent deterioration by heat in the baking step.

(35) There are cases where after the organic flattening layer 2Pb is formed but before the OLED layer 3 is formed, the element substrate is stored or transported. Namely, after the element substrate including the driving circuit layer 2, the inorganic protective layer 2Pa and the organic flattening layer 2Pb is formed but before the OLED layer 3 is formed, there may be a certain period of time (e.g., the element substrate may be stored for at least one day or for several days) or the element substrate may be transported to a different plant. One method to prevent contamination of a surface of the organic flattening layer 2Pb during such a time period or to prevent adhesion of dust to the surface during the transportation may be, for example, forming a positive photoresist film that covers the organic flattening layer 2Pb. The photoresist film is preferably formed as follows. A photoresist solution is applied and then prebaking is performed (the solvent is volatilized to be removed; for example, baking is performed in a temperature range of about 90° C. or higher and about 110° C. or lower for about 5 minutes to about 30 minutes). The photoresist film is removed after the storage or the transportation but immediately before the formation of the OLED layer 3, so that a clean surface of the organic flattening layer 2Pb may be obtained. The photoresist film is preferably removed as follows. The photoresist film is entirely exposed to light and then is developed with no post-baking usually performed; or after the prebaking, the photoresist film is released by a release solution without being entirely exposed to light. A preferably usable material to form the positive photoresist film is, for example, OFPR-800 produced by Tokyo Ohka Kogyo Co., Ltd., which is a positive photoresist.

(36) As described below with reference to FIG. 11A, a bank layer may be formed during the formation of the OLED layer 3. The bank layer is formed after a lower electrode is formed but before an organic layer (organic EL layer) is formed. The bank layer is formed of an organic resin (e.g., polyimide), and therefore, easily absorbs moisture and contacts the organic layer. For these reasons, it is preferred to perform baking in order to remove the moisture in the bank layer. After the organic flattening layer 2Pb is formed and also the lower electrode and the bank layer are formed, a positive photoresist film that protects a surface of the element substrate may be formed as described above. After the necessary storage and/or transportation, the photoresist film is removed as described above and the element substrate is baked immediately before the formation of the organic layer, so that the moisture contained in the organic flattening layer 2Pb and the bank layer is removed. In this manner, the baking step of removing the moisture contained in the organic flattening layer 2Pb and the baking step of removing the moisture contained in the bank layer may be performed as one step. Needless to say, the baking steps may be performed as follows. After the organic flattening layer 2Pb is protected with a positive photoresist film and the positive photoresist film is removed as described above, a baking step of removing the moisture contained in the organic flattening layer 2Pb is performed. After this, the lower electrode and the bank layer are formed, and then a baking step of removing the moisture contained in the bank layer is performed before the organic layer is formed.

(37) Now, with reference to FIG. 3A through FIG. 3C and FIG. 4A through FIG. 4D, the cross-sectional structure of the OLED display device 100A will be described in more detail.

(38) As shown in FIG. 3A, FIG. 3B, FIG. 4A and FIG. 4B, a TFE structure 10A includes the first inorganic barrier layer 12 formed on the OLED 3, the organic barrier layer 14 in contact with the first inorganic barrier layer 12 and the second inorganic barrier layer 16 in contact with the organic barrier layer 14. The first inorganic barrier layer 12 and the second inorganic barrier layer 16 are each, for example, an SiN.sub.x layer, and are each selectively formed by plasma CVD using a mask only in a predetermined region so as to cover the active region R1.

(39) The organic barrier layer 14 may be formed by, for example, the method described in Patent Document No. 2 or 3 mentioned above. For example, in a chamber, vapor of an organic material (e.g., acrylic monomer) or a mist-like organic material is supplied onto the element substrate maintained at a temperature lower than, or equal to, room temperature and is condensed on the element substrate. The organic material put into a liquid state is located locally, more specifically, at a border between a side surface of a protruding portion of, and a flat portion of, the first inorganic barrier layer 12 by a capillary action or a surface tension of the organic material. Then, the organic material is irradiated with, for example, ultraviolet rays to form a solid portion of the organic barrier layer (e.g., acrylic resin layer) 14 at the above-mentioned border in the vicinity of the protruding portion. The organic barrier layer 14 formed by this method does not substantially include the solid portion on the flat portion. Regarding the method for forming the organic barrier layer, the disclosures of Patent Documents Nos. 2 and 3 are incorporated herein by reference.

(40) Alternatively, the organic barrier layer 14 may be formed by adjusting an initial thickness of the resin layer to be formed by use of the film formation device 200 (e.g., to less than 100 nm) and/or by performing ashing on the resin layer once formed. As described below in detail, the ashing may be performed by plasma ashing using, for example, at least one type of gas among N.sub.2O, O.sub.2 and O.sub.3.

(41) FIG. 3A is a cross-sectional view taken along line 3A-3A′ in FIG. 2, and shows a portion including a particle P. The particle P is a microscopic dust particle generated during the production of the OLED display device, and is, for example, a microscopic piece of broken glass, a metal particle or an organic particle. Such a particle is generated especially easily in the case where mask vapor deposition is used.

(42) As shown in FIG. 3A, the organic barrier layer (solid portion) 14 may be formed only in the vicinity of the particle P. A reason for this is that the acrylic monomer supplied after the first inorganic barrier layer 12 is formed is condensed and present locally, more specifically, in the vicinity of a surface of a first inorganic barrier layer 12a on the particle P (the surface has a tapering angle θ of 90 degrees or larger). The opening (non-solid portion) of the organic barrier layer 14 is on the flat portion of the first inorganic barrier layer 12.

(43) In the case where the particle (having a diameter of, for example, 1 μm or longer) P is present, a crack (defect) 12c may be formed in the first inorganic barrier layer 12. This is considered to be caused by impingement of the SiN.sub.x layer 12a growing from a surface of the particle P and an SiN.sub.x layer 12b growing from a flat portion of a surface of the OLED 3. In the case where such a crack 12c is present, the level of barrier property of the TFE structure 10A is decreased.

(44) In the TFE structure 10A in the OLED display device 100A, as shown in FIG. 3A, the organic barrier layer 14 is formed so as to fill the crack 12c of the first inorganic barrier layer 12, and a surface of the organic barrier layer 14 couples the surface of the first inorganic barrier layer 12a on the particle P and a surface of the first inorganic barrier layer 12b on the flat portion of the OLED 3 to each other continuously and smoothly. Therefore, the second inorganic barrier layer 16, which is formed on the first inorganic barrier layer 12a on the particle P and also on the organic barrier layer 14, is a fine film with no defect. As can be seen, even if the particle P is present, the organic barrier layer 14 may keep high the level of barrier property of the TFE structure 10A.

(45) Now, with reference to FIG. 3B and FIG. 4A through FIG. 4D, a cross-sectional structure on the lead wires 32 and the terminals 34 will be described.

(46) As shown in FIG. 3B, the lead wires 32 and the terminals 34 are integrally formed on the substrate 1. The inorganic protective layer 2Pa is formed on the lead wires 32 so as to expose the terminals 34. The organic flattening layer 2Pb is formed on the inorganic protective layer 2Pa, and the OLED layer 3 is formed on the organic flattening layer 2Pb. The TFE structure 10A is formed so as to cover the OLED layer 3 and the organic flattening layer 2Pb. The OLED layer 3 and the organic flattening layer 2Pb are enclosed by the joint portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other. The organic barrier layer (solid portion) 14 between the first inorganic barrier layer and the second inorganic barrier layer 16 in the TFE structure 10A is formed only in the vicinity of a protruding portion such as the particle or the like, and thus is not shown here. The organic barrier layer (solid portion) 14 is enclosed by the inorganic barrier layer joint portion, where the first inorganic barrier layer 12 and the second inorganic barrier layer 16 are in direct contact with each other.

(47) As shown in FIG. 4A, in a region closer to the active region R1 (cross-section taken along line 4A-4A′ in FIG. 2), the inorganic protective layer 2Pa, the organic flattening layer 2Pb and the TFE structure 10A are formed on the lead wires 32.

(48) As shown in FIG. 4B, in a cross-section taken along line 4B-4B′ in FIG. 2, the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other, and the organic flattening layer 2Pb is enclosed by the joint portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other (see FIG. 2 and FIG. 3B).

(49) As shown in FIG. 4C, in a region closer to the terminals 34, only the inorganic protective layer 2Pa is formed on the lead wires 32.

(50) As shown in FIG. 4D, the terminals 34 are exposed also from the inorganic protective layer 2Pa and are used for electrical connection with an external circuit (e.g., FPCs (Flexible Printed Circuits)).

(51) A region including the portions shown in FIG. 4B through FIG. 4D is not covered with the organic flattening layer 2Pb. Therefore, during the formation of the organic barrier layer 14 of the TFE structure 10A, an organic barrier layer (solid portion) may be formed in this region. For example, if a side surface of a cross-section, of the lead wires 32, that is parallel to the line width direction thereof has a tapering angle θ of 90 degrees or larger, an organic barrier layer may be formed along the side surface of each of the lead wires 32. However, as shown in FIG. 4B through FIG. 4D, in the OLED display device 100A according to this embodiment, at least in this region, the tapering angle θ of the side surface of the cross-section of each of the lead wires 32 and each of the terminals 34 is smaller than 90 degrees, and thus the photocurable resin is not located locally. Therefore, the organic barrier layer (solid portion) is not formed along the side surface of any of the lead wires 32 or any of the terminals 34.

(52) Now, with reference to FIG. 3C, the tapering angle θ of the side surface of each of the layers will be described. FIG. 3C is a cross-sectional view showing the tapering angle θ of the side surface of each of the layers, and corresponds to, for example, the cross-section of FIG. 4B. As shown in FIG. 3C, the tapering angle θ of the side surface of the cross-section, of the lead wire 32, that is parallel to the width direction thereof will be represented as θ(32). The tapering angle θ of the side surface of each of the other layers will be represented in a similar manner with θ (reference sign of the component).

(53) With such representations, the tapering angles θ of the side surface of the inorganic protective layer 2Pa formed on the lead wire 32, the side surface of the first inorganic barrier layer 12 of the TFE structure 10A formed on the inorganic protective layer 2Pa, and the side surface of the second inorganic barrier layer 16 of the TFE structure 10A formed on the inorganic protective layer 2Pa fulfill the relationship of θ(32)≥θ(2Pa)≥θ(12)≥θ(16). Therefore, if the tapering angle θ(32) of the side surface of the lead wire 32 is smaller than 90 degrees, the tapering angle θ(2Pa) of the side surface of the inorganic protective layer 2Pa and the tapering angle θ(12) of the side surface of the first inorganic barrier layer 12 are each also smaller than 90 degrees.

(54) Assuming that the method for forming the organic barrier layer described in Patent Document No. 2 or 3 is used in the case where the tapering angle θ of the side surface is degrees or larger, vapor of an organic material (e.g., acrylic monomer) or a mist-like organic material is condensed, and thus an organic barrier layer (solid portion) is formed, along a border between the side surface and the flat surface (making an angle of 90 degrees or smaller). When this occurs, for example, the organic barrier layer (solid portion) formed along the lead wire acts as a route that guides water vapor in the air into the active region.

(55) FIG. 5A is a schematic cross-sectional view of an OLED display device 100B1 according to a comparative example, and corresponds to FIG. 4B. If, for example, as shown in FIG. 5A, a tapering angle θ(32B1) of a side surface of each of lead wires 32B1 and a tapering angle θ(12B1) of a side surface of a first inorganic barrier layer 12B1 are each 90 degrees or larger, an organic barrier layer (solid portion) 14B1 is formed between the first inorganic barrier layer 12B1 and a second inorganic barrier layer 16B1 of a TFE structure 10B1 along the side surface of the first inorganic barrier layer 12B1. The OLED display device 100B1 may be obtained by, for example, changing the OLED display device 100 according to an embodiment as follows. The inorganic protective layer 2Pa is omitted, and the tapering angle θ(32) of the side surface of the lead wire 32 and the tapering angle θ(12) of the side surface of the first inorganic barrier layer 12 are changed to 90 degrees or larger.

(56) FIG. 5B is a schematic cross-sectional view of an OLED display device 100B2 according to a comparative example, and corresponds to FIG. 4B. If, as shown in FIG. 5B, a tapering angle θ(32B2) of a side surface of each of lead wires 32B2, a tapering angle θ(2PaB2) of a side surface of an inorganic protective layer 2PaB2 and a tapering angle θ(12B2) of a side surface of a first inorganic barrier layer 12B2 are each 90 degrees or larger, an organic barrier layer (solid portion) 14B2 is formed between the first inorganic barrier layer 12B2 and a second inorganic barrier layer 16B2 of a TFE structure 10B2 along the side surface of the first inorganic barrier layer 12B2. The OLED display device 100B2 may be obtained by, for example, changing the OLED display device 100A according to an embodiment as follows. The tapering angle θ(32) of the side surface of the lead wire 32 and the tapering angle θ(12) of the side surface of the first inorganic barrier layer 12 are changed to 90 degrees or larger.

(57) Unlike the OLED display device 100B1, the OLED display device 100B2 includes the inorganic protective layer 2PaB2. Therefore, the tapering angle θ(12B2) of the side surface of the first inorganic barrier layer 12B2 is likely to be smaller than the tapering angle θ(12B1) of the side surface of the first inorganic barrier layer 12B1 of the OLED display device 100B1.

(58) In the OLED display device 100A in an embodiment according to the present invention shown in FIG. 4B through FIG. 4D, the tapering angles θ(32), θ(2Pa) and θ(12) of the side surfaces of the lead wire 32, the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are all smaller than 90 degrees. Thus, the organic barrier layer 14 is not formed along these side surfaces. Therefore, moisture in the air does not reach the inside of the active region R1 via the organic barrier layer (solid portion) 14, and thus the OLED display device 100A may have a high level of moisture-resistant reliability. In this example, the tapering angles θ(32), θ(2Pa) and θ(12) are all smaller than 90 degrees. The present invention is not limited to this. It is sufficient that at least the tapering angle θ(12) of the side surface, of the first inorganic barrier layer 12, that forms a surface immediately below the organic barrier layer 14 is smaller than 90 degrees. With such a structure, the stack structure shown in FIG. 4B (the portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other (the organic flattening layer 2Pb is not present), and the portion where the first inorganic barrier layer 12 and the second inorganic barrier layer 16 are in direct contact with each other (the organic barrier layer 14 is not present)) is formed. Therefore, the situation may be suppressed or prevented where moisture in the air enters the inside of the active region R1 via the organic flattening layer 2Pb or the organic barrier layer 14. In addition, the provision of the inorganic protective layer 2Pa may decrease the tapering angle θ(12) of the first inorganic barrier layer 12. Therefore, even if the tapering angle θ(32) of the lead wire 32 is relatively large (e.g., 90 degrees), the tapering angle θ(12) of the first inorganic barrier layer 12 may be made smaller than 90 degrees. Namely, the tapering angle θ(32) of the lead wire 32 may be made 90 degrees or closer to 90 degrees. This provides an advantage that L/S of the lead wire 32 may be made smaller.

(59) In the case where the tapering angle θ of the side surface is in the range of 70 degrees or larger and smaller than 90 degrees, the organic barrier layer (solid portion) 14 may be formed along the side surface. Needless to say, the resin present locally, namely, along the inclining side surface, may be removed by ashing. However, the ashing is time-consuming. For example, the ashing needs to be performed for a long time even after the resin formed on the flat surface is removed. Or, there may be a problem that as a result of the organic barrier layer (solid portion) formed in the vicinity of the particle P being excessively ashed (removed), the effect of the formation of the organic barrier layer is not fully provided. In order to suppress or prevent this problem, the tapering angle θ(12) of the first inorganic barrier layer 12 is preferably smaller than 70 degrees, and more preferably smaller than 60 degrees.

(60) Now, with reference to FIG. 6 through FIGS. 8A-8C, a structure of the OLED display device 100C according to a comparative example will be described. FIG. 6 is a schematic plan view of the OLED display device 100C. FIG. 7A and FIG. 7B are each a schematic cross-sectional view of the OLED display device 100C. FIG. 7A is a cross-sectional view taken along line 7A-7A′ in FIG. 6, and FIG. 7B is a cross-sectional view taken along line 7B-7B′ in FIG. 6. FIG. 8A through FIG. 8C are each a schematic cross-sectional view of the OLED display device 100C. FIG. 8A is a cross-sectional view taken along line 8A-8A′ in FIG. 6. FIG. 8B is a cross-sectional view taken along line 8B-8B′ in FIG. 6. FIG. 8C is a cross-sectional view taken along line 8C-8C′ in FIG. 6.

(61) Unlike in the OLED display device 100A according to an embodiment, in the OLED display device 100C, the inorganic protective layer 2Pa is not included, and the organic flattening layer 2Pbc is extended to a region that is not covered with a TFE structure 10C. Components substantially the same as those of the OLED display device 100A bear the identical reference signs thereto, and descriptions thereof may be omitted.

(62) As is clear from, for example, FIG. 6, FIG. 7B and FIG. 8B, the organic flattening layer 2Pbc is partially exposed to the air (ambient atmosphere). In this case, the organic flattening layer 2Pbc absorbs moisture through the portion exposed to the air and acts as a route that guides water vapor in the air into the active region R1. By contrast, in the OLED display device 100A according to an embodiment, as shown in FIG. 3B and FIG. 4B, the organic flattening layer 2Pb is enclosed, together with the OLED layer 3, by the joint portion where the inorganic protective layer 2Pa and the first inorganic barrier layer 12 are in direct contact with each other. Therefore, the above-described problem of the OLED display device 100C according to a comparative example may be solved.

(63) Now, with reference to FIGS. 9A-9B and FIGS. 10A-10C, examples of TFT usable for the OLED display device 100A, and examples of lead wires and terminals formed by use of a gate metal layer and a source metal layer used to form the TFT, will be described. The structures of the TFT, the lead wires and the terminals described below may be used for the OLED display device 100A according to an embodiment described above.

(64) For a medium- or small-sized high-definition OLED display device, a low temperature polycrystalline silicon (hereinafter, referred to simply as “LIPS”) TFT or an oxide TFT (e.g., four-component-based (In—Ga—Zn—O-based) oxide TFT containing In (indium), Ga (gallium), Zn (zinc) and O (oxygen)) having a high mobility is preferably used. Structures of, and methods for producing, the LTPS-TFT and the In—Ga—Zn—O-based TFT are well known and will be described below merely briefly.

(65) FIG. 9A is a schematic cross-sectional view of an LTPS-TFT 2.sub.PT. The TFT 2.sub.PT may be included in the circuit 2 of the OLED display device 100A. The LTPS-TFT 2.sub.PT is a top gate-type TFT.

(66) The TFT 2.sub.PT is formed on a base coat 2.sub.Pp on the substrate (e.g., polyimide film) 1. Although not described above, it is preferred that a base coat formed of an inorganic insulating material is formed on the substrate 1.

(67) The TFT 2.sub.PT includes a polycrystalline silicon layer 2.sub.Pse formed on the base coat 2.sub.Pp, a gate insulating layer 2.sub.Pgi formed on the polycrystalline silicon layer 2.sub.Pse, a gate electrode 2.sub.Pg formed on the gate insulating layer 2.sub.Pgi, an interlayer insulating layer 2.sub.Pi formed on the gate electrode 2.sub.Pg, and a source electrode 2.sub.Pss and a drain electrode 2.sub.Psd formed on the interlayer insulating layer 2.sub.Pi. The source electrode 2.sub.Pss and the drain electrode 2.sub.Psd are respectively connected with a source region and a drain region of the polycrystalline silicon layer 2.sub.Pse in contact holes formed in the interlayer insulating layer 2.sub.Pi and the gate insulating layer 2.sub.Pgi.

(68) The gate electrode 2.sub.Pg is included in a gate metal layer including the gate bus lines, and the source electrode 2.sub.Pss and the drain electrode 2.sub.Psd are included in a source metal layer including the source bus lines. The gate metal layer and the source metal layer are used to form lead wires and terminals (described below with reference to FIGS. 10A-10C).

(69) The TFT 2.sub.PT is formed, for example, as follows.

(70) As the substrate 1, for example, a polyimide film having a thickness of 15 μm is prepared.

(71) The base coat 2.sub.Pp (SiO.sub.2 film: 250 nm/SiN.sub.x film: 50 nm/SiO.sub.2 film: 500 nm (top layer/middle layer/bottom layer)) and an a-Si film (40 nm) are formed by plasma CVD.

(72) The a-Si film is subjected to dehydrogenation (e.g., annealed at 450° C. for 180 minutes).

(73) The a-Si film is polycrystalline-siliconized by excimer laser annealing (ELA).

(74) The a-Si film is patterned by a photolithography step to form an active layer (semiconductor island).

(75) A gate insulating film (SiO.sub.2 film: 50 nm) is formed by plasma CVD.

(76) A channel region of the active layer is doped with (B.sup.+).

(77) The gate metal layer (Mo: 250 nm) is formed by sputtering and patterned by a photolithography step (including a dry etching step) (to form the gate electrode 2.sub.Pg, the gate bus lines, and the like).

(78) The source region and the drain region of the active layer are doped with (P.sup.+).

(79) Activation annealing (e.g., annealing at 450° C. for 45 minutes) is performed. As a result, the polycrystalline silicon layer 2.sub.Pse is formed.

(80) An interlayer insulating film (e.g., SiO.sub.2 film: 300 nm/SiN.sub.x film: 300 nm (top layer/bottom layer)) is formed by plasma CVD.

(81) The contact holes are formed in the gate insulating film and the interlayer insulating film by dry etching. As a result, the interlayer insulating layer 2.sub.Pi and the gate insulating layer 2.sub.Pgi are formed.

(82) The source metal layer (Ti film: 100 nm/Al film: 300 nm/Ti film: 30 nm) is formed by sputtering and patterned by a photolithography step (including a dry etching step) (to form the source electrode 2.sub.Pss, the drain electrode 2.sub.Psd, the source bus lines, and the like).

(83) After this, the inorganic protective layer 2Pa (see FIG. 2 and FIGS. 3A-3C) described above is formed by, for example, plasma CVD.

(84) FIG. 9B is a schematic cross-sectional view of an In—Ga—Zn—O-based TFT 2.sub.OT. The TFT 2.sub.OT may be included in the circuit 2 of the OLED display device 100A. The TFT 2.sub.OT is a bottom gate-type TFT.

(85) The TFT 2.sub.OT is formed on a base coat 2.sub.Op on the substrate 1 (e.g., polyimide film). The TFT 2.sub.OT includes a gate electrode 2.sub.Og formed on the base coat 2.sub.Op, a gate insulating layer 2.sub.Ogi formed on the gate electrode 2.sub.Og, an oxide semiconductor layer 2.sub.Ose formed on the gate insulating layer 2.sub.Ogi, and a source electrode 2.sub.Oss and a drain electrode 2.sub.Osd respectively formed on a source region and a drain region of the oxide semiconductor layer 2.sub.Ose. The source electrode 2.sub.Oss and the drain electrode 2.sub.Osd are covered with an interlayer insulating layer 2.sub.Oi.

(86) The gate electrode 2.sub.Og is included in a gate metal layer including the gate bus lines, and the source electrode 2.sub.Oss and the drain electrode 2.sub.Osd are included in a source metal layer including the source bus lines. The gate metal layer and the source metal layer are used to form lead wires and terminals, and thus the TFT 2.sub.OT may have a structure described below with reference to FIGS. 10A-10C.

(87) The TFT 2.sub.OT is formed, for example, as follows.

(88) As the substrate 1, for example, a polyimide film having a thickness of 15 μm is prepared.

(89) The base coat 2.sub.Op (SiO.sub.2 film: 250 nm/SiN.sub.x film: 50 nm/SiO.sub.2 film: 500 nm (top layer/middle layer/bottom layer)) is formed by plasma CVD.

(90) The gate metal layer (Cu film: 300 nm/Ti film: 30 nm (top layer/bottom layer)) is formed by sputtering and patterned by a photolithography step (including a dry etching step) (to form the gate electrode 2.sub.Og, the gate bus lines, and the like).

(91) A gate insulating film (SiO.sub.2 film: 30 nm/SiN.sub.x film: 350 nm (top layer/bottom layer)) is formed by plasma CVD.

(92) An oxide semiconductor film (In—Ga—Z—O-based semiconductor film: 100 nm) is formed by sputtering and patterned by a photolithography step (including a wet etching step) to form an active layer (semiconductor island).

(93) The source metal layer (Ti film: 100 nm/Al film: 300 nm/Ti film: 30 nm (top layer/middle layer/bottom layer)) is formed by sputtering and patterned by a photolithography step (including a dry etching step) (to form the source electrode 2.sub.Oss, the drain electrode 2.sub.Osd, the source bus lines, and the like).

(94) Activation annealing (e.g., annealing at 300° C. for 120 minutes) is performed. As a result, the oxide semiconductor layer 2.sub.Ose is formed.

(95) Then, the interlayer insulating layer 2.sub.Oi (e.g., SiN.sub.x film: 300 nm/SiO.sub.2 film: 300 nm (top layer/bottom layer)) is formed by plasma CVD as a protective film. The interlayer insulating layer 2.sub.Oi may also act as the inorganic protective layer 2Pa (see FIG. 2 and FIGS. 3A-3C) described above. Needless to say, the inorganic protective layer 2Pa may further be formed on the interlayer insulating layer 2.sub.Oi.

(96) Now, with reference to FIG. 10A through FIG. 10C, a structure of another OLED display device according to an embodiment will be described. The circuit (backplane) 2 of this OLED display device includes the TFT 2.sub.PT shown in FIG. 9A or the TFT 2.sub.OT shown in FIG. 9B. The gate metal layer and the source metal layer used to form the TFT 2.sub.PT or the TFT 2.sub.OT are used to form a lead wire 32A and a terminal 34A. FIG. 10A through FIG. 10C respectively correspond to FIG. 4B through FIG. 4D. Components corresponding to those in FIG. 4B through FIG. 4D will be represented by the identical reference signs thereto provided with letter “A” at the end. A base coat 2p in FIG. 10 corresponds to the base coat 2.sub.Pp in FIG. 9A and the base coat 2.sub.Op in FIG. 9B. A gate insulating layer 2gi in FIG. 10 corresponds to the gate insulating layer 2.sub.Pgi in FIG. 9A and the gate insulating layer 2.sub.Ogi in FIG. 9B. An interlayer insulating layer 2i in FIG. 10 corresponds to the interlayer insulating layer 2.sub.Pi in FIG. 9A and the interlayer insulating layer 2.sub.Oi in FIG. 9B.

(97) As shown in FIG. 10A through FIG. 10C, a gate metal layer 2g and a source metal layer 2s are formed on the base coat 2p, which is formed on the substrate 1. Although not shown in FIGS. 3A-3C or FIGS. 4A-4D, it is preferred that the base coat 2p formed of an inorganic insulating material is formed on the substrate 1.

(98) As shown in FIG. 10A through FIG. 10C, the lead wire 32A and the terminal 34A are each formed as a stack body of the gate metal layer 2g and the source metal layer 2s. A portion of the lead wire 32A and a portion of the terminal 34A that are formed of the gate metal layer 2g have, for example, the same cross-sectional shape as that of the gate bus lines. A portion of the lead wire 32A and a portion of the terminal 34A that are formed of the source metal layer 2s have, for example, the same cross-sectional shape as that of the source bus lines. In the case of, for example, a 5.7-type display device of 500 ppi, the portion formed of the gate metal layer 2g has a line width of, for example, 10 μm, and a distance between two adjacent such lines is 16 μm (L/S=10/16). The portion formed of the source metal layer 2s has a line width of, for example, 16 μm, and a distance between two adjacent such lines is 10 μm (L/S=16/10). These portions each have a tapering angle θ smaller than 90 degrees, preferably smaller than 70 degrees, and more preferably 60 degrees or smaller. The tapering angle of portions formed below the organic flattening layer 2Pb may be 90 degrees or larger.

(99) Now, with reference to FIGS. 11A-11B through FIGS. 14A-14C, still another embodiment of the present invention will be described. According to the embodiment described below, an organic EL device capable of improving the light emitting efficiency and a method for producing the same are provided. An OLED display device described in the embodiment described below as an example has the structure of the OLED display device in any of the above-described embodiments and has an improved mass-productivity and an improved moisture-resistance reliability. In addition to the effects provided in the above-described embodiments, the OLED display device in the embodiment described below is capable of improving the light emitting efficiency.

(100) The OLED display device according to the embodiment described below includes a substrate; a driving circuit layer including a plurality of TFTs formed on the substrate, a plurality of gate bus lines and a plurality of source bus lines each connected with either one of the plurality of TFTs, a plurality of terminals, and a plurality of lead wires each connecting either one of the plurality of terminals and either one of the plurality of gate bus lines or either one of the plurality of source bus lines to each other; an interlayer insulating layer formed on the driving circuit layer; an organic EL element layer formed on the interlayer insulating layer and including a plurality of organic EL elements each connected with either one of the plurality of TFTs; and a thin film encapsulation structure formed so as to cover the organic EL element layer. The interlayer insulating layer includes a contact hole. In the contact hole, a contact portion connecting the driving circuit layer and the organic EL element layer to each other is formed. A surface of the interlayer insulating layer and a surface of the contact portion are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less.

(101) Namely, the arithmetic average roughness Ra of the surface on which an OLED layer is formed is 50 nm or less. Therefore, the light emitting efficiency is improved. In addition, the arithmetic average roughness Ra of the surface of the contact portion is also 50 nm or less. Therefore, even if the contact portion is located in a pixel, the light emitting efficiency is not decreased. For this reason, it is not necessary to avoid the contact portion as a region where the pixel is to be located. This may raise the degree of freedom of design and may also increase the area size ratio of the pixel.

(102) A conductive contact film that forms the contact portion, namely, a contact film that fills the contact hole in the interlayer insulating layer, is formed of a material that is, for example, different from the material of the lower electrode. The contact film is, for example, a stack film of a titanium film and a copper film. The titanium film is formed by, for example, sputtering, whereas the copper film is formed by plating on the titanium film. The copper film may be formed by, for example, electroplating that uses the titanium film as a power supply layer.

(103) A surface of the contact film and the surface of the interlayer insulating layer are subjected to chemical mechanical polishing, so that surfaces having an arithmetic average roughness Ra of 50 nm or less may be provided.

(104) For example, the interlayer insulating layer is formed on the driving circuit layer, and includes a first inorganic protective layer exposing at least the plurality of terminals and an organic flattening layer formed on the first inorganic protective layer. The organic flattening layer has a surface having an arithmetic average roughness Ra of 50 nm or less (see FIGS. 11A-11B).

(105) Alternatively, the interlayer insulating layer is formed on the driving circuit layer, and includes the first inorganic protective layer exposing at least the plurality of terminals, the organic flattening layer formed on the first inorganic protective layer, and a second inorganic protective layer formed on the organic flattening layer. The second inorganic protective layer has a surface having an arithmetic average roughness Ra of 50 nm or less (see FIGS. 13A-13B).

(106) With reference to FIGS. 11A-11B through FIGS. 14A-14C, a structure of, and a method for producing, another OLED display device according to another embodiment of the present invention will be described. An OLED display device 100D shown in FIGS. 11A-11B and an OLED display device 100E shown in FIGS. 13A-13B each include an LTPS-TFT 2.sub.PT shown in FIG. 9A. Needless to say, the In—Ga—Zn—O-based TFT 2.sub.OT shown in FIG. 9B or any other known TFT may be used instead of the LTPS-TFT 2.sub.PT. FIG. 11A and FIG. 13A also show a common wire 2.sub.Pc and a contact portion 2.sub.Pcv to be electrically connected with an upper electrode (common electrode) 46 of the OLED.

(107) First, FIGS. 11A-11B and FIGS. 12A-12C will be referred to. FIG. 11A and FIG. 11B are each a schematic cross-sectional view of the OLED display device 100D. FIG. 12A through FIG. 12C are schematic cross-sectional views showing a method for producing the OLED display device 100D.

(108) The OLED display device 100D shown in FIG. 11A includes the driving circuit layer 2 formed on the substrate 1 and including the plurality of TFTs and the like, the interlayer insulating layer formed on the driving circuit layer 2, an organic EL element layer 3 formed on the interlayer insulating layer, and a thin film encapsulation structure 10D formed so as to cover the organic EL element layer 3. In this example, the interlayer insulating layer includes the inorganic protective layer 2Pa and the organic flattening layer 2Pb formed on the inorganic protective layer 2Pa. The interlayer insulating layer, namely, the inorganic protective layer 2Pa and the organic flattening layer 2Pb, includes contact holes CH1 and CH2. In the contact holes CH1 and CH2, contact portions C1 and C2 connecting the driving circuit layer 2 and the organic EL element layer 3 to each other are formed. A surface 2Pb_Sb of the organic flattening layer 2Pb and a surface C_Sb of the contact portions C1 and C2 are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less.

(109) The OLED layer 3 is formed on the organic flattening layer 2Pb. The lower electrode and the organic layer (also referred to as an “organic EL layer”; includes at least an organic light emitting layer) of the OLED 3 are required to have a high flatness. If the flatness is low, for example, the OLED 3 has a low light emitting efficiency. The organic flattening layer 2Pb is formed of a liquid-state organic resin material (may contain a solvent) applied to the surface of the element substrate (the element substrate in the middle of production is also referred to as an “element substrate” for the sake of simplicity), and therefore, may absorb recesses and protrusions (steps) of an underlying layer for the organic flattening layer 2Pb to form a flat surface. However, the surface of the organic resin film formed of the liquid-state resin material has an arithmetic average roughness Ra (may be represented as “waviness”) of greater than 100 nm and about 300 nm or less (see FIG. 12A). If the OLED 3 is formed on the organic flattening layer 2Pb having such a surface roughness, the light emitting efficiency may not be sufficiently improved. There is a problem that, for example, even if a micro-cavity structure is adopted, the effect thereof may not be sufficiently expressed.

(110) In addition, in the case where the lower electrode and the organic layer are formed on the contact hole CH1 in the organic flattening layer 2Pb, the lower electrode and the organic layer located just above the contact hole CH1 may have a recessed portion. Provision of the contact hole CH1 outer to the pixel Pix may avoid this problem, but decreases the area size ratio of the pixel.

(111) Under such circumstances, in the OLED display device 100D, the surface 2Pb_Sb of the organic flattening layer 2Pb and the surface C_Sb of the contact portions C1 and C2 are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less.

(112) Now, FIG. 12A through FIG. 12C will be referred to.

(113) FIG. 12A schematically shows a state immediately after the inorganic protective film 2Pa, which is to be the inorganic protective layer 2Pa, is formed on the driving circuit layer 2 and then the organic flattening film 2Pb, which is to be the organic flattening layer 2Pb, is formed. The inorganic protective film 2Pa has a thickness of, for example, 100 nm or greater and 1000 nm or less. The organic flattening film 2Pb has a thickness of, for example, 1000 nm or greater and 5000 nm or less. The inorganic protective film 2Pa is selectively formed in a desired region by use of a metal mask. The organic flattening film 2Pb is selectively formed in a desired region of the element substrate 20 by application of a material thereof, or is once formed on the entire surface of the layer below and then an unnecessary portion is removed. The inorganic protective film 2Pa does not include an opening such as the contact hole CH1, CH2 or the like unlike the inorganic protective layer 2Pa, but is represented by the identical reference sign thereto for the sake of simplicity. Similarly, the organic flattening film 2Pb does not include an opening such as the contact hole CH1, CH2 or the like unlike the organic flattening layer 2Pb, but is represented by the identical reference sign thereto for the sake of simplicity.

(114) A surface 2Pb_Sa of the organic flattening film 2Pb has an arithmetic average roughness Ra of greater than 100 nm and about 300 nm or less, immediately after being formed. As shown in FIG. 12B, the inorganic protective film 2Pa and the organic flattening film 2Pb are patterned to form the contact holes CH1 and CH2. The patterning may be performed by, for example, dry etching by use of mixed gas of O.sub.2 and CF.sub.4. As shown in FIG. 11B, there is a portion where only the inorganic protective layer 2Pa is left in order to form a portion where the inorganic protective layer 2Pa and the first inorganic barrier layer (not shown) included in the TFE structure 10D are in direct contact with each other. Such a structure may be formed by use of, for example, a gray-scale mask.

(115) In a state where a conductive contact film C is formed on the patterned organic flattening film 2Pb, a surface C_Sa of the contact film C has a surface roughness that reflects the surface roughness of the surface 2Pb_Sa of the organic flattening film 2Pb. The contact film C includes, for example, a titanium (Ti) film Ca and a copper (Cu) film Cb formed on the titanium film Ca. The titanium film Ca is formed by, for example, sputtering, whereas the copper film Cb is formed by, for example, plating. From the point of view of mass-productivity, it is preferred to form the copper film Cb by electroplating that uses the titanium film Ca as a power supply layer. The titanium film Ca has a thickness of, for example, 5 nm or greater and 150 nm or less, and preferably, 10 nm or greater and 100 nm or less. The copper (Cu) film Cb has a thickness of, for example, 1000 nm or greater and 3000 nm or less, and preferably, 1500 nm or greater and 2500 nm or less.

(116) Next, as shown in FIG. 12C, the surface 2Pb_Sa of the organic flattening film 2Pb and the surface C_Sa of the contact film C are subjected to chemical mechanical polishing, so that the organic flattening layer 2Pb and the contact portions C1 and C2 all having a smooth surface are provided. The contact portions C1 and C2 respectively include C11 and C21 formed of the titanium film Ca and also include C12 and C22 formed of the copper film Cb. The surface 2Pb_Sb of the organic flattening layer 2Pb and the surface C_Sb of the contact film C are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less.

(117) Referring to FIG. 12B, the surface 2Pb_Sa of the organic flattening film 2Pb and the surface C_Sa of the contact film C (both having Ra>50 nm) are subjected to CMP, so that the surface 2Pb_Sb and the surface C_Sb each having an arithmetic average roughness Ra of Ra 50 nm may be provided. It is preferred that the arithmetic average roughness Ra of each of the surface 2Pb_Sb and the surface C_Sb of the contact film C is 30 nm or less. A smaller arithmetic average roughness Ra is more preferred, and there is no limitation on the lowest value thereof. The arithmetic average roughness Ra may be 10 nm or greater, or 20 nm or greater, in consideration of the relationship between the cost or time required for the CMP and the effect thereof.

(118) Specifically, the CMP may be performed by use of a slurry containing an oxidant such as an organic acid such as hydrogen peroxide, a citric acid or the like or an amino acid such as glycine or the like and also containing a fumed silica-based or colloidal silica-based polishing agent. Use of such an acidic chemical solution does not corrode the polyimide substrate. Alternatively, a slurry containing alumina (Al.sub.2O.sub.3) powder may be used. A preferred load of a polishing pad is 50 g/cm.sup.2 or greater and 150 g/cm.sup.2 or less. A preferred rotation rate is 20 rpm or greater and 40 rpm or less. Polishing requires about 30 seconds to about 90 seconds.

(119) In an OLED display device according to an embodiment of the present invention, the level of smoothing required to suppress the decrease in the light emitting efficiency is lower by one digit (the value of the arithmetic average roughness Ra is about ten times larger) than the level of smoothing required for a photographic process for a VLSI. Therefore, any of a wide range of known polishing agents generally usable for CMP is usable.

(120) The surface roughness may be measured by use of, for example, a confocal laser scanning microscope or an atomic force microscope (AFM). It is preferred that the range of measurement encompasses the center of the pixel and the vicinity thereof, and the reference length is appropriately set in accordance with the surface roughness.

(121) In this specification, in order to distinguish flattening by the organic flattening layer 2Pb and flattening by the CMP from each other, the flattening by the CMP may be referred to as “smoothing”.

(122) The arithmetic average roughness Ra of the surface on which the OLED layer 3 is formed is 50 nm or less. Therefore, the light emitting efficiency is improved. In addition, the arithmetic average roughness Ra of the surface C_Sb of the contact portions C1 and C2 is also 50 nm or less. Therefore, even if the contact portion C1 is located in a pixel, the light emitting efficiency is not decreased. For this reason, it is not necessary to avoid the contact portion C1 as a region where the pixel Pix is to be located. This may raise the degree of freedom of design and may also increase the area size ratio of the pixel Pix.

(123) FIGS. 11A-11B will be referred to again.

(124) In a next step, a lower electrode 42 and an upper electrode contact portion 43 are formed on the surface 2Pb_Sb of the organic flattening layer 2Pb and the surface C_Sb of the contact film C. The lower electrode 42 is electrically connected with the drain electrode 2.sub.Psd via the contact portion C1. The lower electrode 42 includes, for example, a silver (Ag) layer and an ITO layer formed on the silver (Ag) layer. Ag, which easily forms an alloy with Cu (main element of the contact portion C1) and may make the contact resistance almost zero, is preferred. In a conventional structure with no contact portion C1, the metal material used to form the drain electrode 2.sub.Psd and the ITO layer are in contact with each other in the contact hole CH1. Adoption of the structure in this embodiment also provides an effect of decreasing the contact resistance. The silver layer has a thickness of, for example, 50 nm or greater and 150 nm or less. The ITO layer has a thickness of, for example, 5 nm or greater and 15 nm or less.

(125) Next, a bank layer 48 defining each of the plurality of pixels Pix is formed. The bank layer 48 includes an opening corresponding to each of the pixels Pix. A side surface of the opening includes an inclining surface that includes a forward tapering side surface portion. The inclining surface of the bank layer 48 encloses the corresponding pixel. The bank layer 48 is formed of, for example, a photosensitive resin (e.g., polyimide or acrylic resin). The bank layer 48 has a thickness of, for example, 1 μm or greater and 2 μm or less. The inclining surface of the bank layer 48 is inclined at an inclination angle of 60 degrees or smaller. If the inclination angle θb of the inclining surface of the bank layer 48 is larger than 60 degrees, a defect may be caused in layers located on the bank layer 48.

(126) As described above, it is preferred to perform baking in order to remove moisture contained in the bank layer 48 and moisture contained in the organic flattening layer 2Pb. The baking temperature is preferably, for example, 100° C. or higher (e.g., for 1 hour or longer), and more preferably 250° C. or higher (e.g., for 15 minutes or longer). The atmosphere may have an atmospheric pressure. Baking in a low pressure atmosphere may shorten the baking time. It is preferred that the bank layer 48 and the organic flattening layer 2Pb are formed of a resin material having a high thermal resistance, for example, polyimide, in order to prevent deterioration by heat in the baking step.

(127) After this, it may occur that the production of the element substrate is suspended and the element substrate is stored or transported. In such a case, a positive photoresist film may be formed to cover the surface of the element substrate including the layers up to the bank layer 48 as described above. After the storage or the transportation, the photoresist film is removed immediately before the organic layer 44 is formed, so that a clean surface may be provided. Immediately before the organic layer 44 is formed, baking is performed to remove the moisture contained in the organic flattening layer 2Pb and the bank layer 48.

(128) Next, the organic layer 44 is formed on the lower electrode 42. The organic layer 44 is formed by, for example, vapor deposition. The upper electrode 46 is formed on the organic layer 44. The upper electrode 46 is in contact with the upper electrode contact portion 43, and is electrically connected with the common wire 2.sub.Pc via the contact portion 2.sub.Pcv.

(129) The lower electrode 42 and the upper electrode 46 respectively act as, for example, an anode and a cathode. The upper electrode 46 is a common electrode formed for the entirety of the pixels in the active region. The lower electrode (pixel electrode) 42 is formed for each of the pixels. In the structure in which the bank layer 48 is present between the lower electrode 42 and the organic layer 44, no holes are implanted from the lower electrode 42 into the organic layer 44. Therefore, the region where the bank layer 48 is present does not act as a pixel Pix. For this reason, the bank layer 48 defines an outer perimeter of each of the pixels Pix. The bank layer 48 may be referred to as a “PDL (Pixel Defining Layer)”.

(130) After the OLED 3 is formed as described above, the TFE structure 10D is formed. The TFE structure 10D has substantially the same structure as that of the TFE structure 10A described above. Namely, the TFE structure 10D includes the first inorganic barrier layer (e.g., SiN.sub.x layer) 12, the organic barrier layer 14 and the second inorganic barrier layer (e.g., SiN.sub.x layer) 16, provided in this order with the first inorganic barrier layer 12 being closest to the OLED 3. As shown in FIG. 11B, the first inorganic barrier layer 12 is in contact with a top surface and an inclining side surface of the organic flattening layer 2Pb and a top surface of the inorganic protective layer 2Pa. Namely, the OLED display device 100D has substantially the same structure as that of the OLED display device 100A shown in FIG. 3B at an end thereof, and thus has a superb moisture-resistance reliability.

(131) Now, with reference to FIGS. 13A-13B and FIGS. 14A-14C, the OLED display device 100E and a method for producing the same according to still another embodiment of the present invention will be described. FIG. 13A and FIG. 13B are each a schematic cross-sectional view of the OLED display device 100E. FIG. 14A through FIG. 14C are schematic cross-sectional views showing a method for producing the OLED display device 100E.

(132) Unlike in the OLED display device 100D, in the OLED display device 100E, the interlayer insulating layer formed between the driving circuit layer 2 and the OLED layer 3 includes the second inorganic protective layer 2Pa2 formed on the organic flattening layer 2Pb. The first inorganic protective layer 2Pa1 included in the OLED display device 100E is the same as the inorganic protective layer 2Pa included in the OLED display device 100D. In FIGS. 13A-13B and FIGS. 14A-14C, components same as those of the OLED display device 100D bear the identical reference signs thereto, and descriptions thereof may be omitted.

(133) As shown in FIG. 13A, in the OLED display device 100E, the surface 2Pb_Sb of the organic flattening layer 2Pb has a large surface roughness (Ra>50 nm). The second inorganic protective layer 2Pa2 has a smoothed surface 2Pa2_Sb. The surface 2Pa2_Sb of the second inorganic protective layer 2Pa2 and the surface C_Sb of the contact portions C1 and C2 are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less. Therefore, the OLED display device 100E improves the light emitting efficiency thereof, like the OLED display device 100D. In addition, the degree of freedom of design may be improved, and the area size ratio of the pixel may be increased.

(134) As shown in FIG. 13B, the first inorganic barrier layer 12 is in contact with a top surface and an inclining side surface of the second inorganic protective layer 2Pa2, the inclining side surface of the organic flattening layer 2Pb and the top surface of the first inorganic protective layer 2Pa1. Namely, the OLED display device 100E has substantially the same structure as that of the OLED display device 100A shown in FIG. 3B at an end thereof, and thus has a superb moisture-resistance reliability.

(135) With reference to FIG. 14A through FIG. 14C, a method for producing the OLED display device 100E will be described. In this example, the differences of the method for producing the OLED display device 100E from the method for producing the OLED display device 100D will be mainly described.

(136) As shown in FIG. 14A, the second inorganic protective film 2Pa2 is formed on the organic flattening film 2Pb. Like the first inorganic protective film 2Pa1, the second inorganic protective film 2Pa2 is selectively formed in a desired region by use of a mask. The second inorganic protective film 2Pa2 is formed on the surface 2Pb_Sa of the organic flattening film 2Pb, and therefore, has a surface roughness generally equal to that of the surface 2Pb_Sa of the organic flattening film 2Pb (Ra>50 nm). In the case where, for example, the second inorganic protective film 2Pa2 is formed of a single layer of SiN.sub.x by plasma CVD, an SiN.sub.x film having a thickness of 150 nm or greater is formed at a film formation rate that does not exceed 10 nm/s, for example. In this manner, the resultant second inorganic protective film 2Pa2 reflects the surface roughness of the underlying layer.

(137) Next, as shown in FIG. 14B, the first inorganic protective film 2Pa1, the organic flattening film 2Pb and the second inorganic protective film 2Pa2 formed in the desired regions of the element substrate 20 are patterned in one step to form openings such as the contact holes CH1 and CH2 and the like. The patterning may be performed by, for example, dry etching by use of mixed gas of O.sub.2 and CF.sub.4. As shown in FIG. 13B, there is a portion where only the first inorganic protective layer 2Pa1 is left in order to form a portion where the first inorganic protective layer 2Pa1 and the first inorganic barrier layer (not shown) included in the TFE structure 10E are in direct contact with each other. Such a structure may be formed by use of, for example, a gray-scale mask.

(138) Next, as shown in FIG. 14C, the surface 2Pa2 Sa of the second inorganic protective film 2Pa2 and the surface C_Sa of the contact film C are subjected to chemical mechanical polishing, so that the second inorganic protective layer 2Pa2 and the contact portions C1 and C2 with smooth surfaces are provided. The surface 2Pa2_Sb of the second inorganic protective layer 2Pa2 and the surface C_Sb of the contact film C are flush with each other, and each have an arithmetic average roughness Ra of 50 nm or less. The chemical mechanical polishing may be performed as described above.

(139) Now, with reference to FIG. 15A and FIG. 15B, the film formation device 200 usable to form an organic barrier layer, and a film formation method using the same, will be described. FIG. 15A and FIG. 15B schematically show a structure of the film formation device 200. FIG. 15A shows a state of the film formation device 200 in a step of, in a chamber having vapor of a photocurable resin or a mist-like photocurable resin located therein, condensing the photocurable resin on the first inorganic barrier layer. FIG. 15B shows a state of the film formation device 200 in a step of irradiating the photocurable resin with light to which the photocurable resin is sensitive and thus curing the photocurable resin.

(140) The film formation device 200 includes a chamber 210 and a partition wall 234 dividing an inner space of the chamber 210 into two spaces. In one of the spaces, in the chamber 210, demarcated by the partition wall 234, a stage 212 and a shower plate 220 are located. In the other space demarcated by the partition wall 234, an ultraviolet irradiation device 230 is located. The inner space of the chamber 210 is controlled to have a predetermined pressure (vacuum degree) and a predetermined temperature. The stage 212 has a top surface that receives the element substrate 20 including the plurality of OLEDs 3, on which the first inorganic barrier layer is formed. The top surface may be cooled down to, for example, −20° C.

(141) The shower plate 220 is located to have a gap 224 between the shower plate 220 and the partition wall 234. The shower plate 220 includes a plurality of through-holes 222. The gap 224 may have a size of, for example, 100 mm or longer and 1000 mm or shorter in a vertical direction. An acrylic monomer (vapor or mist-like) supplied to the gap 224 is supplied, via the plurality of through-holes 222 of the shower plate 220, to one of the spaces of the chamber 210 in which the stage 212 is located. When necessary, the acrylic monomer is heated. Vapor of an acrylic monomer or a mist-like acrylic monomer 26p is attached to, or contacts, the first inorganic barrier layer on the element substrate 20. An acrylic monomer 26 is supplied from a container 202 into the chamber 210 at a predetermined flow rate. The container 202 is supplied with the acrylic monomer 26 via a pipe 206 and is also supplied with nitrogen gas from a pipe 204. The flow rate of the acrylic monomer supplied to the container 202 is controlled by a mass flow controller 208. A material supply device includes the shower plate 220, the container 202, the pipes 204 and 206, the mass flow controller 208 and the like.

(142) The ultraviolet irradiation device 230 includes an ultraviolet light source and optional optical elements. The ultraviolet light source may be, for example, an ultraviolet lamp (e.g., mercury lamp (encompassing a high-pressure lamp and a super-high pressure lamp), a mercury-xenon lamp or a metal halide lamp). The optical elements are, for example, a reflective mirror, a prism, a lens, and a diffraction element.

(143) The ultraviolet irradiation device 230 emits light having a predetermined wavelength and a predetermined intensity toward the top surface of the stage 212 when being located at a predetermined position. It is preferred that the partition wall 234 and the shower plate 220 are formed of a material having a high transmittance to ultraviolet rays, for example, quartz.

(144) The organic barrier layer 14 may be formed, for example, as follows by use of the film formation device 200. In this example, an acrylic monomer is used as the photocurable resin.

(145) The acrylic monomer 26p is supplied into the chamber 210. The element substrate 20 has been cooled to, for example, −15° C. on the stage 212. The acrylic monomer 26p is condensed on the first inorganic barrier layer 12 on the element substrate 20. The conditions in this step may be controlled such that the liquid-state acrylic monomer is present locally, more specifically, only in the vicinity of the protruding portion of the first inorganic barrier layer 12. Alternatively, the conditions may be controlled such that the acrylic monomer condensed on the first inorganic barrier layer 12 forms a liquid film.

(146) The viscosity and/or the surface tension of the photocurable resin in the liquid state may be adjusted to control the thickness of the liquid film or the shape of the portion of the liquid film that is to be in contact with the protruding portion of the first inorganic barrier layer 12 (namely, the shape of the recessed portion). For example, the viscosity and the surface tension depend on the temperature, and therefore, the temperature of the element substrate may be adjusted to control the viscosity and the surface tension. For example, the size of the solid portion that is present on the flat portion may be controlled by the shape of a portion, of the liquid film, that is to be in contact with the protruding portion of the first inorganic barrier layer 12 (namely, the shape of the recessed portion) and by the conditions of ashing to be performed in a later step.

(147) Next, the ultraviolet irradiation device 230 is used to, typically, irradiate the entirety of a top surface of the element substrate 20 with ultraviolet rays 232 and thus to cure the acrylic monomer on the first inorganic barrier layer 12. As the ultraviolet light source, for example, a high-pressure mercury lamp that provides light having a main peak wavelength of 365 nm is used. The ultraviolet rays are directed at an intensity of, for example, 12 mW/cm.sup.2 for about 10 seconds.

(148) The organic barrier layer 14 formed of an acrylic resin is formed in this manner. The tact time of the step of forming the organic barrier layer 14 is, for example, shorter than about 30 seconds. Thus, the mass-productivity is very high.

(149) Alternatively, after the photocurable resin in a liquid film state is cured, ashing may be performed to form the organic barrier layer 14 only in the vicinity of the protruding portion. Also in the case where the organic barrier layer 14 is formed by curing the photocurable resin present locally, the ashing may be performed. The ashing may improve the adhesiveness between the organic barrier layer 14 and the second inorganic barrier layer 16. Namely, the ashing may be used to modify (make hydrophilic) the surface of the organic barrier layer 14, as well as to remove an extra portion of the organic barrier layer once formed.

(150) The ashing may be performed by use of a known plasma ashing device, a known photoexcitation ashing device, or a known UV ozone ashing device. For example, plasma ashing using at least one type of gas among N.sub.2O, O.sub.2 and O.sub.3, or a combination of such plasma ashing and ultraviolet irradiation, may be performed. In the case where an SiN.sub.x film is formed by CVD as each of the first inorganic barrier layer 12 and the second inorganic barrier layer 16, N.sub.2O is used as a material gas. Therefore, use of N.sub.2O for the ashing provides an advantage that the device is simplified.

(151) In the case where the ashing is performed, the surface of the organic barrier layer 14 is oxidized and thus is modified to be hydrophilic. In addition, the surface of the organic barrier layer 14 is shaved almost uniformly, and extremely minute convexed and concaved portions are formed, which increases the surface area size. The effect of increasing the surface area size provided by the ashing is greater for the surface of the organic barrier layer 14 than for the first inorganic barrier layer 12 formed of an inorganic material. Since the surface of the organic barrier layer 14 is modified to be hydrophilic and the surface area size of the surface is increased, the adhesiveness of the organic barrier layer 14 with the second inorganic barrier layer 16 is improved.

(152) After the above, the resultant body is transported to a CVD chamber in order to form the second inorganic barrier layer 16. The second inorganic barrier layer 16 is formed under, for example, the same conditions as those for the first inorganic barrier layer 12. The second inorganic barrier layer 16 is formed in the region where the first inorganic barrier layer 12 is formed. Therefore, the inorganic barrier layer joint portion, where the first inorganic barrier layer 12 and the second inorganic barrier layer 16 are in direct contact with each other, is formed in the non-solid portion of the organic barrier layer 14. For this reason, as described above, water vapor in the air is suppressed or prevented from reaching the inside of the active region via the organic barrier layer.

(153) The first inorganic barrier layer 12 and the second inorganic barrier layer 16 are formed, for example, as follows. An inorganic barrier layer having a thickness of 400 nm may be formed by plasma CVD using SiH.sub.4 gas and N.sub.2O gas, at a film formation rate of 400 nm/min, in a state where, for example, the temperature of the substrate on which the inorganic barrier layer is to be formed (the temperature of the OLED 3) is controlled to be 80° C. or lower. The inorganic barrier layer thus formed has a refractive index of 1.84 and a transmittance of 90% to visible light having a wavelength of 400 nm (thickness: 400 nm). The inorganic barrier layer has a film stress having an absolute value of 50 MPa.

(154) The inorganic barrier layer may be an SiO.sub.2 layer, an SiO.sub.xN.sub.y (x>y) layer, an SiN.sub.xO.sub.y (x>y) layer, an Al.sub.2O.sub.3 layer or the like as well as an SiN.sub.x layer. Examples of the photocurable resin include vinyl group-containing monomers. Among the vinyl group-containing monomers, an acrylic monomer is preferably used. A photoinitiator may be incorporated into the acrylic monomer when necessary. As the acrylic monomer, any of various known acrylic monomers is usable. A plurality of acrylic monomers may be mixed together. For example, a two-functional monomer and a monomer including three or more functional groups may be mixed together. An oligomer may be mixed. The photocurable resin, before being cured, has a viscosity at room temperature (e.g., 25° C.) that is preferably lower than, or equal to, 10 Pa.Math.s, and is especially preferably 1 to 100 mPa.Math.s. If the viscosity is too high, it may be difficult to form a thin film having a thickness of 500 nm or less.

(155) In the above, embodiments of an OLED display device including a flexible substrate and a method for producing the same are described. Embodiments of the present invention are not limited to those described above. Embodiments of the present invention are widely applicable to an organic EL device (e.g., organic EL illumination device) including an organic EL element formed on a substrate that is not flexible (e.g., glass substrate) and a thin film encapsulation structure formed on the organic EL element.

INDUSTRIAL APPLICABILITY

(156) An embodiment of the present invention is applicable to an organic EL device and a method for producing the same. An embodiment of the present invention is especially preferably applicable to a flexible organic EL display device and a method for producing the same.

REFERENCE SIGNS LIST

(157) 1 flexible substrate 2 backplane (circuit) 2Pa inorganic protective layer (first inorganic protective layer), inorganic protective film (first inorganic protective film) 2Pa1 first inorganic protective layer, first inorganic protective film 2Pa2 second inorganic protective layer, second inorganic protective film 2Pb organic flattening layer, organic flattening film 3 organic EL element 4 polarizing plate 10 thin film encapsulation structure (TFE structure) 12 first inorganic barrier layer (SiN.sub.x layer) 14 organic barrier layer (acrylic resin layer) 16 second inorganic barrier layer (SiN.sub.x layer) 20 element substrate 100, 100A, 100D, 100E organic EL display device 200 film formation device