Method for adhering a first structure and a second structure

Abstract

A method includes steps a) providing the first structure successively including a first substrate, a first layer made from a metal base and a first metal-based metal oxide, b) providing the second structure successively including a second substrate, a second layer made from a second material and a second metal-based metal oxide, the first and second metal oxides presenting a standard free enthalpy of formation G, the second material being chosen so that it has an oxide presenting a standard free enthalpy of formation strictly less than G, c) bonding the first structure and second structure by direct adhesion, d) activating diffusion of the oxygen atoms of the first and second metal oxides to the second layer so as to form the oxide of the second material.

Claims

1. A method of bonding a first structure with a second structure, the method comprising: a) providing the first structure successively comprising: a first substrate, a first layer made from a first material based on tungsten, and a first oxide based on tungsten with 1-4 oxygen atoms, b) providing the second structure successively comprising: a second substrate, a second layer made from a second material based on silicon, and a second oxide based on tungsten with 1-4 oxygen atoms, the second oxide being in direct contact with the second layer, wherein step b) comprises directly depositing the second oxide on the second layer, c) bonding the first structure with the second structure by direct adhesion between the first oxide and the second oxide, and d) activating diffusion of the oxygen atoms of the first and second oxides to the second layer so as to form the oxide of the second material in all or part of the thickness of the second layer.

2. The method according to claim 1, wherein step b) comprises a step b1) consisting of forming metallic bumps in the whole thickness of the second layer.

3. The method according to claim 1, wherein the first structure and the second structure bonded in step c) form an assembly, and wherein step d) is executed by applying a thermal anneal to the assembly.

4. The method according to claim 1, wherein step d) is executed by applying a potential difference between the first and second substrates.

5. The method according to claim 1, wherein step a) comprises directly depositing the first oxide on the first layer.

6. The method according to claim 1, wherein the second oxide is directly deposited on the second layer by a technique selected from the group consisting of physical vapor deposition, chemical vapor deposition, and thermal oxidation.

7. The method according to claim 3, wherein the thermal anneal presents: an annealing temperature comprised between 100 C. and 600 C., an annealing time of more than 30 min.

8. The method according to claim 1, wherein the second material is amorphous silicon-based.

9. The method according to claim 7, wherein the annealing temperature is between 350 C. and 550 C.

10. The method according to claim 7, wherein the annealing time is more than 1 hour.

11. The method according to claim 5, wherein the first oxide is directly deposited on the first layer by a technique selected from the group consisting of physical vapor deposition, chemical vapor deposition, and thermal oxidation.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other features and advantages will become apparent from the following description of particular embodiments of the invention given for non-restrictive example purposes only, with reference to the appended drawings in which:

(2) FIG. 1 is a schematic cross-sectional view illustrating the different steps of a method of the invention according to a first embodiment,

(3) FIG. 2 is a schematic cross-sectional view illustrating the different steps of a method of the invention according to a second embodiment,

(4) FIG. 3 is an Ellingham diagram representing the standard free enthalpy of formation of an oxide (in kJ/mol) from metals or semiconductors versus the temperature (in K).

DESCRIPTION OF PREFERENTIAL EMBODIMENTS OF THE INVENTION

(5) For the different embodiments, the same reference numerals will be used for identical parts or parts performing the same function, for the sake of simplification of the description. The technical characteristics described in the following for different embodiments are to be considered either alone or in any technically possible combination.

(6) The method illustrated in FIGS. 1 and 2 is a method of bonding a first structure 1 and a second structure 2, comprising the following steps:

(7) a) providing the first structure 1 successively comprising a first substrate 10, a first layer 11 made from a first material based on a metal, and a first metal oxide 12 based on the metal,

(8) b) providing the second structure 2 successively comprising a second substrate 20, a second layer 21 made from a second material, and a second metal oxide 22 based on the metal, the second metal oxide 22 being in direct contact with the second layer 21, the first and second metal oxides 12, 22 presenting a standard free enthalpy of formation from the metal, noted G, the second material being chosen so that it has an oxide 3 presenting a standard free enthalpy of formation from the second material strictly lower than G,

(9) c) bonding the first structure 1 and the second structure 2 by direct adhesion between the first metal oxide 12 and the second metal oxide 22,

(10) d) activating diffusion of the oxygen atoms of the first and second metal oxides 12, 22 to the second layer 21 so as to form the oxide 3 of the second material in all or part of the thickness of the second layer 21.

(11) Step a) advantageously comprises the following steps: a0) providing the first substrate 10, a01) forming the first layer 11 on the first substrate 10, a02) forming the first metal oxide 12 on the first layer 11.

(12) Steps a01) and a02) are advantageously executed in the same chamber in order to prevent the formation of a native oxide on the first layer 11. Step a) advantageously comprises a step a1) consisting of forming the first metal oxide 12 on the first layer 11 in controlled manner. Step a1) is advantageously executed by a technique selected from the group comprising physical vapor deposition, chemical vapor deposition, and thermal oxidation.

(13) Step b) advantageously comprises the following steps: b0) providing the second substrate 20, b01) forming the second layer 21 on the second substrate 20, b02) forming the second metal oxide 22 on the second layer 21 in direct contact.

(14) Steps b01) and b02) are advantageously executed in the same chamber in order to prevent the formation of a native oxide of the second material between the second layer 21 and the second metal oxide 22. Step b) advantageously comprises a step b2) consisting of forming the second metal oxide 22 on the second layer 21 in controlled manner. Step b2) is advantageously executed by a technique selected from the group comprising physical vapor deposition, chemical vapor deposition.

(15) The first and second substrates 10, 20 advantageously present a surface roughness of less than 1 nm root mean square (RMS) on a 2020 m.sup.2 scan evaluated by an atomic force microscope (AFM). The first and second substrates 10, 20 are advantageously made from a material selected from the group comprising a metal, a semiconductor, or a ceramic.

(16) The choice of the second material is advantageously made by consulting an Ellingham diagram as illustrated in FIG. 3. G is thus materialized by a first line. The standard free enthalpy of formation of the oxide 3 from the second material is materialized by a second line. The second material is chosen so that the second line is located underneath the first line in the Ellingham diagram.

(17) Execution of step c) leads to the formation of a bonding interface IC comprising water molecules provided by the atmosphere in which step c) is executed. The bonding can for example be performed in air, at atmospheric pressure and at ambient temperature.

(18) Execution of step d) leads to: formation of an electrically conductive area 4 resulting from the oxygen depletion of the first and second metal oxides 12, 22, formation of the oxide 3 of the second material in all or part of the thickness of the second layer 21.

(19) The first structure 1 and second structure 2 bonded in step c) form an assembly 1, 2, and step d) is advantageously executed by applying a thermal anneal to the assembly 1, 2.

(20) According to a first embodiment: the first material is made from tungsten, the first layer 11 preferably presenting a thickness of 20 nm, the first and second metal oxides 12, 22 are made from tungsten dioxide WO.sub.2 or from tungsten trioxide WO.sub.3, the first and second metal oxides preferably presenting a thickness of 10 nm, the second material is made from silicon, preferably from amorphous silicon, the second layer 21 preferably presenting a thickness of 10 nm, the oxide 3 of the second material originates from an oxidized silicon phase, for example silicon dioxide.

(21) What is meant by thickness is a dimension perpendicular to the plane defined by a substrate 10, 20.

(22) As illustrated in FIG. 3, the second material which is formed by silicon (monocrystalline or polycrystalline or amorphous silicon) is chosen so that it has an oxide, silicon dioxide, presenting a standard free enthalpy of formation from (monocrystalline or amorphous) silicon strictly less than G of the W/WO.sub.2 pair or of the W/WO.sub.3 pair.

(23) The first and second substrates 10, 20 are advantageously made from a silicon-based material.

(24) Steps a01), a02) and b02) are advantageously executed in a cathode sputtering chamber under reactive plasma at ambient temperature, i.e. between 20 C. and 30 C. Steps a02) and b02) are advantageously executed in a plasma containing dioxygen. The first and second metal oxides 12, 22 formed in steps a02) and b02) present a resistivity comprised between 5*10.sup.2 and 5*10.sup.3 .Math.cm.sup.1.

(25) Step c) is executed at ambient atmosphere, i.e. with a pressure of about 1013.25 hPa and a relative humidity of 40% of water, and at ambient temperature, i.e. comprised between 20 C. and 30 C.

(26) When step d) is executed, the thermal anneal applied to the assembly 1, 2 presents: an annealing temperature comprised between 100 C. and 600 C., preferably comprised between 350 C. and 550 C., more preferentially comprised between 450 C. and 550 C., an annealing time of more than 30 min, preferably more than 1 h, more preferentially more than 2 h.

(27) The thermal annealing is advantageously applied in an inert, non-oxidizing atmosphere, i.e. in an N.sub.2 or Ar atmosphere or in a vacuum.

(28) It was experimentally observed by transmission electron microscope that: the bonding interface IC is no longer visible after step d), the oxide 3 has been formed in the thickness of the second layer 21.

(29) As illustrated in FIG. 2, step b) advantageously comprises a step b1) of forming metallic bumps 5 in the whole thickness of the second layer 21. The second substrate 20 is advantageously covered by a dielectric layer 6. The metallic bumps 5 advantageously extend over the whole thickness of the dielectric layer 6 so as to form for example a CMOS interconnection layer. The dielectric layer 6 is advantageously made from an identical material to the oxide 3 of the second material in order to homogenize the electric insulation of the metallic bumps 5.

(30) The second metal oxide 22 presents a part situated facing each metallic bump 5. The metallic bumps 5 are advantageously dimensioned so that the oxygen atoms of said part of the second metal oxide 22 can diffuse to the second layer 21 on each side of the corresponding metallic bump 5. Each metallic bump 5 advantageously presents a width comprised between 10 nm and 100 nm. Each metallic bump 5 extends in a longitudinal direction parallel to the plane defined by the second substrate 20. What is meant by width is a dimension in a direction perpendicular to the longitudinal direction and parallel to the plane defined by the second substrate 20.

(31) Such a method thereby enables monolithic 3D integration of a stack of transistors.