Display panel and display device
10714558 ยท 2020-07-14
Assignee
Inventors
Cpc classification
G09G2310/027
PHYSICS
G09G3/325
PHYSICS
G09G2300/0809
PHYSICS
G09G2310/0291
PHYSICS
G09G3/3291
PHYSICS
G09G2310/0286
PHYSICS
H10K59/128
ELECTRICITY
International classification
G09G3/3291
PHYSICS
G09G3/325
PHYSICS
Abstract
A display panel and a display device including the same are provided. A display device includes a display panel having a plurality of data lines and a plurality of gate lines thereon, the display panel including at least one first area and at least one second area having different light-emitting directions; a data driver circuit configured to drive the plurality of data lines; and a gate driver circuit configured to drive the plurality of gate lines.
Claims
1. A display device, comprising: a display panel having a plurality of data lines and a plurality of gate lines thereon, the display panel including a contiguous first area having a plurality of subpixels and a contiguous second area separated from the first area having a plurality of subpixels such that the first and second areas have different light-emitting directions; a data driver circuit configured to drive the plurality of data lines; and a gate driver circuit configured to drive the plurality of gate lines, wherein a resolution of one of the first area and the second area is lower than a resolution of the other of the first area and the second area, and wherein the gate lines and the data lines are disposed such that density of the sub-pixels in the lower-resolution area is smaller than that of the sub-pixels in the higher-resolution area.
2. The display device according to claim 1, wherein the display panel includes a substrate, wherein each of the first area and the second area includes: a first electrode on the substrate; an organic layer on the first electrode; and a second electrode on the organic layer, wherein a bottom reflective layer is between the substrate and the first electrode in one of the first area and the second area, and wherein a top reflective layer is on the second electrode in the other area of the first area and the second area.
3. The display device according to claim 2, wherein the substrate includes one of a glass substrate and a flexible film substrate.
4. The display device according to claim 2, wherein there is a bending area between the first area and the second area.
5. The display device according to claim 4, wherein each of the first electrode, the organic layer and the second electrode has a step portion in the bending area.
6. The display device according to claim 1, wherein a size of each of the second area is smaller than a size of the first area.
7. The display device according to claim 1, wherein a size of the first area is substantially the same as a size of the second area.
8. The display device according to claim 1, wherein one of the first area and the second area includes an image display area, and the other of the first area and the second area includes an additional information display area.
9. The display device according to claim 1, wherein a boundary between the first area and the second area is oriented in a first direction, and a length of the second area in the first direction is less than a length of the first area in the first direction.
10. The display device according to claim 1, wherein a boundary between the first area and the second area is oriented in a first direction, and the length of the second area in the first direction and the length of the first area in the first direction have the same size.
11. The display device according to claim 1, wherein the display panel is foldable along a boundary between the first area and the second area or is foldable along points by which the first area or the second area is divided into at least two sub-areas.
12. The display device according to claim 11, wherein, when the display panel is folded along the boundary between the first area and the second area, the second area covers all or a portion of the first area.
13. The display device according to claim 11, wherein, when the display panel is folded along the points by which the first area is divided into at least two sub-areas, at least one sub-area of the at least two sub-areas covers the other sub-area of the at least two sub-areas.
14. The display device according to claim 11, wherein, when the display panel is folded, one of the first area and the second area is a display-off area, and the other of the first area and the second area is a display-on area.
15. The display device according to claim 1, wherein a boundary between the first area and the second area is parallel to the plurality of gate lines.
16. The display device according to claim 1, wherein a boundary between the first area and the second area is parallel to the plurality of data lines.
17. The display device according to claim 1, wherein the gate driver circuit includes: a first gate driver configured to drive gate lines among the plurality of gate lines through which subpixels in the first area are caused to generate light; and a second gate driver configured to drive gate lines among the plurality of gate lines through which subpixels in the second area are caused to generate light.
18. The display device according to claim 1, wherein the data driver circuit includes: a first data driver configured to drive data lines among the plurality of data lines through which subpixels in the first area are caused to generate light; and a second data driver configured to drive data lines among the plurality of data lines through which subpixels disposed in the second area are caused to generate light.
19. A display panel, comprising: a substrate; a first electrode on the substrate; an organic layer on the first electrode; and a second electrode on the organic layer, wherein the display panel includes a contiguous first area having a plurality of subpixels and a contiguous second area separated from the first area having a plurality of subpixels such that the first and second areas have different light-emitting directions, and wherein the display panel further includes: a bottom reflective layer between the substrate and the first electrode in the first area, and a top reflective layer on the second electrode in the second area, wherein a resolution of one of the first area and the second area is lower than a resolution of the other of the first area and the second area, and wherein the display panel further includes a plurality of data lines and a plurality of gate lines, and the gate lines and data lines are disposed such that density of the sub-pixels in the lower-resolution area is smaller than that of the sub-pixels in the higher-resolution area.
20. The display panel according to claim 19, wherein the bottom reflective layer is formed in an entirety of the first area, and the top reflective layer is formed in an entirety of the second area.
21. A display panel, comprising: a substrate; a plurality of top emission devices on the substrate in a contiguous first area having a plurality of subpixels; and a plurality of bottom emission devices on the substrate in a contiguous second area having a plurality of subpixels that does not overlap the first area, wherein a resolution of one of the first area and the second area is lower than a resolution of the other of the first area and the second area, and wherein the display panel further includes a plurality of data lines and a plurality of gate lines, and the gate lines and data lines are disposed such that density of the sub-pixels in the lower-resolution area is smaller than that of the sub-pixels in the higher-resolution area.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. In the drawings:
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DETAILED DESCRIPTION
(14) Hereinafter, reference will be made to embodiments of the present disclosure in detail, examples of which are illustrated in the accompanying drawings. Throughout this document, reference should be made to the drawings, in which the same reference numerals and signs will be used to designate the same or like components. In the following description of the present disclosure, detailed descriptions of known functions and components incorporated herein will be omitted in the case that the subject matter of the present disclosure may be rendered unclear thereby.
(15) It will also be understood that, while terms such as first, second, A, B, (a), and (b) may be used herein to describe various elements, such terms are only used to distinguish one element from another element. The substance, sequence, order or number of these elements is not limited by these terms. It will be understood that when an element is referred to as being connected to, coupled to, or fastened to another element, not only can it be directly connected or coupled to the other element, but it can also be indirectly connected, coupled, or fastened to the other element via an intervening element.
(16)
(17) With reference to
(18) The controller 140 may be a timing controller used in display technology or may be a control device including the timing controller and configured to perform other control functions.
(19) The data driver circuit 120 drives the plurality of data lines by converting image data received from the controller 140 into analog data voltages and supplying the analog data voltages to the plurality of data lines. Hereinafter, the data driver circuit 120 will also be referred to as a source driver.
(20) The gate driver circuit 130 sequentially drives the plurality of gate lines by sequentially supplying scanning signals to the plurality of gate lines. Hereinafter, the gate driver circuit 130 will also be referred to as a scanning driver. The gate driver circuit 130 sequentially supplies scanning signals, respectively having an on or off voltage, to the plurality of gate lines under the control of the controller 140.
(21) Although the data driver circuit 120 in
(22) In addition, although the gate driver circuit 130 in
(23) The controller 140 receives a variety of timing signals, including a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input data enable (DE) signal, and a clock signal, as well as input image data, from an external source (e.g., an external host system).
(24) The controller 140 not only outputs image data input from an external source by converting the image data into a data signal format readable by the source driver circuit 120, but also receives the variety of received timing signals (including the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the input DE signal, and the clock signal), generates a variety of control signals, and outputs the variety of control signals to the source driver circuit 120 and the scanning driver circuit 130 to control the source driver circuit 120 and the scanning driver circuit 130. For example, the controller 140 outputs a variety of gate control signals (GCSs), including a gate start pulse (GSP), a gate shift clock (GSC) signal, and a gate output enable (GOE) signal, to control the scanning driver 130.
(25) Here, the GSP controls the operation start timing of one or more gate driver ICs (GDICs) of the scanning driver circuit 130. The GSC signal is a clock signal commonly input to the GDICs to control the shift timing of scanning signals (gate pulses). The GOE signal designates the timing information of one or more GDICs.
(26) In addition, the controller 140 outputs a variety of data control signals (DCSs), including a source start pulse (SSP), a source sampling clock (SSC) signal, and a source output enable (SOE) signal, to control the source driver circuit 120. Here, the SSP controls the data sampling start timing of one or more SDICs of the source driver circuit 120. The SSC signal is a clock signal controlling the data sampling timing of each of the SDICs. The SOE signal controls the output timing of the source driver circuit 120. The source driver circuit 120 may include one or more source driver ICs (SDICs).
(27) Each of the SDICs may be connected to the bonding pads of the display panel 110 by tape automated bonding (TAB) or chip on glass (COG) bonding, may be directly disposed on the display panel 110, or in some cases, may be integrated with the display panel 110. In addition, each of the SDICs may be mounted on a film connected to the display panel 100 by a chip on film (COF) process. Each of the SDICs may include a shift register, a latch circuit, a digital-to-analog converter (DAC), an output buffer, and so on. In some cases, each of the SDICs may further include an analog-to-digital converter (ADC).
(28) The gate driver circuit 130 may include one or more gate driver integrated circuits (GDICs). Each of the GDICs may be connected to the bonding pads of the display panel 110 by tape automated bonding (TAB) or chip on glass (COG) bonding, may be implemented as a gate in panel (GIP)-type IC directly disposed on the display panel 110, or in some cases, may be integrated with the display panel 110. In addition, each of the GDICs may be mounted on a film connected to the display panel 100 by a chip on film (COF) process. Each of the GDICs may include a shift register, a level shifter, and so on.
(29) The display panel 110 may include at least one source printed circuit board (S-PCB) required to connect at least one SDIC in the circuit and a control printed circuit board (C-PCB) on which control components and a variety electronic devices are mounted. At least one SDIC may be mounted on the at least one S-PCB, or a film on which at least one SDIC is mounted may be connected to the at least one S-PCB.
(30) The controller 140 controlling the operations of the data driver circuit 120 and the gate driver circuit 130 may be mounted on the C-PCB. In addition, a power controller supplying a variety of voltages or currents or controlling a variety of voltages or currents to be supplied to the display panel 110, the data driver circuit 120, the gate driver circuit 130, and the like may be disposed on the C-PCB
(31) The at least one S-PCB and the C-PCB may be connected in the circuit via at least one connector. The connector may be implemented as a flexible flat cable (FFC), a flexible printed circuit (FPC), or so on. The at least one S-PCB and the C-PCB may be integrated as a single PCB.
(32) The display panel 110 may be one of various types of devices, such as a liquid crystal display (LCD) device, an organic light-emitting display device, and a plasma display panel (PDP). Each of the subpixels disposed on the display panel 110 may include a circuit device, such as a transistor.
(33) For example, when the display panel 110 is an organic light-emitting display panel, each of the subpixels may include an organic light-emitting diode (OLED), a transistor T1 driving the OLED, a switching transistor T2 delivering a data voltage Vdata to a gate node of the driving transistor T1, a storage capacitor C1 connecting a gate node and a source node (or a drain node) of the driving transistor T1, and so on.
(34) The OLED includes a first electrode, an organic layer, and a second electrode. The first electrode may be an anode or a cathode, while the second electrode may be a cathode or an anode. A base voltage EVSS is connected to the second electrode.
(35) The driving transistor T1 is controlled by the data voltage Vdata applied to the gate node. A driving voltage EVDD is applied to the drain node (or the source node) of the driving transistor T1. The source node (or the drain node) of the driving transistor T1 is connected to the first electrode (the anode or the cathode) of the OLED.
(36) The switching transistor T2 is controlled by a scanning signal SCAN applied to the gate node through the gate line GL. When the switching transistor T2 is turned on by the scanning signal, the switching transistor T2 switches the data voltage Vdata applied to the drain node or the source node through the data line DL to output through the source node or the drain node so that the data voltage Vdata is delivered to the gate node of the driving transistor T1. The storage capacitor C1 maintains a predetermined level of voltage for a single frame.
(37) The types and number of circuit elements constituting each of the subpixels SP may be variously added to or altered depending on the functions to be provided and the design. As shown in
(38) For example, the first area A1 may have a top emission structure, while the second area A2 may have a bottom emission structure. Alternatively, the first area A1 may have a bottom emission structure, while the second area A2 may have a top emission structure.
(39) In addition, the first area A1 having a top or bottom emission structure may be a front display area, while the second area A2 having a bottom or top emission structure may be a rear display area. Alternatively, the first area A1 may be a rear display area, while the second area A2 may be a front display area.
(40) As described above, the display panel 110 differs from a typical double-sided display panel in that one area A1 or A2 has top emission structure while the other area A2 or A1 has a bottom emission structure.
(41) More specifically, in the case of a typical double-sided display panel, bidirectional light emissions a realized by stacking two display panels configured to emit light in the same direction such that the display panels are oriented in the opposite directions, by patterning light-emitting devices configured to emit light in the same direction in the top and bottom portions of a single substrate, or by patterning a light-emitting device configured to emit in the same direction on one surface of a single substrate and then folding the substrate. In contrast, the display panel 110 according to the present embodiments is configured such that top emissions and bottom emissions are realized separately in the two divided areas A1 and A2.
(42) Thus, the use of the display panel 110 according to the present embodiments can provide new and varied product applications that cannot be created by typical double-sided display panels.
(43) Both the first area A1 and the second area A2 may be image display areas. Alternatively, one of the first area A1 and the second area A2 may be an image display area and the other of the first area A1 and the second area A2 may be an additional information display area.
(44) As described above, new and varied of display devices can be produced using both the first and second areas A1 and A2 as image display areas or one of the first and second areas A1 and A2 as an additional information display area.
(45) Hereinafter, reference will be made to a variety of examples of the display panel 110 designed to be divided by a variety of patterns. That is, the display panel 110 is designed such that various numbers of the first area A1 and the second area A2 are formed at a variety of positions.
(46)
(47) As illustrated in
(48) The additional information may include at least one type of information selected from among information regarding the statuses of a variety of devices (e.g., information regarding a battery, communications information, and update information), content information, channel information, news information, weather information, information regarding telecommunications conversation, message information, and so on.
(49) As illustrated in
(50) With reference to
(51) Based on the length characteristics of the first area A1 and the second area A2 (L1=L2), the display panel 110 in which the first area A1 and the second area A2 have the same length may be used in the development of a variety of new products.
(52) With reference to
(53) In addition, as illustrated in
(54)
(55)
(56) With reference to
(57) In this case, a bottom reflective layer LR may be further disposed between the substrate 500 and the first electrode 510 in one of the first area A1 and the second area A2, and a top reflective layer UR may be further disposed on the second electrode 530 in the other of the first area A1 and the second area A2. For example, the first area A1 may be a top emission area, while the second area A2 may be a bottom emission area.
(58) In this case, as illustrated in
(59) As illustrated in
(60) With reference to
(61) A flexible display device can be produced by fabricating the display panel 110 using the above-described substrate 500. The display device 100 according to the present embodiments may be a foldable device.
(62) Hereinafter, a variety of folding patterns of the display panel 110 according to the present embodiments will be illustrated. That is, a variety of folding points FP along which the display device 100 is folded will be illustrated.
(63)
(64) With reference to
(65) With reference to
(66) As illustrated in
(67) With reference to
(68) In the case of
(69) In the case of
(70) When the display panel 110 is folded along the folding points FP between the first area A1 and the second areas A2 as in
(71) With reference to
(72) With reference to
(73) As shown in
(74) As illustrated in
(75)
(76) As shown in
(77) With reference to
(78) Thus, various types of additional information and so on may be displayed through the second area A2 when the display panel 110 is folded.
(79) As described above, when the display panel 110 is folded along the boundary between the two divided sub-areas A1a and A1b of the first area A1, one sub-area A1a or A1b of the first area A1 covers the other sub-area A1b or A1a of the first area A1.
(80) With reference to
(81) When the first area A1 is a top emission area and the second area A2 is a bottom emission area, the front surface of the first area A1 corresponding to the emission surface does not generate light, while the right sub-areas A2b of the second areas A2 covering the left sub-areas A2a of the second areas A2 emit light through the rear surfaces, e.g., the light-emitting surfaces, due to the bottom emission structure thereof.
(82) With reference to
(83) Here, the second areas A2 having the bottom emission structure emit light through the rear surfaces, e.g., the light-emitting surfaces.
(84) As illustrated in
(85)
(86) In
(87) When the first area A1 and the second areas A2 are disposed such that the boundaries BL between the first area A1 and the second areas A2 are parallel to the gate lines GL1 and GL2, the display panels 110 as illustrated in
(88) In addition, when the first area A1 and the second areas A2 are disposed such that the boundaries therebetween are parallel to the gate lines GL1 and GL2, it may be convenient to independently perform gate driving over the first area A1 and the second areas A2. Consequently, it may be easy to independently control the display statuses of the first area A1 and the second areas A2.
(89) For example, when only the gate lines GL1 disposed on the first area A1 are sequentially driven, gate driving can be controlled to be performed only on the first area A1 so that only the first area A1 is display-driven. In contrast, when only the gate lines GL2 disposed on the second areas A2 are sequentially driven, gate driving can be controlled to be performed only on the second area A2 so that only the second area A2 is display-driven.
(90)
(91) In
(92) When the first area A1 and the second areas A2 are disposed such that the boundary BL therebetween is parallel to the data lines DL1 and DL2, the display panels 110 as illustrated in
(93) For example, when only the data lines DL1 disposed in the first area A1 are sequentially driven, data driving can be controlled to be performed only on the first area A1 so that only the first area A1 is display-driven. In contrast, when the data lines DL2 disposed in the second area A2 are sequentially driven, data driving can be controlled to be performed only on the second area A2 so that only the second area A2 is display-driven.
(94) As described above, the display panel 110 is divided into at least one first area A1 and at least one second area A2, wherein the divided areas A1 and A2 can be gate-driven independently or can be gate-driven without being distinguished from each other. In addition, the divided areas A1 and A2 in the display panel 110 can be data-driven independently or can be data-driven without being distinguished from each other.
(95) The gate driver circuit 130 and the data driver circuit 120 may be configured as illustrated in
(96)
(97) With reference to
(98) For example, as illustrated in
(99) When the gate driver circuit 130 includes the gate drivers GD1 and GD2, each of which drives the corresponding area, as described above, the first area A1 and the second area A2 can be independently gate-driven. Consequently, it may be convenient to control the display statuses of the first area A1 and the second area A2 independently.
(100) For example, when the first gate driver GD1 sequentially drives only the gate lines GL1 disposed in the first area A1, gate driving can be controlled to be performed so that only the first area A1 is display-driven. In contrast, when the second gate driver GD2 sequentially drives only the gate lines GL2 disposed in the second area A2, gate driving can be controlled to be performed so that only the second area A2 is display-driven.
(101) The controller 140 can control the operations of the first gate driver GD1 and the second gate driver GD2 based on the status of the device, such as whether or not the display panel is folded, the positions of the areas, or so on.
(102)
(103) With reference to
(104) For example, as illustrated in
(105) When the data driver circuit 120 includes the data drivers DD1 and DD2, each of which drives the corresponding area, as described above, the first area A1 and the second area A2 can be independently data-driven. Consequently, it may be convenient to control the display statuses of the first area A1 and the second area A2 independently.
(106) For example, when the first data driver DD1 sequentially drives only the gate lines DL1 disposed in the first area A1, data driving can be controlled to be performed so that only the first area A1 is display-driven. In contrast, when the second data driver DD2 sequentially drives only the data lines DL2 disposed in the second area A2, data driving can be controlled to be performed so that only the second area A2 is display-driven.
(107) The controller 140 can control the operations of the first data driver DD1 and the second data driver DD2 based on the status of the device such as whether or not the display panel is folded, the positions of the areas, or so on.
(108) As described above, the display panel 110 is divided into the at least one first area A1 and the at least one second area A2. When one area (e.g., the second area A2) of the first area A1 and the second area A2 is an additional information display area (e.g., a sub-display area) in which additional information rather than images is displayed, the additional information display area is not required to be a high-resolution area, unlike an image display area (e.g., a main display area).
(109) Thus, one area of the first area A1 and the second area A2, corresponding to the additional information display area (e.g., the sub-display area), may be a lower-resolution area compared to the other area, although the resolution of one area may be equal to that of the other area. Here, the gate lines and the data lines are disposed such that the number (or density) of the sub-pixels of the lower-resolution area is smaller than that of the sub-pixels of higher-resolution area.
(110) As described above, one area of the first area A1 and the second area A2, corresponding to the additional information display area (e.g., the sub-display area), may be designed to be a lower-resolution area, such that patterns can be designed more easily.
(111) However, as described above, when one area of the first area A1 and the second area A2, corresponding to the additional information display area (e.g., the sub-display area), is designed to be a lower-resolution area compared to the other area, the first area A1 and the second area A2 can be gate-driven and data-driven independently.
(112) Hereinafter, the above-described display panel 110 according to example embodiments of the present invention will be briefly described.
(113)
(114) As shown in
(115) The top emission device TED and the bottom emission device BED are positioned on the same substrate 500. In addition, circuit elements, such as transistors, (e.g., T1, T2, C1, and so on) are disposed on the substrate 500.
(116) For example, in accordance with
(117) The display panel 110 is divided into at least one first area A1 and at least one second area A2. In addition, the at least one first area A1 and the at least one second area A2 have different light-emitting directions, the display panel 110 further includes a bottom reflective layer LR disposed between the substrate 500 and the first electrode 510 in the first area A1 and a top reflective UR disposed on the second electrode 530 in the second area A2.
(118) As described above, the novel display panel 110 having a double-sided light-emitting structure can be realized by dividing the single display panel 110 into at least one first area A1 and at least one second area A2 and forming the at least one first area A1 and the at least one second area A2 formed on the same substrate 500 to have a top emission structure and a bottom emission structure. Accordingly, new and varied product applications that cannot be created by typical double-sided display panels can be provided.
(119) Hereinafter, reference will be made to product applications of the display device 100 according to example embodiments of the present invention.
(120)
(121) In
(122) With reference to
(123) With reference to
(124) The top emission device TED includes the bottom reflective layer LR disposed on the substrate 500, the first electrode 510 disposed on the bottom reflective layer LR, the organic layer 520 disposed on the first electrode 520, the second electrode 530 disposed on the organic layer 520, and so on. The bottom emission device BED includes the first electrode 510 disposed on the substrate 500, the organic layer 520 disposed on the first electrode 510, the second electrode 530 disposed on the organic layer 520, and the top reflective layer UR disposed on the second electrode 530.
(125) The mobile device 2800 is foldable to protect the front screen FS corresponding to a main display screen. In the folded state, various types of additional information may be displayed on the rear screens RS respectively designed to have a bottom emission structure.
(126)
(127) In
(128) According to the example embodiments as set forth above, it is possible to provide the novel display panel 110 having a double-sided light-emitting structure able to satisfy rapidly-changing user demands and the display device 100 including the same. In addition, it is possible to provide the display panel 110 divided into two areas having different light-emitting directions and the display device 100 including the same. Furthermore, it is possible to provide the display panel 110 having both a top emission structure and a bottom emission structure on a single substrate and the display device 100 including the same. Moreover, it is possible to provide the foldable display panel 110 able to display various types of additional information or images in a folded state and the foldable display device 100 including the same.
(129) It will be apparent to those skilled in the art that various modifications and variations can be made in the display panel and the display device of the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.