Semiconductor device having an ohmic electrode including a nickel silicide layer

Abstract

A semiconductor device includes a first semiconductor layer of a first conductivity type provided on a front surface of a silicon carbide semiconductor substrate of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type and connected to the first semiconductor region, a first electrode forming a Schottky-contact with the first semiconductor layer and the first semiconductor region, and a second electrode forming an ohmic contact with the second semiconductor region. The second electrode has a TiAl alloy layer on a surface in contact with the first electrode. The second electrode further has therein a nickel silicide layer containing titanium.

Claims

1. A silicon carbide semiconductor device, comprising: a silicon carbide semiconductor substrate of a first conductivity type; a first semiconductor layer of the first conductivity type provided on a front surface of the silicon carbide semiconductor substrate; a first semiconductor region of a second conductivity type selectively provided in a surface of the first semiconductor layer; a second semiconductor region of the second conductivity type selectively provided in the surface of the first semiconductor layer, the second semiconductor region being connected to the first semiconductor region; a first electrode forming a Schottky-contact with the first semiconductor layer and the first semiconductor region; and a second electrode forming an ohmic contact with the second semiconductor region and including a nickel silicide layer having a main constituent that is Ni.sub.2Si and containing titanium dispersed in the nickel silicide layer; and a titanium-aluminum alloy layer provided on the nickel silicide layer as a surface of the second electrode that contacts the first electrode.

2. The silicon carbide semiconductor device according to claim 1, wherein the second electrode includes carbon locally present at a position in the nickel silicide layer that is substantially the same position as that of the titanium included in the nickel silicide layer.

3. A method of manufacturing a semiconductor device, comprising: preparing a silicon carbide semiconductor substrate of a first conductivity type; forming a first semiconductor layer of the first conductivity type on a front surface of the silicon carbide semiconductor substrate; selectively forming a first semiconductor region of a second conductivity type on a surface of the first semiconductor layer; selectively forming a second semiconductor region of the second conductivity type on the surface of the first semiconductor layer, the second semiconductor region being connected to the first semiconductor region; forming a first electrode that forms a Schottky-contact with the first semiconductor layer and the first semiconductor region; and forming a second electrode that forms an ohmic-contact with the second semiconductor region by: depositing aluminum, nickel, and titanium in this order; and heat treating the deposited aluminum, nickel, and titanium to provide a nickel silicide layer having a main constituent that is Ni.sub.2Si and containing titanium dispersed in the nickel silicide layer; and a titanium-aluminum alloy layer provided on the nickel silicide layer as a surface of the second electrode that contacts the first electrode.

4. The method according to claim 3, wherein the heat treating is executed at 900 degrees C. to 1100 degrees C.

5. The method according to claim 3, wherein the aluminum is deposited to have a thickness of 10 to 20 nm, the nickel is deposited to have a thickness of 30 to 90 nm, and the titanium is deposited to have a thickness of 30 to 60 nm.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a cross-sectional view along cutting line A-A in FIG. 2;

(2) FIG. 2 is a top view of the structure of a silicon carbide semiconductor device according to an embodiment;

(3) FIGS. 3, 4, 5, 6, 7, and 8 are cross-sectional views of the silicon carbide semiconductor device according to the embodiment during manufacture;

(4) FIG. 9 is a cross-sectional view of the structure of an ohmic electrode of the silicon carbide semiconductor device according to the embodiment;

(5) FIG. 10A is a cross-sectional view of Ti distribution in the ohmic electrode according to the embodiment;

(6) FIG. 10B is a cross-sectional view of Ni distribution in the ohmic electrode according to the embodiment;

(7) FIG. 10C is a cross-sectional view of Al distribution in the ohmic electrode according to the embodiment;

(8) FIG. 10D is a cross-sectional view of C distribution in the ohmic electrode according to the embodiment;

(9) FIG. 11A is a cross-sectional view of Ni distribution in the ohmic electrode for which heat treatment was executed at 800 degrees C.;

(10) FIG. 11B is a cross-sectional view of Al distribution in the ohmic electrode for which the heat treatment was executed at 800 degrees C.;

(11) FIG. 11C is a cross-sectional view of C distribution in the ohmic electrode for which the heat treatment was executed at 800 degrees C.;

(12) FIG. 11D is a cross-sectional view of AlNi distribution in the ohmic electrode for which the heat treatment was executed at 800 degrees C.;

(13) FIG. 12A is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1000 degrees C.;

(14) FIG. 12B is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1100 degrees C.;

(15) FIG. 12C is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1200 degrees C.;

(16) FIG. 13A is a graph of Raman scattering light intensities near a Raman shift of 102 cm.sup.1 for Ni.sub.2Si, NiSi, and NiSi.sub.2 Ni;

(17) FIG. 13B is a graph of peak intensity normalized by base intensity, near a Raman shift of 102 cm.sup.1 for each heat treatment temperature;

(18) FIG. 14 is a graph of a comparison of the forward property among the ohmic electrodes of the embodiment and the conventional technique;

(19) FIG. 15 is a graph of a comparison of a forward property of a silicon carbide diode between the embodiment and a conventional technique;

(20) FIG. 16 is a cross-sectional view along cutting line A-A in FIG. 17;

(21) FIG. 17 is a top view of the structure of a conventional silicon carbide diode;

(22) FIG. 18 is a cross-sectional view along cutting line A-A in FIG. 19;

(23) FIG. 19 is a top view of the structure of a silicon carbide diode having a conventional JBS structure;

(24) FIG. 20 is a cross-sectional view of the structure of a silicon carbide diode having a conventional Ni contact electrode;

(25) FIG. 21 is a graph of a comparison of the forward property between conventional silicon carbide diodes;

(26) FIG. 22 is a cross-sectional view of the structure of an ohmic electrode of a conventional silicon carbide diode;

(27) FIG. 23 is a cross-sectional view of the structure of a silicon carbide diode that includes a conventional two-layer contact electrode;

(28) FIG. 24 is a cross-sectional view of the structure of an ohmic electrode of the silicon carbide diode that includes a conventional two-layer contact electrode; and

(29) FIG. 25 is a graph of Raman spectroscopy spectra obtained when the heat treatment temperature is 500 degrees C. to 1000 degrees C.

DETAILED DESCRIPTION OF THE INVENTION

(30) As described above, according to an existing technique, Ni silicide is used as an ohmic contact material for p-type SiC and heat treatment is performed at about 1000 degrees C. When a single layer of Ni is used, a problem arises in that the manufactured device is unsuitable for practical use because the contact layer becomes non-uniform due to an agglomeration effect of Ni occurring when silicide is formed with Ni, and an increase of the operation resistance and degradation of the adhesiveness of the upper electrode (peeling off) become significant as a result of excess deposition of C occurring in the formation of a silicide with SiC, on the surface of the single layer of Ni.

(31) In the technique of adding Al or Ti to Ni to alloy at a high temperature, a structure in which Ni, Ti, and Al are stacked in this order is present and, in this case, variation often occurs in the Ni silicide formation and the furnace may be contaminated by Al scattering in the furnace during the alloy heat treatment.

(32) Therefore, formation of a low-resistance ohmic layer on a Ni silicide having a small work function as the base, and a stable ohmic electrode that is for a p-type SiC, has excellent adhesiveness with the upper electrode, and does not contaminate the device during the processing, etc. are demanded.

(33) For example, conventionally, provision of an Ni contact electrode as in FIG. 20 has been proposed. As depicted in FIG. 20, an Ni layer is formed as the ohmic electrode 108 in the p-type well region 103, heat treatment is performed at 1200 degrees C., a Ti layer is thereafter formed as the Schottky electrode 109, heat treatment is performed at 500 degrees C., and an Al layer is thereafter formed as the upper electrode 1010.

(34) FIG. 21 is a graph of a comparison of the forward property between the conventional silicon carbide diodes. In FIG. 21, the horizontal axis represents the voltage and the unit thereof is V, and the vertical axis represents the current and the unit thereof is A. The results of measurement executed at 150 degrees C. and the room temperature (RT) are depicted. For solid lines and dotted lines in FIG. 21, the lines denoted by reference letters a and b each represents the forward property of the silicon carbide diode in FIG. 20 that includes the Ni contact electrode and the lines denoted by reference letters c and d each represents the forward property of the silicon carbide diode in FIG. 18 that includes no Ni contact electrode. The results of measurement executed at 150 degrees C. and the room temperature (RT) are depicted. In FIG. 21, the lines denoted by the reference letters b and d represent the results obtained at the room temperature, and the lines denoted by the reference letters a and c represent the results obtained at 150 degrees C. As depicted in FIG. 21, results for the silicon carbide diode including the Ni contact electrode (denoted by the reference letter b) indicate that this diode had a degraded ohmic property and high resistance.

(35) FIG. 22 is a cross-sectional view of the structure of the ohmic electrode of the conventional silicon carbide diode. FIG. 22 depicts an observation result of a cross-section of the structure of the silicon carbide diode in FIG. 20. As depicted in FIG. 22, in the ohmic electrode 108, although the Ni.sub.2Si layer 1017 was formed, the Ni.sub.2Si layer 1017 was non-uniform and as denoted by a reference letter B in FIG. 22, SiC and Ni.sub.2Si did not contact each other at some portions. It is presumed that this is because the Ni.sub.2Si layer 1017 agglomerated in the high-temperature heat treatment.

(36) A C layer 1018 was formed on the surface of the Ni.sub.2Si layer 1017. Although this C precipitated associated with the formation of the silicide of SiC, because this C precipitated on the surface of the Ni.sub.2Si layer 1017, the adhesiveness of the surface of the Ni.sub.2Si layer 1017 degraded for Ti of the Schottky electrode 109 thereon and the C layer 1018 is a factor for the increased resistance depicted in FIG. 21.

(37) To solve this defect, a two-layer contact electrode including an Al layer and an Ni layer has been proposed (see, e.g., Japanese Laid-Open Patent Publication No. 2007-324187). This is a technique used for a Si semiconductor. FIG. 23 is a cross-sectional view of the structure of a silicon carbide diode that includes a conventional two-layer contact electrode. As depicted in FIG. 23, an Al layer 1015 is formed to have a thickness of 10 nm in the p-type well region 103, an Ni layer 1016 is formed thereafter to have a thickness of 60 nm, and heat treatment at 1000 degrees C. is executed to form the ohmic electrode 108. With this method, it is presumed that Al having a low melting point diffuses in Ni and precipitates on the surface thereof, reducing the surface energy of Ni and preventing Ni silicide from growing in stripes (agglomeration) for a uniform silicide layer to be formed.

(38) FIG. 24 is a cross-sectional view of the structure of an ohmic electrode of the silicon carbide diode including the conventional two-layer contact electrode. FIG. 24 depicts a result obtained by performing heat treatment at about 1000 degrees C. As depicted in FIG. 24, the ohmic electrode 108 had the thick Ni.sub.2Si layer 1017 (the Ni silicide layer) uniformly formed on SiC, the Al layer 1015 was segregated on the surface, and the C layer was not formed on the surface. As a result, the forward property of the silicon carbide diode including the two-layer contact electrode had a resistance lower than that of the silicon carbide diode depicted in FIG. 20 including the Ni contact electrode.

(39) Although many forms of Ni silicide such as Ni.sub.2Si, NiSi, and NiSi.sub.2 exist, the silicide that is most stable for SiC and that has the lowest resistance is Ni.sub.2Si. FIG. 25 is a graph of Raman spectroscopy spectra obtained when the heat treatment temperature is 500 degrees C. to 1000 degrees C. In FIG. 25, the horizontal axis represents the Raman shift and the unit thereof is cm.sup.1, and the vertical axis represents the scattering intensity. The Raman spectroscopic method is a technique of analyzing the structure at the molecular level using a Raman spectrum obtained by applying light to a material, and dispersing Raman-scattered light scattered to have a wavelength different from that of the incident light by molecular vibrations. The composition of the Ni silicide layer may be identified using the Raman spectroscopic method. FIG. 25 depicts the peak positions of the representative silicide forms of Ni.sub.2Si, NiSi, and NiSi.sub.2. From an analysis of the peaks in FIG. 25, it was found that Ni.sub.2Si is formed as the Ni silicide layer as a result of heat treatment at 700 degrees C. or higher. On the other hand, with heat treatment at 600 degrees C. or lower, the peak position shifted from that of Ni.sub.2Si and the intensity is low, and therefore, the formation of Ni.sub.2Si is incomplete. According to the result of the same experiment executed at a temperature up to 1200 degrees C., it was found that the main constituent of the silicide layer at temperatures up to 1200 degrees C. is Ni.sub.2Si.

(40) As described, when Al and Ni are deposited in this order on p-type SiC and heat treatment is performed at 700 degrees C. or higher, stable Ni.sub.2Si is formed and the precipitation of the C layer to the surface observed for the Ni layer as a single substance is not observed. As a result, an excellent forward property may be obtained in the evaluation of the element. With this method, however, the top surface has an Al-rich structure. For an actual element, for example, processes such as the formation of the Schottky electrode at about 500 degrees C. and heat treatment are executed after the formation of the silicide layer and as a result, problems such as the contamination of the heat treatment furnace by Al and the like arise during processing for this structure.

(41) Embodiments of a semiconductor device and a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings. In the present description and accompanying drawings, layers and regions prefixed with n or p mean that majority carriers are electrons or holes. Additionally, + or appended to n or p means that the impurity concentration is higher or lower, respectively, than layers and regions without + or . In the description of the embodiments below and the accompanying drawings, main portions that are identical will be given the same reference numerals and will not be repeatedly described.

(42) The semiconductor device according to the present invention is configured using a wide bandgap semiconductor. In the embodiment, a silicon carbide semiconductor device manufactured using, for example, SiC as the wide bandgap semiconductor will be described taking an SBD having a JBS structure as an example. FIG. 1 is a cross-sectional view along cutting line A-A in FIG. 2, which depicts the structure of the silicon carbide semiconductor device according to the embodiment. FIG. 2 is a top view of the structure of the silicon carbide semiconductor device according to the embodiment.

(43) As depicted in FIGS. 1 and 2, the silicon carbide semiconductor device according to the embodiment includes an active region 20 and an edge termination region 30 surrounding the circumference of the active region 20, in a semiconductor base substrate including silicon carbide (hereinafter, referred to as silicon carbide base substrate (a semiconductor substrate (a semiconductor chip))) 40. The active region 20 is a region through which a current flows during the ON-state. The edge termination region 30 is a region that mitigates the electric field on the front surface side of the base substrate in a drift region to sustain the breakdown voltage.

(44) The silicon carbide base substrate 40 is formed by stacking on the front surface of an n-type silicon carbide substrate (a silicon carbide semiconductor substrate of a first conductivity type) 1 containing silicon carbide, an n.sup.-type drift layer (a first semiconductor layer of the first conductivity type) 2 containing silicon carbide. In the active region 20, a p-type well region (a first semiconductor region of a second conductivity type) 3 and a p-type region (a second semiconductor region of the second conductivity type) 4 to be the JBS structure are selectively provided in the surface layer on a first side of the type drift layer 2 (the front surface side of the base substrate) opposite a second side of the n.sup.-type drift layer 2 facing the n-type silicon carbide base substrate 1. The p-type well region 3 is provided to contact the p-type region 4. On an outer side of the p-type well region 3 and the p-type region 4, one annular p.sup.+-type guard ring region 5 is arranged surrounding the active region 20 (see, for example, FIG. 2).

(45) In the edge termination region 30, a p.sup.-type junction termination extension (JTE) region 6 to improve the breakdown voltage of the high-voltage semiconductor device overall by mitigating or dispersing the electric field of the edge termination region 30 is selectively provided in the surface layer on the first side of the n.sup.-type drift layer 2 (the front surface side of the base substrate). The JTE region 6 is provided to surround the p.sup.+-type guard ring region 5.

(46) In a portion of the active region 20 on the front surface side of the silicon carbide base substrate 40, an ohmic electrode (a second electrode) 8 that forms an ohmic-contact with the p-type region 4, and a Schottky electrode (a first electrode) 9 that forms a Schottky-contact with the n.sup.-type drift layer 2 and the p-type well region 3 are provided. A TiAl alloy layer 8a is provided on the surface of the ohmic electrode 8 (the surface in contact with the Schottky electrode 9). An Ni silicide layer 8b is provided in the ohmic electrode 8. Ti 8c is locally present inside the Ni silicide layer 8b. C not depicted is present at the same positions as those of Ti 8c inside the Ni silicide layer 8b. The Ni silicide layer 8b includes Ni.sub.2Si as a main constituent. As described, in the embodiment, the surface of the ohmic electrode 8 is the TiAl alloy layer 8a, and C and Al do not precipitate thereon.

(47) Here, a surface portion of the p-type region 4 in contact with the ohmic electrode 8 acts as an ohmic contact region (hereinafter, may simply be referred to as contact region). An upper electrode 10 covers the Schottky electrode 9, and a passivation film 11 containing polyimide is provided to protect the upper electrode 10 and an interlayer insulating film 7 described later. A lower electrode 12 is provided on a rear surface of the silicon carbide base substrate 40 (the rear surface of the n-type silicon carbide substrate 1).

(48) The interlayer insulating film 7 covers the JTE region 6 of the edge termination region 30. The JTE region 6 of the edge termination region 30 is electrically insulated from the Schottky electrode 9 and the upper electrode 10 by the interlayer insulating film 7. An inner-side end portion of the interlayer insulating film 7 extends on the p.sup.+-type guard ring 5.

(49) A method of manufacturing a silicon carbide semiconductor device according to the embodiment will be described. A method of manufacturing the SBD having the JBS structure in FIG. 1 will be described. FIGS. 3, 4, 5, 6, 7, and 8 are cross-sectional views of the silicon carbide semiconductor device according to the embodiment during manufacture. The n-type silicon carbide substrate 1 is first prepared. The n.sup.-type drift layer 2 is formed on the front surface of the n-type silicon carbide substrate 1 by epitaxial growth.

(50) In the active region 20, the p-type well region 3 and the p-type region 4 are each selectively formed in the surface layer of the n.sup.-type drift layer 2 by photolithography and ion implantation of a p-type impurity. For example, the depth of the p-type well region 3 is about 0.8 m. In the edge termination region 30, the p.sup.+-type guard ring region 5 and the JTE region 6 are each selectively formed in the surface layer of the n.sup.-type drift layer 2 by photolithography and ion implantation of a p-type impurity. The order of the formation of the p-type well region 3 and the p-type region 4, and the formation of the p.sup.+-type guard ring region 5 and the JTE region 6 may be interchanged. After all ion implantation sessions are finished, activation annealing is performed.

(51) A field oxide film 13 to become the interlayer insulating film 7 is formed along the front surface of the silicon carbide base substrate and has a film thickness of, for example, 0.5 m. The state established so far is depicted in FIG. 3. The oxide film is etched by a photoetching process to form a contact metal formation region on the p-type region 4. The state established so far is depicted in FIG. 4.

(52) Al, Ni, and Ti are deposited in this order along the front surface of the silicon carbide base substrate, and a contact metal 14 is formed by a sputtering method. In this case, because the Al diffuses into the Ni and precipitates on the surface of the deposited Ni, an excessively thick layer is unsuitable and based on experimental results, the thickness of deposited Al may be 10 to 20 nm. When the thickness of the deposited Ni is excessively thin, no Ni contact is formed due to the effects of Al. Although no restriction is set for the upper limit, the thickness of deposited Ni may be 30 to 90 nm. Because Ti has to be alloyed with Al, the thickness of the deposited Ti has to be thicker than that of the deposited Al. Therefore, the thickness of Ti may be 30 to 60 nm. The state established so far is depicted in FIG. 5. The contact metal 14 is removed by etching, leaving a region on the p-type region 4, where the ohmic electrode 8 formed. The state established so far is depicted in FIG. 6.

(53) The ohmic electrode 8 is formed by a heat treatment (annealing) process executed for five minutes at a temperature of 900 degrees C. to 1100 degrees C. The atmosphere of the annealing may be argon (Ar) or nitrogen (N.sub.2). The ohmic electrode 8 may be formed by laser annealing. In this case, because the overall device does not need to be placed in the furnace and the device is locally heated by the laser and therefore, the surface is not affected and the ohmic property is improved. In this manner, Al, Ni, and Ti are deposited in this order and the heat treated whereby the Al diffuses into the Ni and SiC, enabling a uniform silicide to be formed. The Al bonds with the Ti that is on the surface whereby the TiAl alloy layer 8a is formed. The execution of the heat treatment at the temperature of 900 degrees C. to 1100 degrees C. causes the main constituent of the Ni silicide layer 8b to be Ni.sub.2Si, enabling a high ohmic property to be achieved. The field oxide film 13 is removed by etching, leaving a portion in the edge termination region 30. The field oxide film 13 remaining in the edge termination region 30 becomes the interlayer insulating film 7. The state established so far is depicted in FIG. 7.

(54) A Schottky metal is formed by sputtering Ti along the front surface of the silicon carbide base substrate to a thickness of 0.5 m and the portion thereof outside the p.sup.+-type guard ring region 5 is removed by etching to form the Schottky electrode 9. The state established so far is depicted in FIG. 8.

(55) AlSi is formed as the upper electrode 10 to have a thickness of 5 m and a portion of the AlSi on the p.sup.+-type guard ring region 5 on the outer circumferential side of the Schottky electrode 9 is removed by etching. Polyimide is applied on the uppermost surface to form the passivation film 11.

(56) A lower electrode 12 is formed on the rear surface of the n-type silicon carbide substrate 1. The silicon carbide semiconductor device depicted in FIG. 1 is thereby manufactured.

(57) The structure of the ohmic electrode will be described in detail on the basis of the ohmic electrode manufactured using the method of the embodiment. FIG. 9 is a cross-sectional view of the structure of the ohmic electrode of the silicon carbide semiconductor device according to the embodiment. FIG. 9 depicts an observation result of a cross-section of the ohmic electrode 8 formed by depositing Al, Ni, and Ti in this order on the p-type region 4 and executing heat treatment at 1000 degrees C. As depicted in FIG. 9, the TiAl alloy layer 8a was formed on the surface of the ohmic electrode 8 and the Ni silicide layer 8b was formed therein. In the Ni silicide layer 8b, Ni.sub.2Si formed favorably similar to a case where Al and Ni are deposited. The TiAl alloy layer 8a was thermally stable and Al did not diffuse therein; and there were no problems in the heat treatment processing executed thereafter. The Ti 8c was locally present inside the Ni silicide layer 8b.

(58) The results of analysis of the elements in the ohmic electrode 8 by energy dispersive X-ray spectrometry (EDX) will be described. EDX is a technique of examining the elements constituting an object and their concentrations from the energy of each and the number of the electron-hole pairs generated by introducing into a semiconductor detector, characteristic X rays generated when a primary ray such as an electron beam or an X-ray is applied to the object.

(59) FIG. 10A is a cross-sectional view of Ti distribution in the ohmic electrode according to the embodiment. As depicted in FIG. 10A, the Ti 8c was locally present in the Ni silicide layer 8b in addition to the portion thereof that formed an alloy with Al on the top surface. FIG. 10B is a cross-sectional view of Ni distribution in the ohmic electrode according to the embodiment. As depicted in FIG. 10B, Ni 8d was present in the Ni silicide layer 8b as a silicide.

(60) FIG. 10C is a cross-sectional view of Al distribution in the ohmic electrode according to the embodiment. Although Al 8e tended to precipitate on the surface, the Al 8e formed an alloy with the Ti 8c and as depicted in FIG. 10C, Al alone therefore did not precipitate on the surface and was locally present in the Ni silicide layer 8b.

(61) FIG. 10D is a cross-sectional view of C distribution in the ohmic electrode according to the embodiment. As depicted in FIG. 10D, although C precipitates on the surface in a conventional example where the ohmic electrode includes Ni alone, it is presumed that C 8f bonded with, i.e., formed an alloy with the Ti 8c or the Al 8e in a practical example, preventing precipitation on the surface. From FIG. 10A and FIG. 10D, it is presumed that, in the Ni silicide layer 8b, the Ti 8c and the C 8f were present at substantially a same position and the Ti 8c was bonded with the C 8f.

(62) Differences in the configuration of the ohmic electrode 8 between annealing temperatures will be described. A case where the heat treatment was executed at 800 degrees C. for the same configuration will be described. FIG. 11A is a cross-sectional view of Ni distribution in the ohmic electrode for which heat treatment was executed at 800 degrees C. FIG. 11B is a cross-sectional view of Al distribution in the ohmic electrode for which heat treatment was executed at 800 degrees C. FIG. 11C is a cross-sectional view of C distribution in the ohmic electrode for which heat treatment was executed at 800 degrees C. FIG. 11D is a cross-sectional view of AlNi distribution in the ohmic electrode for which heat treatment was executed at 800 degrees C.

(63) As depicted in FIG. 11D, compared to the case in FIG. 9 where the heat treatment was executed at 1000 degrees C., the Al 8e precipitated on the surface of the Ni silicide layer 8b. As a result, even in the case where Al, Ni, and Ti were deposited in this order, when the heat treatment was executed at 800 degrees C., because Al was present on the surface, Al scattered during the heat treatment processing executed thereafter and caused problems.

(64) Cases will be described where heat treatment was executed for the ohmic electrode 8 having the same configuration at 1000 degrees C., 1100 degrees C., and 1200 degrees C. FIG. 12A is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1000 degrees C. FIG. 12B is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1100 degrees C. FIG. 12C is a cross-sectional view of the structure of the ohmic electrode for which the heat treatment was executed at 1200 degrees C. In FIGS. 12A to 12C, a dotted line L1 indicates the upper end of the Ni silicide layer 8b, i.e., the portion thereof in contact with the Schottky electrode 9 (the surface). A dotted line L2 indicates the lower end of the Ni silicide layer 8b, i.e., the portion thereof in contact with the p-type well region 3.

(65) As described, for 1000 degrees C., as depicted in FIG. 12A, the Ti 8c was present at the upper end of the Ni silicide layer 8b and formed an alloy with Al to form the TiAl alloy 8a. In contrast, as depicted in FIG. 12B and FIG. 12C, the Ti 8c at the upper end L1 of the Ni silicide layer 8b decreased and tended to segregate inside the Ni silicide layer 8b accompanying the increased heat treatment temperatures of 1100 degrees C. and 1200 degrees C. The Ti 8c on the surface decreased non-uniformly for 1100 degrees C. or higher, and the Ti 8c substantially disappeared from the surface for 1200 degrees C. The Al 8e also precipitated on the surface for 1000 degrees C. while the Al 8e tended to be distributed in the overall film with higher temperatures of 1100 degrees C. or higher. Although not depicted, it is recognized that C segregated on the surface in the case of the heat treatment executed at 1200 degrees C.

(66) Therefore, in cases where Al, Ni, and Ti were deposited in this order, it is conceivable that the upper limit of the heat treatment was 1100 degrees C., taking into consideration the importance of the surface being covered by the AlTi alloy 8a and no C precipitation layer being present on the surface.

(67) The result of the measurement of Raman spectroscopy spectra of the ohmic electrode of the embodiment will be described. FIG. 13A is a graph of the Raman scattering light intensities of types of Ni silicide whose heat treatment temperatures were 500 degrees C. to 1000 degrees C., such as Ni.sub.2Si, NiSi, and NiSi.sub.2. In FIG. 13A, the horizontal axis represents the Raman shift and the unit thereof is cm.sup.1 and the vertical axis represents the scattering intensity. Because the Raman scattering light intensity corresponds to the amount (the volume) of the silicide, it can be seen that a large amount of Ni.sub.2Si was included since the Raman scattering light intensity was high.

(68) The heat treatment temperature for forming the ohmic electrode 8 was varied and the peak intensity and the base intensity to be the hem, of Ni.sub.2Si for each of the heat treatment temperatures were determined.

(69) FIG. 13B is a graph of the peak intensity normalized by the base intensity, near a Raman shift of 102 cm.sup.1 for each of the heat treatment temperatures. In FIG. 13B, the horizontal axis represents the heat treatment temperature and the unit thereof is degrees C. and the vertical axis represents the peak intensity/the base intensity. As depicted in FIG. 13A, although the Raman scattering peak is divided into two even when the peak is the one related to Ni.sub.2Si, any one thereof is taken for consideration.

(70) As depicted in FIG. 13B, the peak intensity/the base intensity increased as the heat treatment temperature increased from 500 degrees C., and reached a peak at 1000 degrees C. According to another experiment, the peak intensity/the base intensity tended to decrease at heat treatment temperatures of 1000 degrees C. or higher. When the peak intensity of Ni2Si was about 60% of that at the peak temperature of 1000 degrees C., this ratio was sufficient as the ratio of Ni.sub.2Si and therefore, the heat treatment temperature only had to be 900 degrees C. or higher. When the same operation was executed for the peak for NiSi, the ratio thereof did not depend on the heat treatment temperature.

(71) As described, at 1200 degrees C., the Ti 8c diffused inside and substantially no segregation on the surface was observed and therefore, the TiAl alloy layer 8a was not formed. As a result, a temperature from 900 degrees C. to 1100 degrees C. was the optimal heat treatment temperature from the viewpoint of the formation of Ni.sub.2Si and the Ti segregation on the surface.

(72) FIG. 14 is a graph of a comparison of the forward property among the ohmic electrodes of the embodiment and the conventional technique. In FIG. 14, the horizontal axis represents the forward current and the unit thereof is A, and the vertical axis represents the forward voltage and the unit thereof is V. The graph presents the results of an experiment executed applying the ohmic electrodes of the embodiment and the conventional technique to a silicon carbide pn-diode. The graph presents the results of the forward property obtained by wafer probing for the state of a wafer. The built-in voltage of the silicon carbide pn-diode was about 2.6V.

(73) In FIG. 14, a reference character S1 denotes the results for the conventional silicon carbide diodes without a contact layer and depicted in FIG. 16. These results represent the measurement results of plural silicon carbide diodes for which the heat treatment was executed at the same temperature. As depicted in FIG. 14, for the diodes without the contact layer, the results show that the operation resistance was high and the VF (the forward voltage) was high. The variation due to individual differences was significant even with the same heat treatment temperature.

(74) In FIG. 14, a reference character S2 denotes the results for the conventional silicon carbide diodes with the contact layer formed by a single Ni layer and depicted in FIG. 20. These results represent the measurement results of plural silicon carbide diodes for which the heat treatment was executed at the same temperature. As depicted in FIG. 14, with the Ni single layer, although the property was improved as compared to that of the diode including no contact layer, the variation was high due to temperature differences during the heat treatment. It is conceivable that this was the result of the non-uniformity of the Ni silicide layer and the precipitation of the C film. In addition, due to the effects of the C film, the Ni silicide layer had degraded adhesiveness with respect to the upper electrode and the manufacture thereof (the wire bonding) was impossible.

(75) In FIG. 14, a reference character S3 denotes the results for the silicon carbide diodes of the practical example according to the present invention and in which Al, Ni, and Ti were deposited in this order as depicted in FIG. 1. These results represent the results of a case where the heat treatment was executed at 1000 degrees C., 1100 degrees C., and 1200 degrees C. L31 represents the results for 1000 degrees C., L32 represents the results for 1100 degrees C., and L33 represents the results for 1200 degrees C. As depicted in FIG. 14, the operation resistance mildly decreased and the VF decreased as the temperature increased. The upper limit of the practical heat treatment temperature was however 1100 degrees C. because C segregates on the surface at 1200 degrees C.

(76) FIG. 15 is a graph of a comparison of the forward property of the silicon carbide diode between the embodiment and the conventional technique. In FIG. 15, the vertical axis represents the forward current and the unit thereof is A and the horizontal axis represents the forward voltage and the unit thereof is V. A in FIG. 15 denotes the property of the silicon carbide diode having the conventional JBS structure depicted in FIG. 18, and B in FIG. 15 denotes the property of the silicon carbide diode of the practical example according to the present invention.

(77) The curves A and B in FIG. 15 result in a curve that indicates a combined current of the current flowing through the Schottky electrode 9 and the current flowing through the p-type well region 3. B, which indicates the current including the current flowing through the ohmic electrode 8, has a low rise voltage on the high current side. The rise waveform of B may be further shifted toward the constant-voltage side by optimizing the spread of the current through the ohmic electrode 8. High power of the currentthe voltage may be applied and the forward surge capability is increased by reducing the rise voltage.

(78) As described, according to the silicon carbide semiconductor device of the embodiment, the TiAl alloy layer is provided on the upper surface of the ohmic electrode and the Ni silicide layer is provided inside the ohmic electrode. Ti is locally present inside the Ni silicide layer. The TiAl alloy layer is thermally stable and causes no contamination of the device, etc. by Al during processing. Because C does not precipitate on the surface, the TiAl alloy layer has excellent adhesiveness with respect to the upper electrode. Because C is not formed on the surface, the TiAl alloy layer has a high ohmic property. In addition, execution of the heat treatment at a temperature of 900 degrees C. to 1100 degrees C. causes Ni.sub.2Si to become the main constituent of the Ni silicide layer, enabling the Ni silicide layer to have a high ohmic property. As a result, regarding the forward property of the silicon carbide diode, the silicon carbide diode has lower resistance than that of the conventional silicon carbide diode and the forward surge capability may be improved.

(79) Various changes can be made to the present invention within a scope not departing from the spirit of the present invention and in the embodiment, for example, dimensions, impurity concentrations, and the like of the components are variously set in accordance with required specifications and the like. In the embodiment, although description has been given taking the SBD as an example, the present invention is not limited hereto and is widely applicable to various silicon carbide semiconductor devices having an ohmic junction. For example, the present invention is applicable to a source electrode of a MOSFET. In the embodiment, although the first conductivity type is regarded to be an n-type and the second conductivity type is regarded to be a p-type, the present invention is similarly implemented when the first conductivity type is a p-type and the second conductivity type is an n-type.

(80) According to the semiconductor device and the method of manufacturing a semiconductor device of the present invention, effects are achieved that the device is not contaminated, etc. during the processing, that the adhesiveness with respect to the upper electrode is excellent, that an excellent ohmic property for p-type SiC is retained, and that forward surge capability can be improved.

(81) As described, the semiconductor device and the method of manufacturing a semiconductor device according to the present invention are useful for, for example, high-voltage power semiconductor devices used in power converting equipment and power supply devices such as in various industrial machines, and are particularly suitable for silicon carbide semiconductor devices having an ohmic junction.

(82) Although the invention has been described with respect to a specific embodiment for a complete and clear disclosure, the appended claims are not to be thus limited but are to be construed as embodying all modifications and alternative constructions that may occur to one skilled in the art which fairly fall within the basic teaching herein set forth.