HIGH-EFFICIENCY OXIDIZED VCSEL INCLUDING CURRENT DIFFUSION LAYER HAVING HIGH-DOPING EMISSION REGION, AND MANUFACTURING METHOD THEREOF

Abstract

The present invention relates to a vertical cavity surface emitting laser (VCSEL) and a manufacturing method thereof, and more specifically, to a high-efficiency oxidized vertical cavity surface emitting laser for emitting laser light having a peak wavelength of 860 nm, and a manufacturing method thereof. The vertical cavity surface emitting laser according to the present invention includes a current diffusion layer having a high doping region at least in a portion between an upper electrode and a lower distributed Bragg reflector.

Claims

1. An oxidized vertical surface emission laser (VCSEL) comprising a current diffusion layer having a high doping region at least in a portion between an upper electrode and a lower distributed Bragg reflector.

2. The oxidized VCSEL according to claim 1, wherein the current diffusion layer is an epitaxially grown transparent conductive layer.

3. The oxidized VCSEL according to claim 1, wherein the current diffusion layer is configured of AlGaAs or GaP.

4. The oxidized VCSEL according to claim 2, wherein the epitaxially grown current diffusion layer has a doping concentration of 6.010.sup.18 atoms/cm.sup.3 to 8.510.sup.18 atoms/cm.sup.3.

5. The oxidized VCSEL according to claim 1, wherein doping concentration of the high doping region increases as much as 1.010.sup.19 atom/cm.sup.3 or higher by doping accomplished after growth of the current diffusion layer.

6. The oxidized VCSEL according to claim 5, wherein the doping is surface doping.

7. The oxidized VCSEL according to claim 1, wherein the high doping region is doped with any one or more selected from a group including Li, Na, K, Rb, Cs, Be, Mg, Ca, Sr, Ba, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Y, Zr, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Cd, Pt, and Au.

8. The oxidized VCSEL according to claim 1, wherein the high doping region is formed at a center portion of the current diffusion layer.

9. The oxidized VCSEL according to claim 1, wherein the high doping region is formed at a center portion of the current diffusion layer and a portion of a periphery contacting with the center portion.

10. The oxidized VCSEL according to claim 8, wherein the high doping region is formed on a surface and as much as a predetermined depth smaller than a thickness of the current diffusion layer.

11. The oxidized VCSEL according to claim 1, wherein the high doping region has a concentration profile in which the concentration increases according to depth to reach a maximum value and gradually decreases thereafter.

12. The oxidized VCSEL according to claim 11, wherein a maximum concentration of the concentration profile is located at position 0.5 m or lower from a top surface.

13. The oxidized VCSEL according to claim 1, further comprising a lower electrode, a substrate, a lower DBR, an active layer, an oxide layer having a current window at a center portion, and an upper DBR.

14. The oxidized VCSEL according to claim 13, wherein the oxide layer is positioned between layers of the upper DBR.

15. The oxidized VCSEL according to claim 1, wherein the high doping region is doped with Zn.

16. A manufacturing method of an oxidized vertical surface emission laser (VCSEL), the method comprising the steps of: epitaxially growing a current diffusion layer between an upper electrode and a lower distributed Bragg reflector; and forming a high doping region by injecting dopant into at least a portion of the current diffusion layer after growth of the current diffusion layer.

17. The method according to claim 16, wherein the high doping region is formed by stacking a dopant supply layer in at least a portion of a top surface of the current diffusion layer, forming the high doping region in at least a portion of the current diffusion layer by heating the dopant supply layer, and removing the stacked dopant supply layer.

18. The method according to claim 17, wherein the high doping region doped with Zn is formed by stacking a ZnO dopant supply layer on the GaP current diffusion layer and heating at a temperature of 400 to 450 C.

19. The method according to claim 17, wherein the high doping region doped with Zn is formed by stacking an AZO dopant supply layer on the AlGaAs current diffusion layer and heating at a temperature of 500 to 600 C.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0056] FIG. 1 is a view showing an exploded cross-section of a conventional oxidized VCSEL.

[0057] FIG. 2(a) is a view showing an SEM image of a DBR damaged when oxidization is progressed, and FIG. 2(b) is a view showing a shape of a current window, in which the black band shape is a trench (dented) area, and the center area is a column area for emitting light, of which the brighter area is an oxidized area.

[0058] FIG. 3 is an isolated cross-sectional view showing the layer structure of an oxidized VCSEL according to an embodiment of the present invention.

[0059] FIG. 4 is a view showing the steps of forming a doping unit of a light diffusion layer in an oxidized VCSEL according to an embodiment of the present invention. (a) Dopant supply layer deposition step, (b) Heat doping step, (c) Dopant supply layer removing step, (d) Upper electrode forming step

[0060] FIG. 5 is a view showing an SEM picture photographing the cross-sectional area of a current diffusion layer having a doping unit of an oxidized VCSEL of the present invention.

[0061] FIG. 6 is a graph showing hole concentration and resistance of a current diffusion layer doped with Zn through heat treatment of 500 C., 600 C. and 700 C. and a non-doped current diffusion layer according to embodiment 1 of the present invention.

[0062] FIG. 7 is a graph showing doping concentration according to depth of a current diffusion layer doped with Zn through heat treatment of 500 C., 600 C. and 700 C. and depth of a non-doped current diffusion layer according to embodiment 1 of the present invention. The inserted figures are results of AFM.

[0063] FIG. 8 is a graph showing output power as a function of current (I) of a VCSEL chip having a current diffusion layer doped with Zn through heat treatment of 500 C., 600 C. and 700 C. and a non-doped current diffusion layer according to embodiment 1 of the present invention.

[0064] FIG. 9 is a graph showing the shapes of beam emission of a VCSEL chip having a current diffusion layer doped with Zn through heat treatment of 600 C. and a non-doped current diffusion layer according to embodiment 1 of the present invention.

[0065] FIG. 10 is a graph showing doping concentration according to depth of a current diffusion layer doped with Zn through heat treatment of 400 C., 450 C. and 500 C. and depth of a non-doped current diffusion layer according to embodiment 2 of the present invention. The inserted figures are results of AFM.

[0066] FIG. 11 is a graph showing output power of function current (I) of a VCSEL chip having a current diffusion layer doped with Zn through heat treatment of 400 C., 450 C. and 500 C. and a non-doped current diffusion layer according to embodiment 2 of the present invention.

[0067] FIG. 12 is a graph showing the shapes of beam emission of a VCSEL chip having a current diffusion layer doped with Zn through heat treatment of 450 C. and a non--doped current diffusion layer according to embodiment 2 of the present invention.

[0068] FIG. 13 is a view showing the cross-sectional structure of the VCSEL of embodiment 2 of the present invention.

[0069] FIG. 14 is a view showing the process of manufacturing the VCSEL of embodiment 2 of the present invention.

DESCRIPTION OF SYMBOLS

[0070] 100: Oxidized VCSEL [0071] 110: Lower electrode [0072] 120: Substrate [0073] 130: Lower DBR [0074] 140: Active layer [0075] 150: Upper DBR [0076] 160: Current diffusion layer [0077] 161: High doping region [0078] 170: Upper electrode [0079] 180: Oxide layer [0080] 190: Reflection. prevention layer

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0081] Hereinafter, the present invention will be described in detail through the embodiments. The embodiments described below are not to limit the present invention, but to illustrate the present invention.

Embodiments 1

[0082] FIG. 3 shows the structure of a VCSEL layer which emits laser light having a peak wavelength of 860 nm and is applied with a p-AlGaAs current diffusion layer, of which the center portion of the top surface is doped with Zn, manufactured by a MOCVD system.

[0083] As shown in FIG. 3, an oxidized VCSEL 100 having a peak wavelength of 860 nm according of the present invention is an oxidized VCSEL 100 which emits laser light at toward the top of a substrate 120. The VCSEL 100 is grown on an n-type GaAs substrate 120 in a MOCVD method, uses trimethylgallium (TMGa) and trimethylammonium (TMAl) as group 3 sources, arsine (AsH.sub.3) and phosphine (PH.sub.3) as group 5 sources, and disilane (Si.sub.2H.sub.6) gas and cyclopentadienylmagnesium (Cp.sub.2Mg) as n-doping and p-doping sources. Hydrogen H.sub.2 is used as a carrier gas of all sources.

[0084] A lower electrode 110 is provided on the bottom surface of the substrate 120, and a lower n-DBR 130, in which an AlGaAs layer of high refractive index and an AlGaAs layer of low refractive index are repeatedly stacked in pairs, is provided on the top of the substrate 120. An Al.sub.0.85Ga0.sub.0.15As layer and an Al.sub.0.15Ga.sub.0.85As layer are repeatedly stacked 40 times.

[0085] An active layer 140 is provided on the lower DBR 130. The active layer 140 is configured of upper and lower confinement layers and a quantum well structure which emits a center wavelength of 860 nm. Al.sub.xGa.sub.1-xAs (n-Al.sub.0.1GaAs:Si and p-Al.sub.0.1GaAs:Mg) is used as n- and p-confinement layers, and the quantum well structure is configured by repeatedly stacking a 5 nm GaAs quantum well and a 12 nm Al.sub.0.05GaAs quantum barrier. The cavity length configured by the confinement layers and the quantum well is about 430 nm.

[0086] An upper p-DBR 150 including an oxide layer 180 is provided on the active layer 140. The oxide layer 180 is inserted between the layers of the pairs configuring the p-DBR 150 and may avoid direct contact with the active layer 140 to avoid damage of the active layer in the oxidization process. The oxide layer 180 is stacked on one or two pairs, among the 25 pairs, of the upper DBR, and the other pairs of the upper DBR are stacked on the oxide layer 180. Accordingly, the upper DBR 150 is configured of a first upper DBR 151 positioning on the bottom of the oxide layer 180 and a second upper DBR 152 positioning on the top of the oxide layer 180.

[0087] The upper p-DBR 150 includes an AlGaAs layer of high refractive index and an AlGaAs layer of low refractive index repeatedly stacked in pairs in the same way as the lower DBR and is configured of 25 pairs of Al.sub.0.85Ga.sub.0.15As layer and Al.sub.0.15Ga.sub.0.85As layer.

[0088] The oxide layer 180 includes a circular current window (oxidation aperture) 181 configured of Al.sub.0.98Ga.sub.0.02As having a thickness of about 50 nm at the center portion, and an oxide ring 182 of the periphery, which is formed by oxidizing the oxide layer using steam. The DBR reflectivity shows the excellent characteristic of a stop-band shape almost at 98%.

[0089] A GaP current diffusion layer 160 is grown to a thickness of 2 m on the upper p-DBR 140 in a MOCVD method. A high doping region 161 is formed at the center portion of the top surface and in a portion of the periphery of the. AlGaAs current diffusion layer 160.

[0090] To form the high doping region 161, as shown in FIG. 4, (a) A pattern-controlled ZnO film 210 for supply of dopants and having a thickness of 5,500 nm (500 nm?) is stacked on the center portion of the top surface of the p-AlGaAs current diffusion layer 160. (b) The high doping region 161 is formed at the center portion of the top surface of the current diffusion layer 160 through heat treatment for 30 minutes at a temperature of 500 C., 600 C. and 700 C. (c) After the heat. treatment, the ZnO film is removed using HCl:DI solution. (d) After the ZnO film is removed, an upper electrode 170 of a ring shape is formed. The inner side of the upper electrode is formed to be partially overlapped with the high doping region 161.

[0091] As a result of photographing the cross-sectional SEM, it is confirmed that the doping unit is formed as deep as about 1 m from the top surface as shown in FIG. 5.

Comparative Embodiment 1

[0092] Comparative embodiment 1 is embodied to be the same as the embodiment described above, except that there is no Zn doping.

Test 1

[0093] Inspection has been performed on the products of the embodiment manufactured through heat treatment for Zn doping at a temperature of 500 C., 600 C. and 700 C. and on the product of the comparative embodiment (P++ AlGaAs) without having a Zn doping process.

[0094] As shown in. FIG. 6, a resistance of 0.043 ohm-cm is shown in the comparative embodiment without having a Zn doping process, and this is considerably high compared with 0.033 and 0.012 ohm-cm of the products doped at 500 C. and 600 C. The product doped at 700 C. shows a high resistance of 0.98 ohm-cm. These results correspond to increase of the hole concentration, which is in a trade-off relation with the resistance, from 6.410.sup.18/cm.sup.3 of the comparative embodiment to 6.810.sup.18/cm.sup.3 and 9.310.sup.18/cm.sup.3 through heat treatment at 500 C. and 600 C., and abrupt decrease to 5.510.sup.18/cm.sup.3 at 700 C.

[0095] The doping curves of FIG. 7 show that the non-doping p++-AlGaAs current diffusion layer has concentration of 7.010.sup.18/cm.sup.3 only on the surface and has almost uniform concentration of 6.110.sup.18/cm.sup.3 at the other part. The maximum doping concentration of the P++ AlGaAs current diffusion layer is formed at a depth of 0.07 m. Contrarily, the Zn-diffused AlGaAs current diffusion layer shows high doping concentration of 1.0210.sup.19/cm.sup.3 and 9.010.sup.18/cm.sup.3 resulting from the heat treatment of 500 C. and 600 C., respectively. A product from the heat treatment of 700 C. shows a low doping concentration of 6.710.sup.18/cm.sup.3 and is analyzed as a defect caused by recrystallization or non-crystallization.

[0096] The inserted figures (AFM images) show that the surfaces of the non-doped product and the products obtained from 500 C. and 600 C. heat treatment are as smooth as to have a surface RMS value of 4.8 to 6.8, whereas the product of 700 C. heat treatment has an RMS value of 22.3, showing an uneven surface morphology. This implies many surface defects.

[0097] FIG. 8 is a graph showing output power as a function of current (I) of a manufactured VCSEL chip. When manufactured VCSEL chips are doped with Zn at 500 C. and 600 C., they show meaningfully high output power compared to that of a non-doped VCSEL chip. Output powers of 95 mW and 110 mW are generated from the products doped at 500 C. and 600 C., and this is an increase of 47% and 27% compared to 75 mW of the non-doped product.

[0098] FIG. 9 shows far-field pattern lighting beam images of a Zn non-doped product of the comparative embodiment and a product of an embodiment doped with Zn at 600 C. The result is measured using a beam profiler system while maintaining the distance between a beam detector and a light pole to be 5 mm within a current injection range of 10 to 30 mA. The beam Gaussian curves of the chip of the comparative embodiment show different shapes and intensities on the x and y axes when the equal current is injected. The inserted figure of FIG. 9 shows the shapes of emitting an unbalanced 2D beam and a wide 3D beam. Contrarily, the beam Gaussian curves of the chip of the embodiment show the shape of a meaningfully balanced 2D beam on the x and y axes when the equal current is injected and show the shape of a sharp 3D beam.

Embodiment 2

[0099] As shown in FIG. 14, the layer structure of an oxidized VCSEL 100 having a peak wavelength of 860 nm according of the present invention is the same as FIG. 3 of embodiment 1, except that a GaP layer is used as the current diffusion layer 160 and a SiN reflection prevention layer 190 is additionally formed at the inner area of the upper electrode 170.

[0100] The high doping region 161 is formed as shown in FIG. 5. (a) An aluminum zinc oxide (AZO) film 210 for supply of dopants and having a thickness of 500 nm is stacked on the center portion of the top surface of the GaP current diffusion layer 160. (b) The high doping region 161 is formed at the center of the top surface of the current diffusion layer 160 through heat treatment for 2 hours at a temperature of 400 C., 450 C. and 500 C. in a furnace of a nitrogen atmosphere. (c) After the heat treatment, the AZO film is removed using HCl:DI solution. (d) After the AZO film is removed, an upper electrode 170 of a ring shape is formed. The inner side of the upper electrode is formed to be partially overlapped with the high doping region 161. The SiN reflection prevention layer 190 is formed in the inner area of the upper electrode 170.

Comparative Embodiment 2

[0101] Comparative embodiment 2 is embodied to be the same as the embodiment described above, except that there is no Zn doping.

Test 2

[0102] Inspection has been performed on the products of embodiment 2 manufactured through heat treatment for Zn doping at a temperature of 400 C., 450 C. and 500 C. and on the product of comparative embodiment 2 (P++ AlGaAs) without having a Zn doping process. A doping concentration profile of the Zn diffused GaP area after the heat treatment process is shown in FIG. 10. It is sample etched current voltage (ECV) data according to the heat treatment conditions of 400 C., 450 C. and 500 C. acted as an important variable when the Zn diffusion is progressed. The ECV measurement confirms doping concentration by etching as deep as about 4 m into the sample from the surface thereof, and in the case of a general sample to which the Zn diffusion process is not applied, it is confirmed that the maximum doping concentration has a value of about 8.210.sup.18 per cm.sup.3. When the Zn diffusion is progressed, large values of about 9.110.sup.18 and 1.210.sup.19 of considerably increased doping concentration are confirmed under the heat treatment condition of 400 C. and 450 C. However, a phenomenon of greatly decreasing the doping concentration is conformed under the heat treatment condition of about 500 C. It is determined that this phenomenon is caused by non-crystallization of GaP according to high temperature and occurrence of defects according thereto.

[0103] FIG. 11 is a graph showing output power as a function of current (I) of a manufactured VCSEL chip. It shows optical efficiency of a non-doped VCSEL according to application of current (comparative embodiment 2) and a VCSEL that is highly doped through Zn diffusion. In the case of the comparative embodiment, the VCSEL has optical efficiency of about 78 mW. Contrarily, embodiment 2 shows that the efficiency is greatly increased when a Zn diffused doping unit is applied. When Zn diffusion of 400 C. and 450 C. is applied, the maximum optical efficiency shows high efficiency of 96 mW (24% increase) and 110 mW (42% increase). However, when Zn diffusion of about 500 C. is applied, the optical efficiency abruptly decreases and shows a small value of about 60 mW (22% decrease). Such a result of the optical efficiency corresponds to the result and tendency of the ECV of FIG. 10.

[0104] FIG. 12 shows two-dimensional and three-dimensional images of a lighting beam of a general VCSEL (conventional VCSEL) of comparative embodiment 2 and a lighting beam of a VCSEL Zn-diffused at 450 C., measured by a beam profiler. Intensity of light on the x axis and y axis is measured at a distance of about 5 mm at about 30 mA. In the case of the two-dimensional image, it is confirmed that the Zn diffused VCSEL has a beam shape smaller than that of the conventional VCSEL, and when this is confirmed three-dimensionally, it is confirmed that the lighting beam has a more clearly concentrated light shape. It is confirmed that the lighting beam of the VCSEL is concentrated further more by the high doping region of the surface diffused by Zn.

[0105] According to the present invention, there is provided a new current diffusion layer which can protect the upper DBR in the oxidizing process, improve flow of current, and facilitate diffusion of current from a peripheral electrode to the current window of the center portion.

[0106] Although the present invention has been illustrated and described in detail in the drawings and above descriptions, it is regarded that the illustrations and descriptions are illustrative or exemplary and not restrictive. Other changes will be clear to those skilled in the art from the present invention. These changes may be accompanied with other features that can be used instead of or in addition to the features known in this field and described in this specification. Modifications of the disclosed embodiments may be understood and affected by those skilled in the art from the learning of the drawings, the present invention and the attached claims. In the claims, the term include does not exclude other elements or steps, and description of an indefinite article does not exclude a plurality of elements or steps. The fact that specific measures are cited in dependent claims different from each other does not indicate that combinations of these measures cannot be used advantageously. In the claims, arbitrary reference symbols should not be interpreted as limiting the scope thereof.