Photonic chip with integrated collimation structure
10690848 · 2020-06-23
Assignee
Inventors
Cpc classification
G02B6/305
PHYSICS
International classification
Abstract
The present disclosure relates to shaping of optic beams at the inputs/outputs of a photonic chip, the spectral widening of the light coupled to this chip, and a method for manufacturing the chip. The photonic chip includes a light guiding layer supported by a substrate. The chip includes at least one light guiding structure made of silicon coupled on one side to a vertical coupler and on another side to an optical component integrated in the light guiding layer. The photonic chip has a front face on the vertical coupler side and a rear face on the substrate side. A collimation structure of digital lens type is integrated at the level of the rear face to collimate the mode size of the light beam incident on the lens and coming from the vertical coupler.
Claims
1. A photonic chip including: a light guiding layer supported by a substrate, a front face on the light guiding layer side, a rear face on the substrate side, a lens integrated at the level of the rear face, a light guiding structure in the light guiding layer, and a vertical coupler in the light guiding layer, wherein the light guiding structure is optically coupled to the vertical coupler, wherein the vertical coupler is configured to receive/transfer light from/to the light guiding structure and form/receive a light beam in the direction of/from the lens, wherein the lens includes a plurality of trenches made in the rear face, the trenches delineating a two-dimensional array of posts and each post having, in a direction orthogonal to the front and rear faces, an invariable thickness, wherein the substrate has a thickness Th and a refractive index n10, the light beam forms an angle 2 with an axis perpendicular to the front and rear faces, the light has a wavelength , the light beam formed/received by the vertical coupler has a mode size Do=2.wo and the two-dimensional array of posts has a characteristic dimension greater than or equal to Th2/(. wocos 2. n10).
2. The photonic chip according to claim 1, in which the two-dimensional array of posts includes elementary cells repeating periodically according to a period P, each elementary cell including a post and the dimensions of the posts being modulated from one elementary cell to the next, the period P being preferably less than /2.
3. The photonic chip according to claim 1, in which the lens has a centre and a median axis orthogonal to the front and rear faces passing through its centre, the median axis of the lens and an axis orthogonal to the front and rear faces passing through the centre of the vertical coupler being offset by a distance Th*tan 2.
4. The photonic chip according to claim 3, in which the lens has a circular symmetry around its median axis, the posts equidistant from the median axis being of identical size.
5. The photonic chip according to claim 3, in which the lens has a circular symmetry around the axis orthogonal to the front and rear faces passing through the centre of the vertical coupler, the posts equidistant from said orthogonal axis being of identical size.
6. The photonic chip according to claim 3, in which the lens has a circular symmetry around an axis of symmetry orthogonal to the front and rear faces, the axis of symmetry passing in the plane of the lens at a point situated between the centre of the lens and the projection of the centre of the vertical coupler, the posts equidistant from the axis of symmetry being of identical size.
7. The photonic chip according to claim 1, in which the posts are parallelepipedic or cylindrical.
8. The photonic chip according to claim 1, in which the lens is a Fresnel lens.
9. The photonic chip according to claim 1, in which the lens is reflective.
10. The photonic chip according to claim 1, in which the vertical coupler is a tilted facet waveguide or a surface grating coupler.
11. The photonic chip according to claim 10, in which the surface grating coupler is conformed to receive/transfer light from/to the light guiding structure and form/receive a light beam of mode size less than 12 min the direction of/from the lens.
12. A method of manufacturing a photonic chip which includes a light guiding layer supported by a substrate, a front face and a rear face on the substrate side, the method including forming a lens on the rear face and forming, in the light guiding layer, of a light guiding structure and a vertical coupler configured to receive light from the light guiding structure and to form a light beam directed to the lens, wherein forming the lens includes etching of a plurality of trenches in the rear face, the trenches delineating a two-dimensional array of posts and each post having, in a direction orthogonal to the front and rear faces, an invariable thickness, wherein the lens has a centre and a median axis orthogonal to the front and rear faces passing through its centre, the median axis of the lens and an axis orthogonal to the front and rear faces passing through the centre of the vertical coupler being offset by a distance Th*tan 2, and wherein 2 is an angle that the light beam forms with an axis perpendicular to the front and rear faces.
13. A method of manufacturing a photonic chip which includes a light guiding layer supported by a substrate, a front face and a rear face on the substrate side, the method including forming a lens on the rear face and forming, in the light guiding layer, of a light guiding structure and a vertical coupler configured to receive light from the light guiding structure and to form a light beam directed to the lens, wherein forming the lens includes etching of a plurality of trenches in the rear face, the trenches delineating a two-dimensional array of posts and each post having, in a direction orthogonal to the front and rear faces, an invariable thickness, the two-dimensional array of posts having a characteristic dimension greater than or equal to Th2/(. wocos 2. n10), with Th the thickness of the substrate, n10 the refractive index of the substrate, 2 an angle that the light beam forms with an axis perpendicular to the front and rear faces, the wavelength of the light beam and Do=2. wo a mode size of the light beam formed/received by the vertical coupler has a mode size.
14. A photonic chip comprising: a light guiding layer supported by a substrate, a front face on the light guiding layer side, a rear face on the substrate side, a lens integrated at the level of the rear face, a light guiding structure in the light guiding layer, and a vertical coupler in the light guiding layer, wherein the light guiding structure is optically coupled to the vertical coupler, wherein the vertical coupler is configured to receive/transfer light from/to the light guiding structure and to form/receive a light beam in the direction of/from the lens, wherein the lens includes a plurality of trenches made in the rear face, the trenches delineating a two-dimensional array of posts and each post having, in a direction orthogonal to the front and rear faces, an invariable thickness, wherein the lens has a centre and a median axis orthogonal to the front and rear faces passing through its centre, the median axis of the lens and an axis orthogonal to the front and rear faces passing through the centre of the vertical coupler being offset by a distance Th*tan 2, and wherein 2 is an angle that the light beam forms with an axis perpendicular to the front and rear faces.
15. The photonic chip according to claim 14, in which the lens has a circular symmetry around its median axis, the posts equidistant from the median axis being of identical size.
16. The photonic chip according to claim 14, in which the lens has a circular symmetry around the axis orthogonal to the front and rear faces passing through the centre of the vertical coupler, the posts equidistant from said orthogonal axis being of identical size.
17. The photonic chip according to claim 14, in which the lens has a circular symmetry around an axis of symmetry orthogonal to the front and rear faces, the axis of symmetry passing in the plane of the lens at a point situated between the centre of the lens and the projection of the centre of the vertical coupler, the posts equidistant from the axis of symmetry being of identical size.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Other aspects, aims, advantages and characteristics of the invention will become clear from reading the detailed description according to the preferred embodiments thereof, given by way of example and non-limiting, and made with reference to the appended drawings in which:
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DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS
(16) The invention pertains to a photonic chip being able to supply (respectively receive) at the output (respectively at the input) of the photonic chip a collimated optic beam, of preferentially expanded mode size.
(17) The chip comprises a substrate, for example a substrate made of silicon, InP or AsGa. With reference to
(18) The photonic chip 1, 2 may integrate one or more optical components CO, active or passive. The light guiding layer 12 includes a light guiding structure 121 made of silicon optically coupled, on the one hand, to the component(s) CO and, on the other hand, to a vertical coupler 122 in the light guiding layer. CO may be an assembly of components: for example a laser+a modulator, coupled to 121, then 122. The chip may comprise a plurality of CO, 121, 122, 15.
(19) The optical component CO may be a photodetector made of germanium material embedded in the layer 12. In this case, the photonic chip may be a receiver intended to receive an optic beam of which it is wished to detect the intensity on the photodetector CO.
(20) The optical component CO may also be a hybrid laser with III-V semiconductors on silicon which includes a gain structure made of III-V materials on the interface layer 13, or directly in contact with the light guiding layer 12. The gain structure includes for example a stack of layers of III-V materials and two electrodes for forming electrical contacts on the gain structure. The laser LA may be encapsulated in a second encapsulation layer 14, for example made of silicon oxide, silicon nitride or a mixture of silicon oxide and silicon nitride, or in a BCB type polymer. The photonic chip thus has a front face F1 on the second encapsulation layer side 14 and a rear face F2 on the substrate side 10.
(21) Within the scope of the invention, the vertical coupler 122 is configured to receive light from the light guiding structure 121 and to form therefrom a light beam directed to the rear face F2 of the photonic chip. This configuration of the vertical coupler 122 thus enables light to traverse the entire thickness of the substrate 10. The vertical coupler 122 is for example a surface grating coupler or a tilted facet waveguide. For a surface grating coupler, the mode size Do is 9.2 m, adapted to the mode size of a single-mode fibre. For a silicon tilted facet waveguide, the mode size Do is typically 3 m.
(22) The photonic chip 1, 2 further comprises a collimation structure of lens type 15 integrated at the level of the rear face F2. The vertical coupler 122 is configured to direct the light beam to the collimation structure 15 integrated at the level of the rear face F2. The collimation structure 15 is configured to collimate a light beam incident on said structure from the vertical coupler 122, the focal point of the collimation structure 15 corresponding to the centre of the vertical coupler 122, and to expand the mode size of this beam to an expanded mode size Di after crossing the substrate.
(23) In a preferential alternative embodiment of the invention making it possible to obtain a photonic chip with inputs/outputs of collimated light beams not only with expanded mode size but also with expanded spectral band, the vertical coupler 122 is a surface grating coupler designed to be adapted to a reduced mode size (for example 3 m) compared to that of a single-mode fibre (typically 9.2 m). In this alternative, the surface grating coupler is thereby conformed to receive/transfer light guided from/to the light guiding structure 121 and to form/receive a light beam of mode size less than 6 m in the direction of/from the collimation structure.
(24) It should be noted that such a design of the grating coupler is not exclusive of the chip according to the invention with rear face integrated collimation structure, but may find application in any photonic chip where such a coupler receives/transfers light guided from/to a waveguide to form/receive a collimated light beam with mode size that is reduced, equal or expanded, notably in a photonic chip with collimation structure integrated or assembled on the front or rear face, and more specifically in a photonic chip integrating one or more components such as hybrid lasers on silicon, modulators, photodetectors, or a chip carrying out a wavelength multiplexing/demultiplexing for which a wide spectral band is necessary.
(25) The following equation illustrates the dependence of the angle of emission of light by a surface grating coupler with the wavelength of the light:
(26)
where n.sub.11 is the index of the dielectric layer 11, n.sub.eff is the effective index of the light guiding layer 12 and is the pitch of the array. By deriving this equation with respect to , the following equation is obtained:
(27)
(28) By reducing the mode size Do=2*w.sub.o of the beam at the input/output of the surface grating coupler and in the direction of/from the collimation structure, the numerical aperture NA is increased, and thus the angle of the light beam at the output of the array:
(29)
An expanded angle contains more wavelengths in phase condition. By arranging a suitable lens opposite this array, the spectral band of the surface grating coupler/lens system is considerably expanded. Taking the example of an array with mode size reduced to Do=3 m, the spectral band is thereby expanded to around 100 nm, at the spot where it is only 32 nm for an array with standard mode size of 9.2 m.
(30) A surface grating coupler with reduced mode size physically differs from a standard coupler in that it is shorter (in the direction of light propagation), narrower (orthogonally to the direction of light propagation), and in that the etching depth of the lines of the coupler is greater, as exemplified from an approximate calculation.
(31) TABLE-US-00001 Etching of the coupler Thickness of non- etched Si/thickness of Length of the Width of the Si in the trenches of the Mode size coupler coupler surface grating coupler Standard: 2.wo = ~30 m ~10 m 300 nm/150 nm 9.2 m Reduced: 2.wo = ~10 m ~3 m 300 nm/50 nm or 3 m 300/0 nm
(32) The surface grating coupler may be produced according to other alternatives, but it is physically characterised by a reduced mode size of the beam at its output (Do<6 m) compared to the surface grating coupler known and used in the field (Do=9.2 m).
(33) Opposite this coupler, the light beam traversing a silicon substrate 10 of 775 m thickness is very divergent, but by associating it with the lens 15, it may be collimated, and have a mode size of 120 m (instead of 40 m using a standard grating coupler). The alignment tolerance of this lens with respect to such a surface grating coupler is reduced, going from +/2 m for a surface grating coupler of standard mode size of 9.2 m to +/0.5 m for a surface grating coupler of mode size of 3 m. But such a reduced alignment tolerance can be attained since the alignment is realised in lithography.
(34) The photonic chip with rear face integrated collimation structure may be intended to be optically coupled to another external device arranged opposite the chip, for example a photonic chip, a device including one or more optic fibres, this device comprising at least one optic input and/or one output of mode size equivalent to the output of the collimation structure 15 integrated in the chip 1, 2. In the case of a coupling with single-mode fibres, they are for example for the external device so-called expanded beam connectors making it possible to go from a mode size of 9.2 m (that of single-mode fibres) to a mode size expanded to 50-500 m.
(35) The photonic chip with rear face integrated collimation structure may also be used to emit in a medium when it integrates a laser, for example for LIDAR (Light Detection and Ranging) applications, or receive in a medium a non-guided light. In the latter case, the coupler 122 is coupled to the waveguide 121, itself coupled to a photodetector accommodated in the layer 12.
(36) Fresnel losses are observed during the crossing of the interface between the layer 11 and the substrate 10: they are 0.8 dB with a SiO.sub.2 layer 11 and a silicon substrate 10. In order to limit these losses, in a possible alternative of the invention, an antireflective layer (for example a silicon nitride layer, of thickness /4 where corresponds at the wavelength of the light beam) is arranged between the layer 11 and the substrate 10. It is also possible to adopt for material of the layer 11 not SiO.sub.2 but a silicon nitride or a stack of a sub-layer of SiO.sub.2 and a silicon nitride sub-layer. The losses during the crossing of the interface between the layer 11 and the substrate 10 are thus below 0.5 dB at the wavelength 1.31 m.
(37) In a first embodiment represented in
(38) In a second embodiment represented in
(39) The reflective lens 15, 16 of
(40) The so-called digital lenses used in the invention which may be manufactured by means of standard manufacturing steps (lithography/etching) giving rise to digital structurings (cf.
(41) With reference to
(42) The thickness of the patterns is typically defined by an etching depth of the trenches. The patterns are constituted of the material of the substrate. Alternatively, or as a complement, they may be constituted of the material of an additional layer transferred onto the rear face of the substrate. This additional layer is for example made of deposited amorphous silicon or crystalline silicon, or any other material with high index in contrast with that of air or of the material that fills the trenches.
(43) With reference to
(44) As represented in
(45) The refractive index of the trenches T1-T4 is less than the refractive index of the patterns. In this way, the lens forms a refractive index pseudo-gradient structure able to collimate to the exterior an incident curved wave front from the vertical coupler 122 (and vice-versa to generate a curved phase shift of an incident flat wave front from the exterior). More specifically, the patterns are formed in a core material of refractive index nc, and the trenches are left in air or filled with a filling material of refractive index nr less than the refractive index nc of the core material, for example made of SiO.sub.2. The difference between the refractive indices of the core and the trenches is preferably at least equal to 0.2.
(46) Index pseudo-gradient is taken to mean within the scope of the invention that the digital lens does not comprise a true variation profile of refractive index of the core material as is the case of so-called graded-index structures, but that it has the same properties. Thus, during its passage in the digital lens, the light encounters the equivalent of an analogue lens.
(47) The trenches may be arranged periodically, the width of the trenches separating two contiguous patterns being modulated from one trench to the next. In this way, the material fill factor of the core layer (which defines the local refractive index) changes along the lens.
(48) Taking the example of a matrix array of cylindrical posts (cf.
(49) In an embodiment that will be detailed hereafter, the lens 15 is configured to extract the light traversing it from the vertical coupler 122 along the normal to the rear face F2 of the chip.
(50)
(51)
(52)
(53)
(54) It is obviously possible to extract a non-vertical collimated beam (20) without uprighting it: a collimation structure of circular symmetry with respect to its median axis is then used, its centre C15 being offset by X=Thtan 2 with respect to the orthogonal projection, Opv, of the centre of the vertical coupler C122 on the plane x,y of the collimation structure, as represented in
(55) In
(56) In
(57) In
(58) The collimation structure is configured to generate a curved phase shift of an incident flat wave front from the exterior of the chip, a phase shift such that the rays are, after crossing the collimation structure, all in phase at the focal point of the collimation structure, the focal point being the vertical coupler (assimilated with a point opposite the thickness Th of the substrate 10). Vice versa, the collimation structure generates a flat wave front from a divergent beam coming from the vertical coupler.
(59) The diameter of the posts is calculated according to the methodology described below. The patterns are considered as cylindrical, made of silicon material of index n.sub.Si, of thickness h, of diameter Wsi. These posts are considered to be encapsulated in SiO.sub.2 of index n.sub.SiO2.
(60) In the example of
(61)
(62) Thus
(63)
where (x, y) represents the mean index of the lens at the position (x,y), linked to the silicon fill factor, h the thickness of the silicon patterns, F corresponds to the thickness Th of the substrate (for example 775 m for a SOI substrate of 300 mm diameter), the central wavelength of the light beam and n.sub.0 the index of the material composing the substrate 10.
(64) The mean index (x) is linked to the silicon fill factor f.sub.Si(x), by:
(x)={square root over (f.sub.Si(x)*n.sub.Si.sup.2+(1f.sub.Si(x))*n.sub.SiO.sub.
(65) The evolution of the silicon fill factor is deduced therefrom:
(66)
(67) If it is considered that the collimation structure is similar to a pseudoperiodic array, of pseudoperiod P (position of the centres of the posts) and of which the variable diameter of the posts W.sub.Si(x, y), the patterns have a diameter defined according to a series W.sub.Si(n, p), verifying, for n[N;N] and p[N;N]:
(68)
(69) In the example of
(70)
(71) Knowing that:
(72)
(73) It may be deduced therefrom that:
(74)
(75) If it is considered that the collimation structure is similar to a pseudoperiodic array, of pseudoperiod P (position of the centres of the posts) and of which the variable diameter of the posts W.sub.Si(x, y), the patterns have a diameter defined according to a series W.sub.Si(n, p), verifying, for n[N;N] and p[N;N]:
(76)
(77) For a collimation structure without uprighting, it is the central pattern of the collimation structure that has the greatest width, thus it is possible to fix:
W.sub.Si(0)=Pcd_minEquation (NR),
(78) with cd_min the minimum width of a trench technically realisable by etching. Such a collimation structure has a circular symmetry around the median axis of the lens Am, defined as the axis perpendicular to (x,y) and which passes through the mid-point C15 of the collimation structure. Thus the posts equidistant from the median axis have an identical diameter (cf.
(79) In the case of a vertical coupler 122 of surface grating coupler type such that 20 and a collimation structure making it possible to ensure the uprighting of the beam (that is to say, at the output of 15, an angle of the beam =0), it is possible to find the position of the largest pattern by deriving the equation (2) with respect to n: it is the pattern of abscissa X that is the largest (the one directly in line with the focal point C122). This collimation structure then has a circular symmetry around the axis Ad, perpendicular to the plane (x,y) and passing through the point Opv, Opv being the orthogonal projection of C122 on the plane (x,y) of the collimation structure 15 (
(80) For this collimation structure of circular symmetry around an axis Ad offset with respect to the median axis Am, the equations may be rewritten, not as a function of W.sub.Si(0), but as a function of W.sub.Si(X):
(81)
(82) When X<D/2 with D the width of the collimation structure along the axis x, the biggest pattern is that of the abscissa X: W.sub.Si-max=W.sub.Si(X)=Pcd_min.
(83) It may be deduced therefrom that:
(84)
(85) It is also possible to determine the minimum diameter W.sub.Si-min of a pattern, which is the diameter of the pattern the furthest away from the abscissa X. This gives:
(86)
(87) This latter equation makes it possible to determine the minimum etching thickness h making it possible to design a technically realisable collimation structure, that is to say not exceeding cd_min and Pcd_min in diameter of patterns, for a given width of lens D along the axis x:
(88)
(89) Conversely, if X>D/2, then the largest pattern is that which is the closest to the abscissa X. Taking the case X>0 where the largest pattern is that of index N (for X<0, it suffices to turn over the collimation structure). The equations with respect to this pattern of index N are re-written:
(90)
This gives in the end:
(91)
(92) By imposing the greatest dimension on the pattern of index N, this gives:
(93)
(94) The post of smallest dimension is then of index (N,N):
(95)
(96) Which gives the value of h in this case:
(97)
(98) The procedure for designing the collimation structure may be the following: 1) Given P and cd_min, the necessary thickness of the collimation structure is determined according to the equations (3bis) or (4bis), depending on whether X<D/2 or X>D/2. 2) With the thickness h found previously, the exact profile of the collimation structure according to the equations (3) or (4) is then deduced therefrom, depending on whether X<D/2 or X>D/2. From the calculation developed previously, the calculation of parallelepiped (and no longer cylindrical) posts is obvious.
(99) In an alternative embodiment, the collimation structure does not form the equivalent of a simple lens but the equivalent of a Fresnel lens. According to this approach, a lower thickness h is imposed, and higher gradients of index are allowed to compensate this low thickness, these gradients being repeated by modulo-2 phases to cover the entire width of the collimation structure. According to this approach:
(100)
(101) The term m makes it possible to add an increment to the width to avoid it dropping below cd_min. However, this increment must not make the width pass beyond Pcd_min to have the modulo-2 phase, or below cd_min respectively. This imposes constraints on the minimum thickness of the Fresnel lens hmin, so that it can be technically realisable. Let it be assumed that one of the patterns has a width of cd_min (lower limit). This pattern has an index (n, p) that verifies:
(102)
(103) It is necessary that an addition of /h in the square of the right term generates a width less than Pcd_min in the equation (5), i.e.:
(104)
(105) It is deduced therefrom that there is a constraint between the wavelength and the thickness, for a given technology (P, cdmin), in order that the Fresnel lens can be realised.
(106)
(107) hmin thus corresponds to the 2.sup.nd root of the afferent equation of 2.sup.nd degree, i.e.:
(108)
(109) The period P cannot exceed /2 so that the structuring behaves like a medium of mean index. By imposing this constraint, it is possible to simplify the expression (6), and end up with:
(110)
(111) In
(112) An example of dimensioning of the collimation structure of the chip 1 of
(113) With the preceding equations, the minimum thickness of the patterns of the collimation structure is calculated in the case where it is of the simple lens type or of the Fresnel lens type. In the digital application retained, the minimum thickness is around 1.5 m for the case of a Fresnel lens and several m for the case of a simple lens. Then the diameters of the patterns to etch to form the collimation structure are calculated by considering W.sub.Si-min=0.08 m. In the case of the chip 3 where the collimation structure 15 is coupled to a mirror 16, the thickness h of the posts is divided by 2.
(114) Still with reference to
(115) In this
(116) In
(117) In
(118) In the embodiment represented in
(119) The fact of extracting, thanks to the invention, a collimated beam of expanded size makes it possible to increase the alignment tolerance of the chip with an optical-mechanical interface part laid on one face of the chip. But the reception angular tolerance is reduced. By uprighting the beam so that it has an angle of 90 with the rear face of the chip, coupling with the interface part is facilitated. Thus the part may be laid on the flat surface of the chip, in a manner rigorously perpendicular thereto. The problem of angular sensitivity of alignment is thereby completely resolved, since the optical-mechanical part, in contact with the rear face F2 of the chip, is rigorously perpendicular to the chip, without possible angular gap.
(120) In
(121) A possible dimensioning of the lens 15 and of the vertical coupler 122 of
(122) The system integrated in the chip {surface grating coupler with reduced mode size, highly divergent, and digital lens on the rear face} thus makes it possible to provide a beam with mode size expanded by a factor 10 compared to the prior art, collimated, uprighted and with expanded spectral band. This system thus bypasses the drawbacks of the prior art linked to surface grating couplers (non-zero angle with the vertical, low alignment tolerance with a fibre, reduced spectral band).
(123) In an alternative embodiment of the collimation structure associated with
(124) A possible dimensioning of the lens 15 and the surface grating coupler 122 of
(125) At the output of the grating coupler the divergent beam also forms a non-zero angle 2 with the vertical (in this example, equal to 4 in the silicon substrate 10). The centre of the lens C15 has to be offset with respect to the orthogonal projection Opv of the centre of the surface grating coupler 122 of around tan (2)Th=14 m. With the digital lens, it is possible to upright the beam so that it is perpendicular to the plane of the chip at the output of the lens.
(126) In this context, the hypothesis will still be taken of cylindrical silicon patterns repeated at a period P=0.5 m. The patterns have a minimum diameter cd min=0.12 m and maximum of Pcd min=0.50.12 m=0.380 m, and are encapsulated in air. The minimum thickness to etch is calculated at around 1.3 m.
(127) An example is described hereafter of a method for producing a photonic chip conforming to the invention and more specifically a chip according to the second embodiment represented in
(128) The next step (
(129) A silicon substrate 10 (which may be covered with an antireflective layer, which after bonding is interposed between the substrate and the encapsulation layer 11), is transferred and next bonded (
(130) The next step (
(131) The next step is the formation of vias through the substrate 10, for example by laser etching, and filling these vias with a metal to form electrical interconnection vias 125 which, connected to those 124 present in the layer 11, make it possible to connect the active photonic components (such as the modulator 123) to an electronic chip. The next step is the turning over of the wafer and the removal of the silicon substrate 30 (
(132) The invention is not limited to the photonic chip, but also extends to its method of manufacture, and notably to a method for manufacturing several chips collectively on a same wafer. This method includes the formation of the collimation structure at the level of the rear face of the chip and of the vertical coupler configured to receive light from the light guiding structure and to form a light beam directed to the collimation structure.
(133) The invention also extends to a system including the photonic chip according to the invention and an external device provided with a collimation structure of which the mode size is adapted to that of the light beam in input/output of the photonic chip and which is intended to re-converge the beam on a single-mode fibre for example.
(134) The invention also relates to such a photonic chip which can integrate one or more hybrid lasers, such as lasers having a gain medium made of III-V semiconductor materials on a silicon substrate. This photonic chip is intended to supply a comb of wavelengths emitted by the plurality of lasers to another photonic chip not including lasers (cf.