Package structure with protrusion structure
10692828 ยท 2020-06-23
Assignee
Inventors
Cpc classification
H01L2224/73204
ELECTRICITY
H01L2224/0401
ELECTRICITY
H01L2224/13076
ELECTRICITY
H01L2224/12105
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L24/20
ELECTRICITY
H01L2224/73204
ELECTRICITY
H01L2225/06513
ELECTRICITY
H01L2224/0345
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L24/04
ELECTRICITY
H01L23/49816
ELECTRICITY
H01L2224/05008
ELECTRICITY
H01L2224/32225
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L2224/02371
ELECTRICITY
H01L2224/92125
ELECTRICITY
H01L2924/00
ELECTRICITY
H01L23/49827
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2224/16238
ELECTRICITY
H01L25/50
ELECTRICITY
H01L2225/1041
ELECTRICITY
H01L2224/16225
ELECTRICITY
H01L23/5389
ELECTRICITY
H01L2924/00014
ELECTRICITY
H01L2924/00012
ELECTRICITY
H01L24/19
ELECTRICITY
H01L2224/16225
ELECTRICITY
H01L2225/1058
ELECTRICITY
H01L2224/0345
ELECTRICITY
H01L2224/04105
ELECTRICITY
H01L2224/14131
ELECTRICITY
H01L23/49811
ELECTRICITY
H01L2224/05569
ELECTRICITY
H01L2225/1035
ELECTRICITY
H01L2224/92244
ELECTRICITY
H01L24/73
ELECTRICITY
International classification
H01L25/00
ELECTRICITY
H01L23/538
ELECTRICITY
H01L23/498
ELECTRICITY
Abstract
A package structure is provided. The package structure includes a first under bump metallurgy (UBM) layer formed over a first substrate, a first protrusion structure formed over the first UBM layer, wherein the first protrusion structure extends upward away from the first UBM layer. The package structure includes a first electrical connector formed over the first protrusion structure. The first electrical connector is surrounded by the first protrusion structure, and the first protrusion structure has an outer sidewall surface, and the outer sidewall surface of the first protrusion structure is aligned with an outer surface of the first UBM layer.
Claims
1. A package structure, comprising: a first under bump metallurgy (UBM) layer formed over a first substrate; a first protrusion structure formed over the first UBM layer, wherein the first protrusion structure extends upward away from the first UBM layer; a first electrical connector formed over the first protrusion structure, wherein the first electrical connector is surrounded by the first protrusion structure, and the first protrusion structure has a convex outer surface and a concave inner surface, the convex outer surface of the first protrusion structure is aligned with an outer surface of the first UBM layer, and the convex outer surface and the concave inner surface face toward to a center of the first UBM layer; a second substrate formed over the first electrical connector, wherein the first electrical connector is electrically connected to a conductive pad of the second substrate; a through via structure formed over the first substrate; a second UBM layer formed below the through via structure, wherein the first UBM layer and the second UBM layer are at opposite sides of the through via structure; a second protrusion structure formed below the second UBM layer; and a second electrical connector formed below the second protrusion structure.
2. The package structure as claimed in claim 1, wherein the first protrusion structure has a melting point which is higher than a melting point of the first electrical connector.
3. The package structure as claimed in claim 1, wherein the first protrusion structure has a non-continuous shape when seen from a top view, the non-continuous shape comprises a first portion and a second portion, and the first portion and the second portion are symmetric to a center of the first UBM layer.
4. The package structure as claimed in claim 1, wherein the first protrusion structure has a non-continuous concentric ring shape when seen from a top view, and the non-continuous shape comprises a first non-continuous ring and a second non-continuous ring.
5. The package structure as claimed in claim 1, wherein the second protrusion structure has a non-continuous shape when seen from a top view, the non-continuous shape comprises a first portion and a second portion, and the first portion and the second portion are symmetric to a center of the second UBM layer.
6. The package structure as claimed in claim 1, further comprising: a seed layer formed over the first UBM layer, wherein the seed layer is between the first protrusion structure and the first UBM layer.
7. The package structure as claimed in claim 1, further comprising: a device die formed adjacent to the through via structure.
8. The package structure as claimed in claim 7, wherein the first substrate comprises a first region and a second region, the device die is formed in the first region, and the second protrusion structure is formed in the second region.
9. A package structure, comprising: a through via structure formed over a first substrate, wherein the through via structure has a first side and a second side; a first protrusion structure formed over the first side of the through via structure, wherein the first protruding structure extends upwardly; a first electrical connector formed over the first protrusion structure; a second protrusion structure formed over the second side of the through via structure, wherein the second protruding structure extends downwardly; and a second electrical connector formed below the second protrusion structure.
10. The package structure as claimed in claim 9, wherein the first protrusion structure and the second protrusion structure both are located at diagonal lines of the first substrate when seen from a top view.
11. The package structure as claimed in claim 9, wherein the first protrusion structure has a melting point which is higher than a melting point of the first electrical connector.
12. The package structure as claimed in claim 9, wherein each of the first protrusion structure and the second protrusion structure has a non-continuous concentric ring shape when seen from a top view, the non-continuous concentric ring shape comprises a first non-continuous ring and a second non-continuous ring.
13. The package structure as claimed in claim 9, wherein there is a distance between an outer sidewall surface of the first protrusion structure and an outer sidewall surface of the first electrical connector.
14. The package structure as claimed in claim 9, wherein the first protrusion structure is surrounded by the second protrusion structure.
15. A package structure, comprising: a first device die; an interconnect structure formed over the first device die; a second device die formed over the interconnect structure; a protrusion structure formed adjacent to the second device die, wherein the protrusion structure extends upward away from the interconnect structure; and a first electrical connector formed over the protrusion structure, wherein the protrusion structure is embedded in the first electrical connector.
16. The package structure as claimed in claim 15, further comprising: a second electrical connector formed below the second device die, wherein the first electrical connector has a first size, the second electrical connector has a second size, and the first size is greater than the second size.
17. The package structure as claimed in claim 16, further comprising: an air gap between the first electrical connector and the second electrical connector.
18. The package structure as claimed in claim 15, wherein an outer sidewall surface of the protrusion structure is aligned with an outer surface of the first electrical connector.
19. The package structure as claimed in claim 15, further comprising: a package layer surrounding the first device die; and a through via structure formed in the package layer, wherein the first electrical connector is electrically connected to the through via structure through the interconnect structure.
20. The package structure as claimed in claim 15, wherein the protrusion structure has a non-continuous concentric ring shape when seen from a top view, the non-continuous concentric ring shape comprises a first non-continuous ring and a second non-continuous ring.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, in accordance with the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.
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DETAILED DESCRIPTION
(13) The following disclosure provides many different embodiments, or examples, for implementing different features of the subject matter provided. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
(14) Some variations of the embodiments are described. Throughout the various views and illustrative embodiments, like reference numbers are used to designate like elements. It should be understood that additional operations can be provided before, during, and after the method, and some of the operations described can be replaced or eliminated for other embodiments of the method.
(15) Embodiments for a package structure and method for forming the same are provided.
(16) As shown in
(17) The device elements 104 are formed on substrate 102. The device elements 104 include transistors (e.g., metal oxide semiconductor field effect transistors (MOSFET), complementary metal oxide semiconductor (CMOS) transistors, bipolar junction transistors (BJT), high-voltage transistors, high-frequency transistors, p-channel and/or n channel field effect transistors (PFETs/NFETs), etc.), diodes, and/or other applicable elements. Various processes are performed to form device elements 104, such as deposition, etching, implantation, photolithography, annealing, and/or other applicable processes. In some embodiments, device elements 104 are formed in the substrate 102 in a front-end-of-line (FEOL) process.
(18) The substrate 102 may include various doped regions such as p-type wells or n-type wells). Doped regions may be doped with p-type dopants, such as boron or BF.sub.2, and/or n-type dopants, such as phosphorus (P) or arsenic (As). The doped regions may be formed in or on the substrate 102, in a P-well structure, in an N-well structure, or in a dual-well structure.
(19) The substrate 102 may further include isolation features (not shown), such as shallow trench isolation (STI) features or local oxidation of silicon (LOCOS) features. Isolation features may define and isolate various device elements.
(20) An inter-metal dielectric (IMD) layer 120 is formed over the ILD layer 110. The IMD layer 120 is made of silicon oxide (SiOx), silicon nitride (SixNy), silicon oxynitride (SiON), dielectric material(s) with low dielectric constant (low-k), or combinations thereof. In some embodiments, the IMD layer 120 is made of an extreme low-k (ELK) dielectric material with a dielectric constant (k) less than about 2.5. In some embodiments, ELK dielectric materials include carbon doped silicon oxide, amorphous fluorinated carbon, parylene, bis-benzocyclobutenes (BCB), polytetrafluoroethylene (PTFE) (Teflon), or silicon oxycarbide polymers (SiOC). In some embodiments, ELK dielectric materials include a porous version of an existing dielectric material, such as hydrogen silsesquioxane (HSQ), porous methyl silsesquioxane (MSQ), porous polyarylether (PAE), porous SiLK, or porous silicon oxide (SiO.sub.2). In some embodiments, the IMD layer 120 is deposited by a plasma enhanced chemical vapor deposition (PECVD) process or by a spin coating process.
(21) A conductive pad 132 is formed over the IMD layer 120. The conductive pad 132 is electrically connected to the device elements 104 through various metallic lines and vias in the IMD layer 120.
(22) The IMD layer 120 and the conductive pad 132 are formed in a back-end-of-line (BEOL) process. The conductive pad 132 can be made of copper (Cu), copper alloy, aluminum (Al), aluminum alloy, tungsten (W), tungsten alloy, titanium (Ti), titanium alloy, tantalum (Ta) or tantalum alloy. In some embodiments, the conductive pad 132 is formed by a plating method.
(23) A passivation layer 124 is formed over the IMD layer 120 and covers the edge portions of the conductive pad 132. In addition, the center portions of the conductive pad 132 are exposed. In some embodiments, the passivation layer 124 is made of non-organic materials, such as silicon oxide, un-doped silicate glass, silicon oxynitride, solder resist (SR), silicon nitride, HMDS (hexamethyldisilazane). In some other embodiments, the passivation layer 124 is made of a polymer material, such as polyimide (PI), epoxy, or fluorine (F)-containing polymer.
(24) Next, as shown in
(25) Afterwards, the first dielectric layer 130 is patterned by a patterning process to expose a portion of the conductive pad 132. The patterning process includes a photolithography process and an etching process. Examples of a photolithography process include soft baking, mask aligning, exposure, post-exposure baking, developing the photoresist, rinsing and drying (e.g., hard baking). The etching process may be a dry etching or a wet etching process.
(26) In some embodiments, the first dielectric layer 130 is made of silicon oxide (SiOx), silicon nitride (SixNy), silicon oxynitride (SiON), or another applicable material. A post-passivation interconnect (PPI) pad 134 is formed in the first dielectric layer 130, and it is electrically connected to the conductive pad 132. The PPI pad 134 is formed after the formation of the passivation layer 124. In some embodiments, the PPI pad 134 is called a redistribution layer (RDL) pad.
(27) The PPI pad 134 is made of conductive material, such as copper (Cu), copper alloy, aluminum (Al), aluminum alloy, tungsten (W), tungsten alloy, titanium (Ti), titanium alloy, tantalum (Ta) or tantalum alloy. The PPI pad 134 is formed by plating, electroless plating, sputtering or chemical vapor deposition (CVD).
(28) The PPI pad 134 may be formed by filling a conductive material such as a metal material into openings and on the first dielectric layer 130. Afterwards, the excess conductive material is removed by a chemical mechanical polishing (CMP) process.
(29) Next, as shown in
(30) After the second dielectric layer 140 is formed, the second dielectric layer 140 is patterned to form openings 137 by the patterning process. Therefore, at least a portion of the PPI pad 134 is exposed.
(31) Afterwards, as shown in
(32) The conductive layer 142 is made of a conductive material, such as copper (Cu), copper alloy, aluminum (Al), aluminum alloy, tungsten (W), tungsten alloy, titanium (Ti), titanium alloy, tantalum (Ta) or tantalum alloy. The conductive layer 142 is formed by plating, electroless plating, sputtering or chemical vapor deposition (CVD).
(33) Afterwards, as shown in
(34) The protection layer 150 is formed over the device element 104 for preventing moisture penetration that may result in underlying protection layers and PPI structure delaminated. The formation of the protection layer 150 helps the package structure 100a able to pass through extreme environments, such as various reliability tests, without moisture being able to penetrate.
(35) In some embodiments, the protection layer 150 includes inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, HMDS (hexamethyldisilazane) or a combination thereof. Alternatively, the protection layer 150 includes a polymer, such as polyimide (PI), epoxy, solder resist (SR), fluorine (F)-containing polymer or combinations thereof.
(36) Next, as shown in
(37) The UBM layer 160 may be made of conductive material, such as copper (Cu), copper alloy, aluminum (Al), aluminum alloy, tungsten (W), tungsten alloy, titanium (Ti), titanium alloy, tantalum (Ta) or tantalum alloy. In addition, the UBM layer 160 may contain an adhesion layer and/or a wetting layer. In some embodiments, the UBM layer 160 further includes a copper seed layer. In some embodiments, the UBM layer 160 includes an adhesion layer made of Ti/Cu and a wetting layer made of Cu.
(38) Afterwards, as shown in
(39) Next, as shown in
(40) Afterwards, as shown in
(41) The protrusion structures 166 are used as crack-stop structures to suppress the propagation of cracks in the electrical connector 168 (shown in
(42) As shown in
(43) The first protrusion structure 166a includes a first portion 166a.sub.1 and a second portion 166a.sub.2, and the second protrusion structure 166b includes a first portion 166b.sub.1 and a second portion 166b.sub.2. An outer sidewall surface of each of the first protrusion structure 166a and the second protrusion structure 166b is aligned with an outer sidewall surface of the UBM layer 160.
(44) In some embodiments, each of the protrusion structures 166a, 166b is made of copper (Cu), copper alloy, aluminum (Al), aluminum alloy, tungsten (W), tungsten alloy, titanium (Ti), titanium alloy, tantalum (Ta) or tantalum alloy. In some embodiments, the protrusion structure 166 is formed using a plating method.
(45) The protrusion structure 166 has a first height H.sub.1 along a vertical direction and a first width W.sub.1 along a horizontal direction. In some embodiments, the first height H.sub.1 is in a range from about 10 m to about 50 m. In some embodiments, the first width W.sub.1 is in a range from about 20 m to about 40 m.
(46) Next, as shown in
(47) The melting point of each of the first protrusion structure 166a and the second protrusion structure 166b is higher than the melting point of each of the electrical connector 168. Each of the electrical connectors 168 is made of conductive materials with low resistivity, such as solder or solder alloy. Exemplary elements included in the solder alloy may include Sn, Pb, Ag, Cu, Ni, Bi or a combination thereof.
(48) Each of the electrical connectors 168 has a second height H.sub.2 which is measured from a top surface of the protection layer 150 to a top surface of the electrical connector 168. In some embodiments, the second height H.sub.2 is in a range from about 150 m to about 200 m. In some embodiments, a height ratio (H.sub.1/H.sub.2) of the first height H.sub.1 to the second height H.sub.2 is in a range from about 1/20 to about . If the height ratio is too small, the protrusion structures 166a, 166b are not high enough to stop the crack. If the height ratio is too large, it may be difficult to form the electrical connector 168 on the UBM layer 160. The electrical connector 168 has a second width W.sub.2 in a horizontal direction. In some embodiments, the second width W.sub.2 is in a range from about 180 m to about 200 m.
(49) As shown in
(50) An air gap 190 is formed between the first protrusion structure 166a and the second protrusion structure 166b. It should be noted that no underfill is between the first protrusion structure 166a and the second protrusion structure 166b. Since the first protrusion structure 166a and the second protrusion structure 166b can suppress the crack or prevent crack formation, and no underfill which have function to reduce the crack is not used. Therefore, the fabrication time and cost are reduced.
(51) It should be noted that when the size of the die (e.g. the substrate 102) become greater, the stress concentrated on the electrical connectors will become greater. As a result, some cracks will be formed in the electrical connector. The protrusion structures 166 are used as stress stop structures to suppress the propagation of cracks in the electrical connector 168. Since the cracks are suppressed in the electrical connector 168, the performance and reliability of the package structure 100a are improved.
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(53) The first protrusion structure 166a has a non-continuous shape when seen from a top view and has the first portion 166a.sub.1 and the second portion 166a.sub.2. Each of the first portion 166a.sub.1 and the second portion 166a.sub.2 has a bow-shaped structure. The electrical connector 168 has a circle shape when seen from a top view. It should be noted that if the first protrusion structure 166a include a continuous ring, some voids may be formed in the electrical connector 168. Therefore, the first protrusion structure 166a does not include a continuous ring portion.
(54) There is a center point C in the UBM layer 160. The first portion 166a.sub.1 and the second portion 166a.sub.2 are symmetric to the center C of the UBM layer 160. There is a first dummy middle line P.sub.1P.sub.2 cross the first portion 166a.sub.1 of the first protrusion structure 166a. There is a second dummy middle line P.sub.3P.sub.4 cross the second portion 166a.sub.2 of the first protrusion structure 166a. The first dummy middle line P.sub.1P.sub.2 and the second dummy middle line P.sub.3P.sub.4 both are symmetric axial. The first dummy middle line P.sub.1P.sub.2 and the second dummy middle line P.sub.3P.sub.4 both cross the center C of the UBM layer 160.
(55) It should be noted that the first dummy middle line P.sub.1P.sub.2 and the second dummy middle line P.sub.3P.sub.4 are used to define the shape of the first portion 166a.sub.1 and the second portion 166a.sub.2 and both are not real lines.
(56) Similarly, the second protrusion structure 166b includes the first portion 166b.sub.1 and the second portion 166b.sub.2. The first portion 166b.sub.1 and the second portion 166b.sub.2 of the second protrusion structure 166b are symmetric to the center C of the UBM layer 160. The third dummy middle line P.sub.5P.sub.6 of the first portion 166b.sub.1 and the fourth dummy middle line P.sub.7P.sub.8 of the second portion 166b2 both cross the center C of the UBM layer 160.
(57) As shown in
(58)
(59) The substrate 102 has a rectangular shape when seen from a top view. In some embodiments, the substrate 102 is a substrate of a die. The substrate 102 has a center point D. There are multiple electrical connectors 168 formed over the substrate 102. Although eight electrical connectors 168 are shown in
(60) The a.sub.1a.sub.1 line, a.sub.2a.sub.2 line, a.sub.3a.sub.3 line and a.sub.4 a.sub.4 line cross the center D of the substrate 102 (or the die). The a.sub.1a.sub.1 line, a.sub.2a.sub.2 line, a.sub.3a.sub.3 line and a.sub.4 a.sub.4 line cross to the center D of the substrate 102. In other words, the a.sub.1a.sub.1 line, a.sub.2a.sub.2 line, a.sub.3a.sub.3 line and a.sub.4 a.sub.4 line are radiating out from the center D of the substrate 102. The stress may be concentrated on the electrical connectors 168, especially those in a diagonal position. Therefore, the first protrusion structure 166a and the second protrusion structure 166b are positioned on the horizontal lines, vertical lines, or diagonal lines meeting at the center D of the substrate 102.
(61) The two electrical connectors 168 shown in
(62) In some embodiments, the two electrical connectors 168 shown in
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(67) As shown in
(68) As shown in
(69)
(70) As shown in
(71) The through via structures 122 are used to connect to another package structure. The through via structures 122 are made of copper (Cu), gold (Au), silver (Ag), or other applicable materials.
(72) The protection layer 150 includes a first sub-layer 150a and a second sub-layer 150b for allowing more than one level of the conductive layer to be formed in the protection layer 150. In some embodiments, the first sub-layer 150a and the second sub-layer 150b are made of different materials.
(73) A conductive layer 152 is formed in the protection layer 150 and is electrically connected to the conductive layer 142. A UBM layer 160 is formed over the conductive layer 152. The seed layer 162 is formed over the UBM layer 160, and the protrusion structure 166 is formed over the seed layer 162.
(74) Afterwards, as shown in
(75) Next, as shown in
(76) A third package structure 300 is formed over the first package structure 100d. The third package structure 300 includes the conductive pad 304 formed on the third substrate 302. The first package structure 100d and the third package structure 300 are bonded together by the electrical connector 188 and the conductive pad 304. The second package structure 200 and the third package structure 300 are on two opposite sides of the substrate 102.
(77)
(78) As shown in
(79) The adhesive layer 404 is deposited over the carrier substrate 402. The adhesive layer 404 may be made of glue, or may be a lamination material, such as a foil. In some embodiments, the adhesive layer 404 is photosensitive and is easily detached from the carrier substrate 402 by light irradiation. For example, shining ultra-violet (UV) light or laser light on the carrier substrate 102 may detach the adhesive layer 404. In some other embodiments, the adhesive layer 404 is heat-sensitive and is easily detached from the carrier substrate 402 when it is exposed to heat.
(80) Subsequently, a base layer 406 is deposited or laminated over the adhesive layer 404. The base layer 406 provides structural support for bonding an integrated circuit die, which will be described in more detail later, and helps reduce die shifting issues. In some embodiments, the base layer 406 is a polymer layer or a polymer-containing layer. The base layer 406 is a poly-p-phenylenebenzobisthiazole (PBO) layer, a polyimide (PI) layer, a solder resist (SR) layer, an Ajinomoto buildup film (ABF), a die attach film (DAF), another suitable layer, or a combination thereof.
(81) An interconnect structure 410 is formed over the base layer 406. The interconnect structure 410 includes one or more conductive layers in one or more passivation layers. For example, the interconnect structure 410 includes conductive layers 412 formed in the passivation layers 414.
(82) Afterwards, a number of through via structures 416 are formed over the interconnect structure 410, in accordance with some embodiments. In some embodiments, the through via structures 416 are conductive pillars or other suitable structures. The through via structures 416 may be referred to as through interposer vias (TIVs). The through via structures 416 are physically and electrically connected to one of the conductive layers in the interconnect structure 410.
(83) In some embodiments, the through via structures 416 are made of materials that may include copper (Cu), aluminum (Al), nickel (Ni), platinum (Pt), lead-free solder (e.g., SnAg, SnCu, SnAgCu), another suitable conductive material, or a combination thereof. In some embodiments, the through via structures 416 are formed using an electroplating process, a physical vapor deposition (PVD) process, a CVD process, an electrochemical deposition (ECD) process, a molecular beam epitaxy (MBE) process, an atomic layer deposition (ALD) process, or another applicable process.
(84) Next, as shown in
(85) In some embodiments, the device die 500 includes a semiconductor substrate 502, a passivation layer 504, and conductive pads 506. The device die 500 may also include connectors on the conductive pads 506, and a protection layer surrounding the connectors. A variety of device elements may be formed in or over the semiconductor substrate 502.
(86) The adhesive layer 418 is used to bond or attach the device die 500 to the interconnect structure 410. The adhesive film 418 includes a DAF, another suitable layer, or a combination thereof.
(87) Afterwards, a package layer 420 is deposited over the interconnect structure 410. As a result, the through via structures 416 and the device die 500 are encapsulated by the package layer 420. In some embodiments, the package layer 420 includes a polymer material. In some embodiments, the package layer 420 includes a molding compound.
(88) In some embodiments, the molding compound is dispensed over the through via structures 416, the device die 500 and the interconnect structure 410 and a thermal process is performed to harden the molding compound. After the planarizing process, the top surface of the device die 500 is substantially level with that of the through via 416 structures. In some embodiments, the planarizing process includes a grinding process, a chemical mechanical polishing (CMP) process, an etching process, another applicable process, or a combination thereof.
(89) Afterwards, as shown in
(90) In some embodiments, the protection substrate 514 is used as a panel of a fingerprint recognition device. The protection substrate 514 is made of a non-organic material or another suitable material. In some embodiments, the protection substrate 514 is a glass substrate, sapphire substrate, or another suitable substrate.
(91) Afterwards, as shown in
(92) The carrier substrate 402 is removed. In some embodiments, both the carrier substrate 402 and the adhesive layer 404 are removed. Suitable light may be provided to remove the adhesive layer 404 so as to remove the carrier substrate 402 as well.
(93) Subsequently, multiple portions of the base layer 406 are removed to form a number of trenches 425 and a number of openings 427. Portions of the interconnect structure 410, such as portions of the conductive layer 412 are expose by the trenches 425 and openings 427. The trenches 425 are formed over the through via structures 416. The openings 427 are formed over the device die 500. The size of the trenches 425 is greater than that of the openings 427. For example, the width of each of the trenches 425 is greater than the width of each of the openings 427.
(94) Next, as shown in
(95) Afterwards, as shown in
(96) Next, as shown in
(97) In some embodiments, the element 450 is a device die. For example, the device die is a high-voltage die or another suitable die. In some other embodiments, the element 450 includes a package structure that contains one or more integrated circuit dies.
(98) Next, as shown in
(99) The space 415 is filled with an underfill 444 shown in
(100) It should be noted that there is more stress concentrated on the electrical connector when the size of the die becomes greater. Therefore, the stress concentrated on the electrical connectors 438 is greater than the stress concentrated on the electrical connectors 442. The high stress may cause cracks to form in the electrical connector. In order to reduce or prevent formation of the cracks, the protrusion structures 436 are embedded in the electrical connectors 438. In some embodiments, the outer sidewall surface of each of the protrusion structures 436 is aligned with the outer sidewall surface of the UBM layer 440 and the electrical connectors 438 to adequately suppress the propagation of cracks in the electrical connector 438.
(101) Embodiments for forming a package structure and method for forming the same are provided. A first package structure includes a conductive layer formed over a substrate or a device die, and a UBM layer is formed over the conductive layer. A seed layer is formed over the UBM layer and a number of protrusion structures are formed over the seed layer. A number of electrical connectors are formed over the protrusion structures. The protrusion structures extend upward away from the UBM layer. The protrusion structures include a first protrusion and a second protrusion structure. An air gap is between the first protrusion and the second protrusion structure. There is no underfill between the first protrusion and the second protrusion structure. The protrusion structures are used as crack-stop structures to prevent cracks from forming in the electrical connector. Therefore, the problem of the electrical connector cracking is reduced, and the performance and reliability of the package structure is improved.
(102) In some embodiments, a package structure is provided. The package structure includes a first under bump metallurgy (UBM) layer formed over a first substrate, a first protrusion structure formed over the first UBM layer, wherein the first protrusion structure extends upward away from the first UBM layer. The package structure includes a first electrical connector formed over the first protrusion structure. The first electrical connector is surrounded by the first protrusion structure, and the first protrusion structure has an outer sidewall surface, and the outer sidewall surface of the first protrusion structure is aligned with an outer surface of the first UBM layer.
(103) In some embodiments, a package structure is provided. The package structure includes a through via structure formed over a first substrate, and the through via structure has a first side and a second side. The package structure further includes a first protrusion structure formed over the first side of the through via structure, and the first protruding structure extends upwardly. The package structure further includes a first electrical connector formed over the first protrusion structure, and a second protrusion structure formed over the second side of the through via structure. The second protruding structure extends downwardly. The package structure further includes a second electrical connector formed below the second protrusion structure.
(104) In some embodiments, a package structure is provided. The package structure includes a first device die, and an interconnect structure formed over the first device die. The package structure includes a second device die formed over the interconnect structure, and a protrusion structure formed adjacent to the second device die. The protrusion structure extends upward away from the interconnect structure. The package structure also includes a first electrical connector formed over the protrusion structure, and the protrusion structure is embedded in the first electrical connector.
(105) The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.