OPTOELECTRONIC DEVICE AND METHOD FOR PRODUCING AN OPTOELECTRONIC DEVICE

Abstract

In an embodiment an optoelectronic device includes a carrier and a plurality of semiconductor chips fastened on the carrier by a connector, wherein each semiconductor chip has at least one contact pad on a main surface facing away from the carrier, wherein each contact pad is contacted electrically by an interconnecting track, and wherein the interconnecting track is guided over an edge of the main surface of the semiconductor chip onto the carrier.

Claims

1.-18. (canceled)

19. An optoelectronic device comprising: a carrier; and a plurality of semiconductor chips fastened on the carrier by a connector, wherein each semiconductor chip has at least one contact pad on a main surface facing away from the carrier, wherein each contact pad is contacted electrically by an interconnecting track, and wherein the interconnecting track is guided over an edge of the main surface of the semiconductor chip onto the carrier.

20. The optoelectronic device as claimed in claim 19, wherein the connector covers a side surface of the semiconductor chip at least locally, and wherein the interconnecting track adjoins the connector directly.

21. The optoelectronic device as claimed in claim 20, wherein an active region of the semiconductor chip is covered by the connector on the side surface, the active region configured to generate radiation.

22. The optoelectronic device as claimed in claim 20, wherein the side surface of the semiconductor chip, as seen from the carrier, is covered with the connector to between 1% and 100%, inclusive, of a height of the semiconductor chip.

23. The optoelectronic device as claimed in claim 20, wherein an angle between the side surface of the semiconductor chip and an outer surface of the connector is at least locally at least 10°.

24. The optoelectronic device as claimed in claim 20, wherein the interconnecting track locally adjoins the side surface of the semiconductor chip directly.

25. The optoelectronic device as claimed in claim 19, wherein the carrier and the connector are transmissive for radiation to be generated by the semiconductor chips, and wherein a side of the carrier facing away from the semiconductor chips is a radiation exit surface of the optoelectronic device.

26. The optoelectronic device as claimed in claim 19, wherein the interconnecting track has a transverse extent of at most 30 μm in a plan view of the optoelectronic device.

27. The optoelectronic device as claimed in claim 19, wherein the interconnecting track locally adjoins the carrier directly.

28. The optoelectronic device as claimed in claim 19, wherein the connector is one piece and is the only element between the carrier and the interconnecting track laterally with respect to the semiconductor chips.

29. The optoelectronic device as claimed in claim 19, wherein the connector has a viscosity of between 5 Pa*s and 30 Pa*s, inclusive, and a thixotropic index between 2 and 8, inclusive.

30. A method for producing an optoelectronic device, the method comprising: providing a carrier; arranging a plurality of semiconductor chips on the carrier, each semiconductor chip having at least one interconnecting surface on a main surface facing away from the carrier; and forming interconnecting tracks on the carrier with the semiconductor chips arranged on the carrier.

31. The method as claimed in claim 30, further comprising: registering positions of the semiconductor chips on the carrier after arranging the plurality of semiconductor chips on the carrier, wherein forming the interconnecting tracks comprises forming the interconnecting tracks based on the registered positions.

32. The method as claimed in claim 31, wherein registering the positions comprises registering the positions by automatic optical inspection.

33. The method as claimed in claim 30, wherein the carrier is a film.

34. The method as claimed in claim 33, wherein the carrier is arranged on an auxiliary carrier while arranging the plurality of semiconductor chips and forming the interconnecting tracks.

35. The method as claimed in claim 30, wherein the carrier contains a glass.

36. The method as claimed in in claim 30, wherein arranging the plurality of semiconductor chips comprises fastening the plurality of semiconductor chips on the carrier with a connector, and wherein the connector covers side surfaces of the semiconductor chips at least locally when the semiconductor chips are being fastened.

37. The method as claimed in claim 36, wherein the connector has a viscosity of between 5 Pa*s and 30 Pa*s, inclusive, and a thixotropic index between 2 and 8, inclusive.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Further expediencies and refinements may be found from the following description of the exemplary embodiments in conjunction with the figures, in which:

[0054] FIGS. 1A and 1B show an exemplary embodiment of an optoelectronic device with the aid of a detail in a sectional view (FIG. 1A) and in plan view (FIG. 1B);

[0055] FIGS. 2A, 2B and 2C show an exemplary embodiment of a method for producing an optoelectronic device with the aid of intermediate steps which are respectively represented in a schematic sectional view;

[0056] FIGS. 3A and 3B show an exemplary embodiment of a method for producing an optoelectronic device with the aid of intermediate steps in a schematic side view (FIG. 3A) and in a schematic plan view (FIG. 3B); and

[0057] FIG. 4 shows a measurement of a line profile of a semiconductor chip fastened by a connecting means.

[0058] Elements which are the same or of the same type, or which have the same effect, are provided with the same references in the figures.

[0059] The figures are respectively schematic representations and are therefore not necessarily true to scale. In particular, relatively small elements, and in particular layer thicknesses, may be represented as being exaggeratedly large for improved representation or for improved understanding.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0060] The exemplary embodiment of an optoelectronic device as represented in FIGS. 1A and 1B, for simplified representation only a detail with a semiconductor chip 2 intended for generating radiation is shown. The optoelectronic device 1 may comprise a multiplicity of such semiconductor chips 2, for example at least 5 or at least 10 or at least 100, on a carrier 3. For example, at least some of the semiconductor chips 2 are electrically connected in series with one another and/or electrically connected in parallel with one another. Furthermore, the semiconductor chips 2 or groups of semiconductor chips may be controllable individually, for example by means of a matrix interconnection, for instance an active matrix interconnection or a passive matrix interconnection.

[0061] The semiconductor chip 2 is fastened on the carrier 3 by means of a connecting means 4. The carrier 3 comprises a mounting side 31 facing toward the semiconductor chips and a rear side 32 opposite the mounting side. In the exemplary embodiment shown, the rear side of the carrier 3 forms a radiation exit surface 10 of the optoelectronic device 1. On a main surface 21 facing away from the carrier 3, the semiconductor chip 2 comprises contact pads 25 for electrical contacting of the semiconductor chip 2. The side of the semiconductor chip 2 facing toward the carrier 3 is free of contacts for the electrical contacting of the semiconductor chip 2.

[0062] During operation of the optoelectronic device 1, charge carriers can be injected into the semiconductor chip 2 through the contact pads 25 and recombine in an active region 20 of the semiconductor chip, for example a pn junction, by emitting radiation.

[0063] Suitable for the semiconductor chips 2 are, for example, LEDs in a so-called flip-chip geometry, in which none or at least only a small fraction of the radiation generated during operation emerges from the main surface on which the contact pads are located.

[0064] The contact pads 25 are respectively contacted electrically via an interconnecting track 5. The contact track 5 is guided over an edge 210 of the main surface 21 of the semiconductor chip 2. In a plan view of the mounting side 31 of the carrier 3, an interconnecting track 5 overlaps a contact pad 25 of the semiconductor chip 2 at least regionally.

[0065] The connecting means 4 regionally covers a side surface 22 of the semiconductor chip 2. In particular, the connecting means 4 covers the side surface 22 to the height of the active region 20. The connecting means 4 electrically insulates the active region 20 from the interconnecting track 5.

[0066] The main surface 21 of the semiconductor chip 2 is free of material of the connecting means 4. In a plan view of the optoelectronic device 1, the connecting means 4 protrudes beyond the semiconductor chip 2 in the lateral direction, in particular along the entire circumference of the semiconductor chip 2. The interconnecting track 5 adjoins the connecting means 4 directly. The interconnecting track 5 directly adjoins the mounting side 31 of the carrier 3 laterally with respect to the semiconductor chips 2.

[0067] The interconnecting track 5 adjoins the semiconductor chip 2 in a region of the side surface 22 which is not covered by the connecting means 4. In particular, the connecting means 4 is the only element which is arranged between the side surface 22 of the semiconductor chip 2 and the interconnecting track 5 as seen in the lateral direction. A protective layer 6 may optionally be formed on the side of the carrier 3 facing away from the rear side 32. For example, the protective layer 6 is laminated onto the carrier 3.

[0068] In the exemplary embodiment shown, the carrier 3 is expediently radiation-transmissive. For example, the carrier 3 contains a plastic material, for example polyethylene (PE), polyethylene terephthalate (PET), an imide, for instance polyimide (PI), or polymethyl methacrylate (PMMA), or a glass.

[0069] Such materials are also suitable in particular for a carrier 3 which is configured to be flexible in the form of a film. As an alternative, a rigid carrier 3 may also be used, and the carrier may for example contain a glass.

[0070] A transverse extent of the interconnecting tracks 5 may be configured particularly finely. For example, the transverse extent is at most 30 μm or at most 20 μm. In conjunction with a radiation-transmissive carrier 3, an optoelectronic device 1 which is substantially transparent laterally with respect to the semiconductor chips 2 may thus be produced. In particular, the interconnecting tracks 5 may be configured to be so thin that they are not disturbing for a human observer when looking through the optoelectronic device.

[0071] There are thus no radiation-opaque layers, for example metal layers for the electrical contacting of the semiconductor chips 2, between the active region 20 and the carrier 3.

[0072] FIG. 4 shows a measurement of a line profile of a height h of a semiconductor chip 2, which is fastened as described above on a carrier 3 by means of a connecting means 4. This measurement confirms that a large part of the side surfaces of the semiconductor chip can be covered by the connecting means 4. Furthermore, large angles may be produced between the side surface of the semiconductor chip 2 and the outer surface of the connecting means 4.

[0073] The configuring of the interconnecting tracks 5 in the form of a coating is simplified by means of the connecting means 4 covering the side surfaces 22. The further the connecting means 4 extends in the vertical direction along the side surface 22 in the direction of the edge 210 of the main surface 21, the smaller is the height difference which has to be bridged by the interconnecting track 5 on the edge 210. Furthermore, an outer surface 41 of the connecting means 4 may assume a relatively large angle 410, for example at least 30° or at least 45°, with respect to the side surface 22 of the semiconductor chip 2. The reliability of the interconnecting track 5 over the edge 210 is thereby further increased.

[0074] For example, an epoxide or a silicone is suitable as a radiation-transmissive connecting means. It is preferably an epoxide or silicone having a viscosity of between 10 and 20 Pa*s and a thixotropic index of between 3 and 5.

[0075] In a departure from the exemplary embodiment described, however, the described configuration of the connecting means 4 is also suitable for other forms of the optoelectronic device 1. For example, the emission of the optoelectronic device 1 may also take place from the side on which the semiconductor chips 2 are located on the carrier 3, that is to say on the mounting side. In this case, the carrier 3 may also be radiation-opaque, for example reflective for the radiation to be generated. Furthermore, the connecting means 4 may also be radiation-opaque, for example reflective.

[0076] Furthermore, a rigid carrier may also be used. Furthermore, it is also conceivable for the semiconductor chip 2 to have only one contact pad 25 on the main surface 21, and for a further contact pad to be arranged on the opposite side of the semiconductor chip 2 from the main surface. In this case, therefore also only one contact pad per semiconductor chip can be electrically contacted by means of an interconnecting track in the form of a coating.

[0077] An exemplary embodiment of a method for producing an optoelectronic device is shown with the aid of FIGS. 2A to 2C, a device which is configured as described in conjunction with FIGS. 1A and 1B being produced by way of example.

[0078] A carrier 3 is provided (FIG. 2A). In the case of a flexible carrier 3, it is preferably arranged on an auxiliary carrier 7. For example, the carrier 3 is adhesively bonded onto the auxiliary carrier 7, for instance by lamination with the use of a dry resist.

[0079] Processing on the flexible carrier 3 may thus take place in a similar way to the processing on a rigid carrier.

[0080] Semiconductor chips 2 are applied onto the carrier 3 by means of a connecting means 4 (FIG. 2B). During the placement of the semiconductor chips 2 on the carrier 3, material of the connecting means 4 is displaced laterally and locally covers the side surfaces 22 of the semiconductor chips 2. The degree of coverage of the side surfaces 22 may be adjusted via the amount of the connecting means in combination with the viscosity of the connecting means and its thixotropic indices. For example, the connecting means is based on a polymer material, for instance an epoxide or a silicone.

[0081] As seen in the vertical direction, the connecting means 4 is the only element between the mounting side 31 of the carrier 3 and the semiconductor chip 2.

[0082] The main surface 21 of the semiconductor chip 2, in particular the contact pads 25, remains free of the connecting means 4. As seen in a sectional view, laterally with respect to the semiconductor chip 2 the connecting means 4 forms a ramp from the mounting side 31 of the carrier 3 in the direction of the main surface 21, facing away from the carrier 3, of the semiconductor chip 2.

[0083] A structured metal coating for forming the interconnecting tracks 5 is subsequently applied. For example, copper is suitable for the interconnecting tracks 5. The interconnecting tracks 5 respectively adjoin directly the assigned contact pads 25, the assigned semiconductor chip 2, the connecting means 4 and the mounting side 31 of the carrier 3.

[0084] Optionally, the carrier 3 with the semiconductor chips 2 applied thereto may subsequently be provided with a protective layer, for example by applying a film, for instance by lamination.

[0085] The auxiliary carrier 7 may subsequently be removed. The carrier 3 may also be processed to form optoelectronic devices in the form of a roll-to-roll method.

[0086] FIGS. 3A and 3B show intermediate steps of a further exemplary embodiment of a method for producing an optoelectronic device. This method corresponds substantially to the exemplary embodiment described in conjunction with FIGS. 2A to 2C.

[0087] In particular, the semiconductor chips 2 may be fastened as described in conjunction with FIGS. 2A and 2B on a carrier 3. In principle, however, it is also conceivable for the connecting means 4 not to cover, or not to cover substantially, the side surfaces 22 of the semiconductor chips 2 and instead, for example, for an insulation layer to be applied after the semiconductor chips have been fastened on the carrier 3, this insulation layer locally covering the side surfaces 22 of the semiconductor chips 2.

[0088] After the semiconductor chips 2 have been fastened, the precise positions of the semiconductor chips 2 are registered, for example optically by means of an image acquisition unit 8. As represented in FIG. 3B, the positions P11, P12, P21, P22, . . . , of the semiconductor chips 2, four of which are represented in the detail, in a nominally uniform matrix arrangement may deviate from an exact regular pattern because of tolerances during the placement of the semiconductor chips 2 on the carrier 3. Typical alignment tolerances may be up to 50 μm.

[0089] After the registering of the positions P11, P12, P21, P22, . . . , the interconnecting tracks 5 are configured with knowledge of these positions. The routing of the interconnecting tracks 5 thus takes into account the actual position of the contact pads 25 of the semiconductor chips 2 on the carrier 3. Together with the interconnecting tracks 5, external interconnecting surfaces 51 of the optoelectronic device 1 may also be formed.

[0090] In the exemplary embodiment shown, purely by way of example the semiconductor chips 2 of a row are respectively interconnected electrically in series. The nature of the electrical contacting of the semiconductor chips 2 may, however, be varied within wide limits. Overall, with this method a high finesse of the interconnecting tracks 5 and therefore a high transparency of an optoelectronic device 1 may be achieved. The cross section of the interconnecting tracks which is required for a sufficient current-carrying capacity may be achieved by increasing the layer thickness during the deposition of the interconnecting tracks.

[0091] The invention is not restricted by the description with the aid of the exemplary embodiments. Rather, the invention comprises any new feature and any combination of features, which in particular includes any combination of features in the patent claims, even if this feature or this combination itself is not explicitly specified in the patent claims or the exemplary embodiments.