Illuminated faceplate and method for producing such an illuminated faceplate

Abstract

A luminous panel includes a substrate having electric connections and an array of microchips secured to the substrate and connected to the electric connections in order to be driven. Each microchip includes control circuit based on transistors formed in a silicon volume, the circuit being connected to the substrate connections, and a micro-LED secured to the control circuit and connected thereto in order to be controlled.

Claims

1. A method of manufacturing a luminous panel comprising steps of: manufacturing a first substrate comprising: a stack of semiconductor layers forming inorganic semiconductor micro-LEDs; and an array of electric connections for the micro-LEDs, the manufacturing of the first substrate being carried out in such a way that the electric connections are arranged on a first surface of the first substrate; manufacturing in a second silicon substrate, independently from the first substrate, an array of circuits for controlling the micro-LEDs comprising transistors, said manufacturing in the second silicon substrate being carried out so that: first connections for control of the micro-LEDs are arranged on a first surface of the second substrate; and second connections for driving of the luminous panel are arranged on a second surface of the second substrate; placing the first surfaces of the first substrate and of the second substrate on one another and securing said first surfaces of the first substrate and of the second substrate to each other, to electrically connect electric connections of the micro-LEDs with the first connections, thus obtaining a third substrate comprising an array of electronic microchips, each of the array of electronic microchips formed of a stacking of a micro-LED and of a control circuit; manufacturing a microchip transfer structure comprising: a transfer substrate; and the array of electronic microchips, each of the array of electronic microchips being secured to the transfer substrate only by its micro-LED, and individualized by forming a trench into the third substrate around the microchip; manufacturing a fourth substrate, independently from the transfer structure, comprising electric connections for supplying signals for driving the luminous panel, said electric connections of the fourth substrate being arranged on a first surface of the fourth substrate; and placing the transfer structure on the first surface of the fourth substrate, securing the microchips to the first surface of the fourth substrate to connect the second connections with the electric connections of the fourth substrate, and separating the microchips from the transfer substrate.

2. The luminous panel manufacturing method of claim 1, wherein the step of manufacturing the microchip transfer structure comprises steps of: placing and temporarily bonding the third substrate to the transfer substrate; and then, forming the trenches around the microchips down to the transfer substrate.

3. The luminous panel manufacturing method of claim 1, wherein: the manufacturing of the first substrate comprises manufacturing a growth substrate and growing by epitaxy semiconductor layers forming the micro-LEDs, the growth substrate forming the transfer substrate of the microchip transfer structure; the manufacturing of the microchip transfer structure comprises forming trenches around the microchips down to the transfer substrate; and the separation of the microchips from the transfer substrate comprises a laser irradiation of the transfer substrate on the microchips, perpendicularly thereto, to obtain a separation thereof from the transfer substrate.

4. The luminous panel manufacturing method of claim 1, wherein: the array of electronic microchips exhibits a first repetition pitch; the electric connections of the fourth substrate are arranged in an array with a second repetition pitch larger than the first repetition pitch; the manufacturing of the microchip transfer structure, the securing of the microchips to the first surface of the fourth substrate, and the separation of the microchips from the transfer substrate steps, comprise steps of: placing the transfer structure in a first position of the fourth substrate; securing at least one first microchip at the first position; placing the transfer structure in a second position of the fourth substrate by shifting the transfer structure and the fourth substrate with respect to each other by the second repetition pitch; and and securing at least one second microchip at the second position.

5. The luminous panel manufacturing method of claim 1, wherein the fourth substrate consists of only electric connections.

6. The luminous panel manufacturing method of claim 1, wherein the stack forming the micro-LEDs of the first substrate is made of at least one of gallium nitride, indium gallium nitride, and aluminum gallium nitride.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will be better understood on reading of the following description provided as an example only in relation with the accompanying drawings, where the same reference numerals designate the same or similar elements, among which:

(2) FIG. 1 is a simplified perspective view of luminous panel according to the invention;

(3) FIG. 2 is a simplified cross-section view of a microchip comprised in the structure of the panel according to the invention;

(4) FIG. 3 is an electric diagram illustrating a micro-LED and its control circuit;

(5) FIG. 4 is an electric diagram illustrating connections of an interconnection substrate according to the invention;

(6) FIGS. 5A-5J illustrate a first embodiment of the method of manufacturing a luminous panel according to the invention; and

(7) FIGS. 6A-6I illustrate a second embodiment of the method of manufacturing a luminous panel according to the invention.

DETAILED DESCRIPTION OF THE SPECIFICATION

(8) In the following, terms lower and upper refer to the relative layout of elements illustrated in the drawings.

(9) Referring to FIGS. 1 to 3, a luminous panel 10 according to an embodiment of the invention, for example, for a display screen (of computers, smartphones, television sets, tablets . . . ) or for an image projector, comprises: a passive electric connection substrate 12, that is, only comprising electric conductors, e.g. electric contacts and tracks, to supply panel control signals DATA and SCAN and for supplying power supply voltages Vp and Vn; and an array 14 of light-emitting microchips 16 secured to passive substrate 12 and connected to the electric connectors thereof, the microchips being spatially arranged, for example, for an image display.

(10) Each microchip 16 comprises, on an upper portion, an inorganic semiconductor micro-LED 18 and, on a lower portion, secured to the upper portion, an active control circuit 20 formed in a silicon block. In particular, the control circuit is not formed according to the TFT technology.

(11) More particularly, micro-LED 18 comprises at least one homojunction or one heterojunction, for example, a PN junction formed of a stack of an upper P-type (or N-type) semiconductor layer 22 and of a lower N-type (respectively P-type) semiconductor layer 24, and two electric contacts 26, 28 for injecting an electric current through the stack, to generate light. Advantageously, micro-LED 18 is made of III-V semiconductor, particularly based on gallium, particularly of gallium nitride (GaN), and/or of gallium phosphide (GaP) and/or of indium gallium nitride (InGaN), and/or of aluminum gallium nitride (AlGaN), and/or of aluminum gallium arsenide (AlGaAs), and/or of indium gallium arsenide (InGaAs), and/or of gallium arsenide phosphide (GaAsP). This type of semiconductor material enables to manufacture micro-LEDs emitting in red (e.g.: AlGaAs, GaAsP, InGaAlP), in blue (e.g.: InGaN), and in green (e.g.: GaN, GaP, AlGaP). Of course, the structure of micro-LED 18 cannot be reduced to the stack of two N and P layers, for example, made of GaN, and may take any known shape, for example, a planar architecture, a MESA-type architecture, an architecture based on nanowires, such as described in document WO 2012/035243 and/or WO 2012/156620, etc. . . . .

(12) A contact transfer 30 is further provided through microchip 14 to electrically connect one of electric contacts 26 of micro-LED 18 to an electric contact 32 arranged on lower surface 34 of control circuit 20. Contact transfer 30 for example is of TSV type (through silicon via) and comprises for this purposes a hole crossing the microchip from contact 26 to surface 34, which hole has its wall coated with a layer of electric insulator, for example, a dielectric layer, and is filled with an electrically conductive material, for example, a metal. The other contact 28 of micro-LED 18 is for example arranged on lower surface 36 of micro-LED 18, at the interface with the upper surface of control circuit 20.

(13) Control circuit 20 comprises electronic components (transistor(s), capacitor(s), resistors, etc.) for the individual control of micro-LED 18 according to control signals DATA and SCAN. Such an individual control enables to actively address each micro-LED. For example, referring to FIG. 3, control circuit 20 comprises: a first PMOS transistor 38, having its drain connected to an output contact 40 of microchip 14 to receive a signal DATA setting the state of micro-LED 18 (on or off, for example) and having its gate connected to an output contact 42 of microchip 14 to receive a signal SCAN enabling or not to update the state of micro-LED 18; a second NMOS transistor 44, having its gate connected to the source of first PMOS transistor 38, having its drain connected to an output contact 46 of the LED microchip for the application of a second power supply voltage Vp, and having its source connected to contact 28 of micro-LED 18. Second transistor 44 thus allows the connection of micro-LED 18 and the application of voltage different Vp-Vn between contacts 32 and 28, and thus the injection of current into micro-LED 18; and a capacitor 48 connected between the gate and the drain of second transistor 44, to maintain the state of micro-LED 18 between two refreshments.

(14) FIG. 4 illustrates a diagram of connection and control of the panel thus described, here, a panel comprising an array 14 of 3 rows and 3 columns of microchips 16, connection substrate 12 being connected to a circuit 50 of row-by-row refreshment of array 14, a circuit 52 controlling the state of illumination of the micro-LEDs of the row selected by circuit 50, and voltage sources Vp and Vs.

(15) A first embodiment of a method of manufacturing a luminous panel according to the invention, for example, a panel such as described hereabove, will now be described in relation with FIGS. 5A-5I.

(16) The method starts with the manufacturing of an array of active control circuits 20 in a silicon substrate 60, for example, according to an ASIC (application-specific integrated circuit) manufacturing technology, well known per se of the state of the art (FIG. 5A).

(17) Circuits 20 are spaced by at least a distance selected to form a trench around each circuit 20 to be able to subsequently individualize them. Distance is for example selected according to the accuracy of the trench manufacturing process, which thus allows a maximum density of circuits 20 considering said process.

(18) Independently from the manufacturing of the array of control circuits 20, the method comprises manufacturing a second substrate 61 comprising a stack of semiconductor layers and of electric contacts forming the array of micro-LEDs 18. The manufacturing of the stack of semiconductor layers forming the micro-LEDs, for example, two GaN layers, respectively of type P and N, is for example formed by epitaxy on a growth substrate 62 (e.g. made of sapphire or of silicon), as well known in the state of the art (FIG. 5B). For example, micro-LEDs 18 are manufactured according to a technique described in document Journal of Crystal Growth 268 (2004) 527-530.

(19) Referring to FIG. 5C, the array of control circuits 20 and the array of micro-LEDs 18 are then placed on each other and secured to each other, for example, by means of a direct heterogeneous bonding or by a flip-chip-type hybridization using solder bumps, and a thermocompression and/or by using hollow microtubes, such as those described in document WO 2013/001225 or in document FR 2 928 033. The interconnection of the arrays is thus performed to connect contact 28 of each micro-LED with the corresponding terminal of transistor 44 of the associated control circuit. TSV-type contact transfers 30 are then formed to transfer each contact 26 of the micro-LEDs to the free surface of the control circuits. Growth substrate 62 is then removed, for example, by laser lift-off in the case of a sapphire substrate, or by mechanical polishing and chemical etching with KOH in the case of a Si substrate.

(20) Third substrate 63, thus formed of the stacking of the arrays of micro-LEDs and of control circuits, is then transferred onto a so-called handle substrate 64, for example, made of Si, by means of a so-called temporary bonding, allowing an easy subsequent removal, for example, by means of a resin, particularly a Brewer's WaferBOND HT-10.10 resin (FIG. 5D).

(21) The method carries on with the individualization of each microchip 14 by etching around each of them a trench 66 down to handle substrate 64, for example, a RIE (Reactive Ion Etching) by ICP (Inductive coupled plasma: RIE mode which provides a more directional etching) with Cl.sub.2 (FIG. 5E).

(22) Independently, at the previously-described steps, the method comprises manufacturing a fourth passive substrate 68 having the dimensions desired for the panel, and comprising a network of electric connections for the electric connection of contacts 32, 40, 42 and 46 provided on lower surface 34 of each control circuit 20, for example, a glass plate having electric tracks made of indium tin oxide (or ITO) formed on a surface thereof.

(23) Microchips 14, attached to handle substrate 64 by their micro-LEDs 18, are then placed on substrate 68, and secured to electrically connect the electric connections of the control circuits to the corresponding electric connections of substrate 68, for example, by means of a direct heterogeneous bonding, or of a flip-chip hybridization such as previously described (FIG. 5F). Microchips 14 are then separated from handle substrate 64 by heating, for example up to 300 C.

(24) Since the pitch of microchips 14 on handle substrate 64 (in the order of some ten micrometers with current manufacturing techniques, for example, 30 m) may be greater than the pitch of the array of microchips of the luminous panel (currently in the order of some hundred micrometers, for example, in the range from 15 micrometers to 1 millimeter), the method for example comprises placing part of the microchips on passive substrate 68 (FIG. 5G) and then shifting the handle substrate with the remaining microchips by the pitch of the luminous panel, placing another part of the microchips (FIGS. 5H, 5I), and so on, until the luminous panel is completed (FIG. 5J).

(25) In this first embodiment, a handle substrate is used to place microchips 14 on passive connection substrate 68. The use of a handle substrate 64, adhering to microchips 14 by temporary bonding, has the advantage of enabling to remove the growth substrate, whichever it may be. It however assumes a manufacturing step and an additional placing step.

(26) According to a second embodiment of the method according to the invention, illustrated in FIGS. 6A-6I, growth substrate 62 is not removed once the first and second substrates 60, 61 have been interconnected to each other, as in FIG. 5C, but is used as a handle substrate, which enables to spare a manufacturing and placing step, and to ease the alignment of microchips 14 on array 68. Microchips 14 are then separated from growth substrate 62 by the use of a local laser lift-off, FIG. 6F, such as for example described in U.S. Pat. No. 6,071,795 (i.e. use of a pulsed 248-nm KrF laser and exposure of the LEDs with energies between 100 and 600 mJ/cm.sup.2). For LEDs, a lens may enable to focus the laser beam at the interface between the sapphire and the GaN.

(27) For the above-described embodiments of the manufacturing method, applied to the manufacturing of a luminous panel to display color images, it may be started by placing microchips corresponding to the blue pixels, by positioning the interconnects where appropriate for the blue pixels, after which interconnects may be added to place the green pixels, after which interconnects may be added to place the red pixels.

(28) Further, the interconnects between microchips 14 and interconnection substrate 68 may be copper microtubes or micropillars (so-called micro-bump technology) or copper connection pads to perform the direct bonding between pads (e.g. heterogeneous or by thermocompression).

(29) A specific control circuit, particularly inducing four electric connections per microchip, has been described. Of course, any type of active control circuit can be envisaged. One may in particular provide a last interconnection level in the ASIC manufacturing method in order to have a planar surface. In particular, after the methods of manufacturing transistors in silicon, the resulting surface may be non-planar. To ease the interconnection between the active silicon array and the micro-LED array (e.g., made of GaN), it is preferable for the surfaces placed on each other to be planar. To achieve this, a last level on the active array is formed, by depositing a dielectric insulator (e.g. SiO.sub.2), etching it, having the etchings emerge at the level of the connections, depositing Cu to fill the etch holes, and finishing with a CMP (chemical mechanical polishing) to have a planar surface. This type of technology is generally known as damascene.