Eddy current inspection instrument with noise shaping filter
10684258 ยท 2020-06-16
Assignee
Inventors
Cpc classification
G01R25/00
PHYSICS
International classification
H04L25/49
ELECTRICITY
G01R25/00
PHYSICS
Abstract
Quantization noise in an oversampled eddy current digital drive circuit is reduced using a noise shaping filter.
Claims
1. A noise reduction circuit for non-destructive testing (NDT) of a test object with a NDT probe, the circuit comprising: a direct digital synthesizer (DDS); a noise shaping filter; a digital-to-analog converter (DAC); an analog filter; and amplifier; wherein the (DDS) is configured to produce a digital waveform having a periodic excitation frequency and having a number of bits equal to the sum of a first number of bits of the DAC and a second number of bits of the DDS; wherein the noise shaping filter is configured to produce a digital shaped output having a number of bits equal to the number of bits of the DAC according to the digital waveform and to shape a noise frequency distribution so that a first noise power corresponding to the excitation frequency is smaller than a second noise power corresponding to frequencies greater than the excitation frequency; wherein the (DAC) is configured to sample the digital shaped output at a sampling frequency and to produce an analog shaped output having a quantization noise power distributed according to the noise frequency distribution; wherein the analog filter is configured to produce an analog filtered output by removing from the analog shaped output signals having a frequency greater than a filter bandwidth; and wherein the amplifier is configured to amplify the analog filtered output to produce an amplified analog filtered output.
2. The circuit of claim 1 wherein the NDT probe is an eddy current probe.
3. The circuit of claim 1 wherein the amplified analog filtered output is a drive signal for the NDT probe.
4. The circuit of claim 1 wherein the amplifier comprises a pre-amplifier and a power amplifier.
5. The circuit of claim 1 wherein the digital waveform is a sine waveform.
6. The circuit of claim 1 wherein the DAC is a 12-bit converter and the DDS is a 20-bit synthesizer.
7. The circuit of claim 1 wherein the sampling frequency is greater than twice the excitation frequency.
8. The circuit of claim 1 wherein the sampling frequency is greater than one hundred times the excitation frequency.
9. A method of reducing noise in a circuit for non-destructive testing (NDT) of a test object with a NDT probe, the method comprising the steps of: producing a digital waveform having a periodic excitation frequency and having a number of bits equal to the sum of a first number of bits of a digital-to-analog converter (DAC) and a second number of bits of a direct digital synthesizer (DDS); shaping a noise frequency distribution of the digital waveform as a digital shaped output having a number of bits equal to the number of bits of the DAC according to the digital waveform and to shape a noise frequency distribution so that a first noise power corresponding to the excitation frequency is smaller than a second noise power corresponding to frequencies greater than the excitation frequency; converting the digital shaped output at a sampling frequency to an analog shaped output having a quantization noise power distributed according to the noise frequency distribution; filtering the analog shaped output to produce an analog filtered output by removing from the analog shaped output signals having a frequency greater than a filter bandwidth; and amplifying the analog filtered output to produce an amplified analog filtered output.
10. The method of claim 9 wherein the NDT probe is an eddy current probe.
11. The method of claim 9 wherein the amplified analog filtered output is a drive signal for the NDT probe.
12. The method of claim 9 wherein amplifying the analog filtered output to produce an amplified analog filtered output comprises pre-amplification and amplification.
13. The method of claim 9 wherein the digital output waveform is a sine waveform.
14. The method of claim 9 wherein the DAC is a 12-bit converter and the DDS is a 20-bit synthesizer.
15. The method of claim 9 wherein the sampling frequency is greater twice the excitation frequency.
16. The method of claim 9 wherein the sampling frequency is greater than one hundred times the excitation frequency.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1)
(2)
(3)
(4)
(5)
(6)
DETAILED DESCRIPTION OF PREFERRED EMBODIMENT
(7)
(8) DDS 16 is a digital circuit that generates the EC drive signal, which is typically a sine wave, but may be any combination of multiple sine waves, a chirp, or any other desired form of excitation signal. In order for noise shaping filter 18 to operate as designed, DDS 16 should have a higher number of bits than DAC 20. In an embodiment, DDS 16 is a 20 bit synthesizer.
(9) Noise shaping filter 18 is a key part of the present invention. Noise shaping filter 18 is implemented in digital electronics such as an FPGA, an ASIC, a microprocessor, or a microcontroller, and its function is to take an (N+M) bit input from DDS 16 and convert it to an N bit output, where N is the number of bits of DAC 20 and M is the number of additional bits of DDS 16.
(10) Noise-shaping is a technique generally used to increase the SNR in a specific frequency band of a signal. In the present invention, noise shaping is used to increase the SNR of excitation signal S-24. The SNR of excitation signal S-24 has an important effect on the productivity of EC NDT/NDI because with lower SNR it is necessary to average the EC measurement over more excitation cycles in order to filter out the noise. This reduces productivity by forcing a reduction in the probe scan speed to compensate for the added averaging cycles. In the worst case, the noise in excitation signal S-24 could altogether prevent a meaningful EC measurement. It is thus important to reduce the noise, thereby increasing the SNR in excitation signal S-24 as much as possible.
(11) An important part of the noise in excitation signal S-24 is the quantization noise in DAC 20. For an ideal DAC generating a sine wave, the SNR is given by (see for example W. R. Bennett, Spectra of Quantized Signals, Bell System Technical Journal, Vol. 27, July 1948, p 446-471):
SNR (dB)=6.02*N+1.76 dB(1)
where N is the number of bits. For an ideal DAC, the only noise is the quantization noise, hence the SNR is the ratio between the amplitudes of the sine wave and the quantization noise. For DAC 20 in an embodiment having 12 bits, the SNR according to equation (8) is 74 dB.
(12) DAC 20 samples the excitation signal at a sampling frequency f.sub.s which must respect the following equation (see, for example, Stremler, F. G. (1992), Introduction to Communication Systems, Addison Wesley Longman):
f.sub.s>2excitation frequency(2)
According to equation (2), the sampling frequency, f.sub.s, of DAC 20 should be at least twice the excitation frequency of the drive signal of probe 26. If f.sub.s is much higher than the excitation frequency, then the signal is said to be oversampled. For example, to generate a 100 kHz excitation signal the minimum sampling frequency is 200 kHz. Using a 100-MHz sampling frequency would be oversampling by a factor of 500.
(13)
(14)
where q is the least significant bit of DAC 20. Note that with oversampling, f.sub.s has a higher value, thereby spreading the noise over a larger frequency range.
(15)
10 log.sub.10(f.sub.s/2.Math.BW).(5)
This SNR improvement is known as the process gain. For example, when generating a 100-kHz excitation sine wave with a sampling frequency of 100 MHz with an ideal 12-bit DAC, the SNR is 74 dB (equation (1)). By filtering frequencies higher than 1 MHz, the process gain given by equation (5) is 10 log.sub.10 (100/2)=17 dB. Therefore the SNR of excitation signal 42 in
(16)
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(20) Although the present invention has been described in relation to particular embodiments thereof, it can be appreciated that various designs can be conceived based on the teachings of the present disclosure, and all are within the scope of the present disclosure.