Abstract
A resonant DC-DC converter may include an input for inputting a DC supply voltage, an output for providing a DC voltage to a load, an output rectifier to convert the converter voltage into a DC voltage, a resonant half-bridge inverter comprising two switches in series with a first serial resonant circuit to adjust the output current of the converter, and a second serial resonant circuit to block DC current in the converter and provide current continuity within the converter. The resonance of the first serial resonant circuit is measured after every start of the converter and each measurement defines the switching frequency of the half-bridge inverter. The switches of the half-bridge inverter wherein the driving of the half-bridge inverter includes a key gap during operation thereof. The resonance frequency of the second serial resonant circuit is at least slightly above the switching frequency of the half-bridge inverter.
Claims
1. A resonant DC-DC converter device comprising: an input for inputting a DC supply voltage; an output configured to provide a DC output voltage and an output current to a load; an output rectifier consisting of rectifier diodes configured to convert a converter voltage into the DC output voltage; a resonant half-bridge inverter comprising two switches in series configured to convert the DC supply voltage into the converter voltage; a first serial resonant circuit configured to adjust the output current; and a second serial resonant circuit configured to block a DC current flow in the converter and provide current continuity within the converter; wherein a resonance of the first serial resonant circuit is measured after every start-up of the converter and each measurement defines a switching frequency of the half-bridge inverter; wherein the driving of the half-bridge inverter includes a key gap during operation thereof; wherein the resonance frequency of the second serial resonant circuit is above the switching frequency of the half-bridge inverter.
2. The resonant DC-DC converter as claimed in claim 1, wherein the load comprises or consists of one or more light emitting diodes (LEDs).
3. The resonant DC-DC converter as claimed in claim 1, further comprising an output filter.
4. The resonant DC-DC converter as claimed in claim 1, wherein the switching frequency of the half-bridge inverter is fixed once the resonant DC-DC converter has started up.
5. The resonant DC-DC converter as claimed in claim 1, wherein the resonant DC-DC converter is a SELV (Safety Extra Low Voltage) converter.
6. The resonant DC-DC converter as claimed in claim 1, wherein the output rectifier is a voltage doubling Villard rectifier or Greinacher rectifier.
7. The resonant DC-DC converter as claimed in claim 1, wherein an inductance of the first serial resonant circuit is equal to an inductance of the second serial resonant circuit.
8. The resonant DC-DC converter as claimed in claim 7, wherein the inductance of the first serial resonant circuit and the inductance of the second serial resonant circuit are loosely coupled.
9. The resonant DC-DC converter as claimed in claim 8, wherein a coupling factor of the inductance of the first serial resonant circuit and the inductance of the second serial resonant circuit is below 0.5.
10. The resonant DC-DC converter as claimed in claim 7, wherein a capacitance of the second serial resonant circuit is less than a capacitance of the first serial resonant circuit.
11. The resonant DC-DC converter as claimed in claim 1, wherein the first resonance circuit and/or the second resonance circuit comprises one or more capacitors; wherein none of the one or more capacitors is switched in parallel to one of the switches of the resonant half-bridge inverter.
12. The resonant DC-DC converter as claimed in claim 1, wherein the first resonance circuit and/or the second resonance circuit comprises one or more capacitors; wherein none of the one or more capacitors is switched in parallel to one of the rectifier diodes.
13. The resonant DC-DC converter as claimed in claim 1, wherein the output current is adjusted via dimensioning of the first serial resonant circuit based on an occurring minimum of the DC supply voltage.
14. The resonant DC-DC converter as claimed in claim 13, wherein the first serial resonant circuit and the second serial resonant circuit are configured to be dimensioned independently from each other, such that the output current occurs independently from an output voltage when the load is connected.
15. The resonant DC-DC converter as claimed in claim 14, further comprising a power output that is adjustable by driving the two switches of the resonant half-bridge inverter with a pulse width modulation (PWM) having a pre-defined duty cycle within the inverter.
16. A control method for the resonant DC-DC converter as claimed in claim 1, wherein the control method comprises: providing a static control curve based on a duty cycle and the output current, providing a pre-defined minimum occurring supply voltage, measuring a real-time supply voltage related to said minimum occurring supply voltage, determining a deviation factor between the pre-defined minimum occurring supply voltage and the measured real-time supply voltage, and performing a real-time multiplication of the static control curve and said deviation factor to obtain a dynamic control curve; driving the two inverter switches based on the dynamic control curve.
17. The control method as claimed in claim 16, wherein the static control curve comprises: a maximum at a symmetrical driving point where the duty cycle is 0.5; zeros at two points where the duty cycle is 0 and 1; and the static control curve is symmetrically arranged around the axis defined by said maximum.
18. The control method as claimed in claim 17, wherein the static control curve is formed by a second-order parabola being open downwards.
19. The control method as claimed in claim 17, further comprising: determining a level to cut the dynamic control curve based on the maximum of the static control curve; determining two possible points at the cut of the dynamic control curve; and asymmetrically driving the half bridge inverter to provide an adjusted output current to the load.
20. The control method as claimed in claim 19, further comprising: determining two new duty cycle points by moving the two possible points from a maximum level downwards; and asymmetrically driving the half bridge inverter to provide an output current to the load where the output current is less than the adjusted output current for the load.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0056] Further advantages, features and details will be apparent from the following description of embodiments and from the drawings, in which identical or functionally identical elements are provided with identical reference signs. The drawings illustrate non-limiting embodiments and, together with the description, serve for explanation thereof. The elements and structures shown in the drawings are not necessarily shown to scale relative to each other.
[0057] FIG. 1 depicts a non-limiting embodiment of a resonant DC-DC converter,
[0058] FIG. 2 depicts a non-limiting embodiment of the resonant DC-DC converter with loosely coupled inductors,
[0059] FIG. 3 depicts a non-limiting embodiment of the resonant DC-DC converter employing a voltage-doubling rectifier,
[0060] FIG. 4 depicts a non-limiting embodiment of the resonant DC-DC converter with loosely coupled inductors and employing a voltage-doubling rectifier,
[0061] FIGS. 5A-5E depict the traces of important voltages and currents from the embodiment depicted in FIG. 1,
[0062] FIGS. 6A-6E depict the traces of some important voltages and currents from the embodiment depicted in FIG. 3,
[0063] FIG. 7a depicts the design point for the resonant DC-DC converter at minimum occurring supply voltage showing a static control curve,
[0064] FIG. 7b depicts a normal operating point showing a dynamic control curve,
[0065] FIG. 7c depicts a dimmed operating point, and
[0066] FIG. 8 depicts a flow diagram for a control method.
DETAILED DESCRIPTION OF EMBODIMENTS
[0067] FIG. 1 depicts a resonant DC-DC converter as a non-limiting embodiment, having an input DC source as its energy supply Vdc on its left side, followed by an electromagnetic interference (EMI) Filter as an input filter for filtering radio frequency interferences produced by the DC-DC converter and irradiated into the mains which is terminated by a capacitor C_in. This capacitor may be a storage or smoothing capacitor at the same time. The input filter is low-ohmic and generally has a small capacitance for shorting the X-voltage ripple and has a small inductance for smoothing the x-current ripple, and should have a high inductance which can be realized by common-mode chokes for blocking the Y-voltage ripple. If necessary, a rectifier can be integrated within the input filter for POE applications, or both a mains rectifier and a power factor corrector (PFC) can be integrated there (both not shown) for standard public mains power supply. Generally speaking, C_in is charged to the DC supply voltage Vdc. The outer electrodes of a series of two active electronic inverter switches 33, 35—hereinafter referred to as converter switches—are connected to this capacitor C_in to build a half-bridge inverter 3. The connection point or midpoint between the inner electrodes of the active inverter switches 33, 35 defines the inverter output having its inverter output voltage 31. A first serial resonant circuit 1 may include an inductor L1 and a capacitor C1, which form an AC voltage to current converter, and is coupled to said midpoint or inverter output voltage 31 as its corresponding midpoint voltage, whereby the inductor L1 is directly connected to the midpoint 31. A resonance frequency between the inductor L1 and the capacitor C1 is measured at each start-up of the whole resonant DC-DC converter and defines the switching frequency to be used for a continuing operation of its half-bridge inverter 3 until a shut-down, which safeguards said conversion properties of the first serial resonant circuit 1. Because of that, the first serial resonant circuit may also be referred to as a converting resonant circuit 1. The resonance capacitor C1 may be connected with the lower outer electrode of the inverter. But the capacitor C1 can be forked as well—to half the capacity of the capacitor C1 and advantageously connect to both outer electrodes of the half-bridge inverter (not shown). A single resonance capacitor C1 can also be connected with the upper outer electrode of the half-bridge inverter only (not shown).
[0068] Coupled at a node 12 between the resonance capacitor C1 and resonance inductor L1, a second serial resonant circuit 2 may include or consist of a current source inductor L2 and a blocking capacitor C2. The second serial resonant circuit 2 forms a DC blocking and current continuity branch. The second resonant circuit 2 may also be referred to as a continuing resonant circuit 2. The values of the two inductors L1 and L2 may have similar or equal values. So, two equal components comprising the same cores, bobbins, winding wires, and turns' numbers can be used for both inductors L1 and L2. The current source inductor L2 may provide continuity of a current I.sub.AC delivered to all downstream stages by reducing the current harmonic content within the current I.sub.AC. The blocking capacitor C2 buffers, e.g. isolates, DC voltage deviations between inverter output voltage 31 and rectifier input voltage 37 of the resonant DC-DC converter. Thus, the blocking capacitor C2 blocks any DC current component within the current I.sub.AC through the current source inductor L2 in series to the capacitor C2 and through the input of the downstream output rectifier 4. The input voltage is a converter voltage 37 and has the same frequency as the switching frequency of the half-bridge inverter 3. The output rectifier 4 may be a full-wave rectifier having four fast rectifier diodes in Graetz bridge configuration. The output filter 5 may include one filter capacitor C_out that is connected directly in parallel with the rectifier's output and may be recharged to a DC output voltage 6 by the output current of the rectifier 4. The discharge current I.sub.LED powers the load, such as at least one LED or a LED string having a series connection of LED1, LED2, etc., until LEDn, which are connected in parallel to the filter capacitor C_out. Thus, the sum of the forward voltages of each LED connected to the filter capacitor C_out or to the output filter 5 equals the DC output voltage 6.
[0069] The blocking capacitor C2 may have a set value such that together with the current source inductor L2, the second serial resonant circuit 2 may have a resonance frequency above or at least slightly above the switching frequency of the inverter. With the inductivities of the inductors L1 and L2 being equal or substantially equal, the capacity of the blocking capacitor C2 is less than or at least slightly less than the capacity of the resonance capacitor C1. Though the second serial resonant circuit 2 may be operated below its resonance and is thus capacitive with respect to the inverter's switching frequency, it is this measure that maintains the zero-voltage switching or ZVS operation mode for both active switches 33, 35 of the half-bridge inverter 3. Mirrored by a “Tau” having both inductors L2 and L1 in its bar and the resonance capacitor C1 in its pole, the blocking capacitor C2 may provide sufficient reflected inductive impedance for the inverter output 31 and reflects sufficient but not too much inductive energy back to half-bridge inverter 3 as needed for the ZVS operation mode.
[0070] When the first serial resonant circuit 1 comprising L1 and C1, forming the AC voltage to current converter, is driven at its resonance frequency being the switching frequency f.sub.SW of the half-bridge inverter 3, where L1 is connected directly to the midpoint 31, and if a pure alternating current I.sub.AC is drained from the node 12 between L1 and C1 by said second serial resonant circuit 2 in a capacitive mode, then the root mean square of the output rectifier's input current I.sub.AC follows the formula
I.sub.ACrms=8*f.sub.SW*Vdc/L1
and becomes completely independent of the load value as long as the static resistance value of the actually connected load is not higher than a hundred times the dimensioning resistance given by the square root of the first resonance inductance in Henry divided by the first resonance capacitance in Farad. The output current I.sub.LED is equal to the rectified value of I.sub.AC, and the switching frequency f.sub.SW and the resonance inductivity L1 are fixed values, so the output current only depends on the input voltage Vdc, which makes a complicated measurement and closed-loop control of the output current superfluous. The resonant DC-DC converter is advantageous for this reason.
[0071] Additional benefits include autonomy of both serial resonant circuits 1 and 2, the AC voltage to current converter out of L1 and C1, and the DC blocking and current continuity branch out of L2 and C2, from the switching activities of the inverter 3 and the converting activities of the rectifier 4. Then, an intrinsic current stability is possible. A zero-output voltage is no problem because the resonant DC-DC converter automatically limits its output short-circuit current to its intrinsic current. Both stabilities, for intrinsic output current and against output short-circuits, are possible if both serial resonant circuits, the converting resonant circuit 1 and the continuing resonant circuit 2, act independently from the inverter and rectifier because no time-dependent or time-sequential or repetitive modifications of any resonant circuit caused by these operations may occur. Otherwise, the effective resonance frequency of any resonant circuit would be modified yielding the resonant circuits' characteristics as effective which causes crosstalk between the output voltage and output current. To avoid this crosstalk, the resonance elements are neither directly paralleled by an active inverter switch nor by a rectifier diode or similar component.
[0072] FIG. 2 illustrates a loose coupling 21 between the inductors L1 and L2. Doing so, a core and some space may be saved, but the coupling factor must be less than 0.5 to keep the functions of the involved resonant circuits 1 and 2 different enough to preserve the advantages of the topology disclosed herein. Also important is the orientation of the windings within the inductors to be coupled to each other within the loose coupling 21. The loose coupling 21 has windings that are oriented opposite to the inverter 3. The loosely coupled component 21 has no core, so this allows for a coupling factor below 0.5. “Loosely coupled” as used herein refers to a coupling factor of an inductance of a first serial resonant circuit and an inductance of a second serial resonant circuit being below 0.5, which results in a bifilar air choke having equal turn numbers for L1 and L2 and thus equal values for both single inductors, respectively.
[0073] FIG. 3 is similar to FIG. 1 but replaces the general rectifier 4 with a voltage-doubling rectifier 24 comprising two equally oriented and serially connected fast rectifier diodes D1 and D2 according to Greinacher i.e., supplied at its midpoint by a DC blocking capacitor C2, and according to Villard e.g., thus with pure AC current I.sub.AC. Modified like this, the resonant DC-DC converter has about double its original output voltage and about half of its original output current and obtains a general ground line connected to both the lower ends of C_in and C_out as another big advantage that the Graetz bridge output rectifier 4 does not have. The only disadvantage of the circuit depicted in FIG. 3 is the relatively low voltage and thus high current in the region around node 12 between both resonant circuits 1 and 2. But a doubling of an output voltage of the resonant DC-DC converter could be generally advantageous particularly at very low input or supply voltages Vdc of 5 V or 12 V e.g. for operating LED loads.
[0074] FIG. 4 is similar to FIGS. 2 and 3, i.e. a loose coupling 21 between the two inductors L1 and L2 is depicted, as well as a voltage-doubling rectifier 24. The differences, advantages, and limitations regarding coupling factor and windings' orientations are the same here like described for FIG. 2.
[0075] FIGS. 5A-5E show the traces of some crucial voltages and currents in a circuit according to the first embodiment of FIG. 1. The two traces G_down and G_up of FIG. 5A illustrate the control signals for the two active inverter switches 33, 35 where a high level indicates a conducting switch and a low level a blocking switch. Seen together with the trace of FIG. 5B, this means that G_down is the control signal for the lower switch 35 and that G_up is the control signal for the upper switch 33 of the half bridge inverter 3. FIG. 5B illustrates the inverter output voltage 31 being the input voltage for the first resonant circuit 1 or AC voltage to current converter including or consisting of L1 and C1. The inverter output voltage 31 has a constant low level when the lower active inverter switch is conducting and a constant high level when the upper active inverter switch is conducting. FIG. 5C shows the current I(L1) through the resonance inductor L1, i.e. the inverter output current. The maintenance of the ZVS conditions can be recognized from this. When the inverter output voltage goes down, the inverter output current remains positive, and if the inverter output voltages goes up, the inverter output current remains negative. The current is lagging its driving voltage, and the complete load behaves inductively. Therefore, there is always enough inductive energy available to help the half bridge inverter 3 commutate to a new output voltage 31 level. So, each active inverter switch is turned on without voltage to minimize losses and minimize RFI noise. The dead times or key gaps between the control signals G_down and G_up in FIG. 5A are mandatory for this ZVS operation mode to allow the half-bridge inverter 3 enough time to commutate to its new output voltage. FIG. 5D shows the trace of the current I.sub.AC through the blocking capacitor C2 and into the output rectifier 4, the capacitive tuning of which can be recognized by the repetitive concave sections of this trace. FIG. 5E shows the flat trace of the output current I.sub.LED of the whole resonant DC-DC converter, the current of which is smoothed by the output filter capacitor C_out and is outputted to power a load, such as a LED string.
[0076] FIGS. 5A and 5B show the half bridge inverter 3 being driven asymmetrically. This operation is called “duty cycle control” and is rarely used in combination with resonant half bridge inverters. When driven symmetrically, or even driving with a duty value being D=0.5, each resonant half-bridge inverter transmits its maximum power, and the control becomes asymmetric, and less power is transmitted. More details will be explained in FIG. 7A. Since a real supply voltage Vdc is larger than a minimum occurring supply voltage, the counteraction of said duty cycle control is a duty value shift versus values being above or below D=0.5 as further explained in FIG. 7B. As already mentioned regarding FIG. 5A, dead times or key gaps between the control signals G_down and G_up are mandatory for a smooth operation of each half-bridge inverter, as seen in FIG. 5B showing its output voltage 31. Its slopes are not vertical. And—typical for an asymmetrical driving—the slope following a shorter on-time, i.e. within one switching period of the voltage 31, depicted by the shorter horizontal section of the trace within the switching period, rises or falls faster than the slope following a longer on-time, i.e. within the same switching period of the voltage 31, depicted by the longer horizontal section of the trace within the switching period. In asymmetrical driving, there is always a time period that is shorter than the other, which is what is referenced with respect to “shorter” on-time and “longer” on-time. Here, voltage 31 falls faster than it rises, as the high-side switch 33 conducts for a shorter time than the low-side switch 35.
[0077] FIGS. 6A-6E show the same voltage and current traces like FIGS. 5A-5E but with a resonant DC-DC converter having a voltage-doubling output rectifier 24 from FIG. 3 employing only two rectifier diodes D1 and D2 therein. FIG. 6E depicts half of the output current value I.sub.LED with respect to FIG. 5E. The current I.sub.AC through the blocking capacitor C2 from both FIGS. 5D and 6D highlights another difference between the circuits depicted in FIGS. 1 and 3, respectively. Here in FIG. 6D, the trace of I.sub.AC is much more asymmetrical than the trace in FIG. 5D. Because of the asymmetrical output rectifier 24, the original pure blocking capacitor C2 becomes a pumping capacitor on top, which causes the voltage to double. The repetitive interchanging activities “recharging” and “pumping” and the halved pulse frequency for charging the output filter capacitor C_out causes the higher asymmetry. Apart from that, all traces of FIGS. 6A-6C are almost equal to that of FIGS. 5A-5C, generally illustrating that the resonant DC-DC converter is suitable for a intrinsically output current stability.
[0078] FIG. 7a shows a design parameter for the DC-DC converter. At symmetrical driving with a duty cycle value D=½, each resonant DC-DC converter showing a half-bridge inverter transmits a maximum power, and the I.sub.LED is ensured to build up the maximum output voltage as specified in the requirements for the DC-DC converter. As the driving becomes asymmetrical, less power is transmitted. The orientation of this asymmetry, whether it is the upper or the lower active inverter switch 33, 35 conducting longer, does not affect this power reduction. The design parameter, at a minimum occurring DC supply voltage V.sub.dcMin to be stored or otherwise memorized in the converter's controller, at nominal, i.e. maximum rated, output current I.sub.LED, and at maximum specified output voltage, is at the edge of a possible operation region where each control may become disengaged. “Nominal current” as used herein refers to a quantifiable amount of current that would be expected to flow through a circuit at any given time based on the relationship of power (watts)=potential energy (volts) x Amps (intensity of electrical current).
[0079] For all other operating points having less input current, such as at a DC supply voltage Vdc being higher than its minimum V.sub.dcMin, the static characteristic of the duty cycle control or asymmetrical driving for pure-AC rectified electrical output values is a part of a 2.sup.nd order parabola 71, herein referred to as a design parabola or static control curve and memorized in the controller as well. The 2.sup.nd order parabola is symmetrical around a duty cycle value D=½ and has a maximum at I.sub.LED, is open downwards, and has two zero points on the D-axis of the respective graph at D=0 and at D=1, i.e. extremely asymmetrical driving. At a static duty cycle of any value D and at a switching frequency on resonance between L1 and C1, the output power increases proportional to an increasing supply voltage Vdc. This turns into a growth of the output current I.sub.LED being proportional to an increase of Vdc where the output voltage 6 is fixed by the forward voltage of a load, such as a LED string. The supply voltage fluctuation is the only remaining disturbance based on the intrinsic current stability, more particularly the pre-determined and constant I.sub.LED-to-Vdc ratio, which is ensured by the topology of the resonant DC-DC converter and which is verified by measurement of the L1-C1 resonance frequency at each start-up.
[0080] FIG. 7b shows a real operation point having the supply voltage Vdc being higher than V.sub.dcMin, as mentioned from above. Then, the counteraction of the duty cycle control is an asymmetrical driving via a duty cycle value shift off D=½. For that, just the supply voltage Vdc must be measured and compared with said minimum occurring supply voltage V.sub.dcMin to determine a deviation factor 70. In other words, the actual supply voltage Vdc is measured relative to the memorized or pre-defined V.sub.dcMin stored in the controller. According to the static control curve 71, a second parabola or a dynamic control curve 72 is derived from the design parabola 71 by enlarging all values by said deviation factor 70, more exactly by said factor >1 between Vdc and V.sub.dcMin. Two duty cycle points D.sub.A and D.sub.B can be determined which fit to the deviation factor 70 between measured value Vdc and pre-determined minimum occurring value V.sub.dcMin of the DC supply voltage. Cutting the second parabola 72 at the maximum height of the design parabola 71 yields the two fitting points D.sub.A<½, when e.g. the low-side active inverter switch 35 is conducting shorter, and D.sub.B>½ exactly symmetrically with D.sub.A around D=½, when e.g. the high-side active inverter switch 33 is conducting shorter. With this, the control of the output current I.sub.LED of the resonant DC-DC converter has been altered to its input which is very advantageous for each converter having an isolation transformer. The I.sub.LED-to-Vdc ratio must be input into the resonant DC-DC converter by design and must be verified by measurement of the L1-C1 resonance frequency and by synchronization of the inverter's switching frequency on it at each start-up to keep this control method reliable and exactly working. When the actual supply voltage Vdc accidentally—e.g. during ramp-up or mains fault—is less than the minimum occurring supply voltage V.sub.dcMin in normal circumstances, the deviation factor 70 becomes <1, such that there are no intersections between the horizontal at the maximum of the design parabola 71 and the dynamic control curve 72. The duty cycle value remains at D=0.5 which defines the situation with Vdc=V.sub.dcMin (FIG. 7A) and the situation with Vdc<V.sub.dcMin (not shown).
[0081] The supply voltage Vdc given for the traces of FIG. 5 is a bit higher than the minimum occurring voltage V.sub.dcMin as the duty cycle value for its asymmetrical driving is not far from D=0.5, and because said maximum at a duty cycle ratio D=½ within the dynamic control curve 72 is part of a rounded peak. Thus, a lot of duty cycle shift is necessary to compensate for a supply voltage deviation factor 70 being less than the level of I.sub.LED like shown here in FIG. 7b, and vice versa: As the duty cycle ratio shown in FIG. 5 is larger than D.sub.A or less than D.sub.B respectively, the actual supply voltage Vdc from FIG. 5 is less than depicted here in FIG. 7b and just a little higher than the minimum occurring voltage V.sub.dcMin.
[0082] In FIG. 7c, the designed or nominal, i.e. maximum rated, output current I.sub.LED is depicted versus lower values I.sub.LEDc. The second parabola 72 is proportional to the actual Vdc value. Therefore, the second parabola 72 is the dynamic control curve and is followed along its short partitions 73 and 74 originating at the level I.sub.LED and heading downwards to the lower level I.sub.LEDc for determining new duty cycle points D.sub.E<D.sub.A and D.sub.D>D.sub.B fitting to the new and dimmed output current I.sub.LEDc, wherein D.sub.D again is exactly symmetrical with D.sub.E around D=½. When the half-bridge inverter 3 works asymmetrically according to a duty cycle value D=D.sub.E or D=D.sub.D, then a dimmed output current of the desired value I.sub.LEDc occurs. Thus, the dimmability of the LED strings as loads of the resonant DC-DC converter driven by the control shown above has been demonstrated.
[0083] FIG. 8 depicts a control method for determining the inputs from the FIGS. 7A-7C. The actual supply voltage is measured in real-time, and all results are permanently divided by the value of the pre-determined minimum occurring supply voltage which value is stored or otherwise memorized in the controller of the resonant DC-DC converter. In other words, the actual supply voltage is measured relative to the pre-determined minimum occurring supply voltage. This yields a deviation factor, and a static control curve may be multiplied with the deviation factor to obtain a dynamic control curve. Said static control curve is pre-determined and stored in the controller of the resonant DC-DC converter. Then, an intersection process takes place like described in the following. The desired output current level is divided by the maximum rated output current yielding a current output level <1, and a current output level=1 is obtained when at a maximum the nominal or rated output current is desired. The current output level becomes intersected with the dynamic control curve yielding in most cases two intersection points. The corresponding duty cycle values are <½ and >½ and are symmetrical around a duty cycle=½ and such two symmetrical values may be used as possible inputs for the half-bridge inverter of the resonant DC-DC converter. All sections described above are depicted in solid lines as they represent the controller. If there is no intersection, the duty cycle=½ remains unchanged.
[0084] All boxes representing the power and its effects are depicted in dashed lines. The resonant DC-DC converter pulls an output power from its supply voltage source according to the dynamic duty cycle values as inputted into the resonant DC-DC converter. This influences the actual or real-time supply voltage, mostly for the lower values of the real-time supply voltage the more output power is pulled. Reason for the lower values is the source resistance of the supply voltage source. The portion of FIG. 8 controlled or determined by the DC-DC converter is represented by the action boxes having a solid boundary line. The source resistance builds a closed loop because the modification of the control curve by the resonant DC-DC converter modifies an input value for the real-time supply voltage.
TABLE-US-00001 TABLE OF REFERENCE DESIGNATORS 1 First resonant circuit or an AC voltage to current converter 2 Second resonant circuit or a DC blocking and current continuity branch 3 Half-bridge inverter 4 Output rectifier employing a Graetz bridge 24 Output rectifier employing a Greinacher and Villard circuit 5 Output filter 6 DC voltage at the output of a resonant DC-DC converter 12 Node between first and second resonant circuits 21 Loose coupling between both resonant circuits 31 Inverting half-bridge’s output voltage or output port or midpoint 33 High-side switch 35 Low-side switch 37 Converter output voltage or converter voltage or rectifier input voltage 70 Input or DC supply voltage deviation 71 Design parabola or static control curve 72 Operation parabola or dynamic control curve 73 Dynamic control curve’s partition for dimming with D less than ½ 74 Dynamic control curve’s partition for dimming with D larger than ½
