Methods and apparatus for duplexing signals

10680724 ยท 2020-06-09

Assignee

Inventors

Cpc classification

International classification

Abstract

A duplexing apparatus comprises a reference of impedance settings and corresponding calibration measurements. A controller is arranged to set a variable impedance to a first impedance setting and transmit a first transmit signal at a first transmit frequency and measure a resulting first signal at an output node of a hybrid circuit. The controller then selects a second impedance setting, transmits a second transmit signal at a second transmit frequency and measures a resulting second signal at the output node. The controller then determines a balancing result using a system of equations associating the first and second measured signals, and first and second calibration measurements from the reference in respect of the first and second impedance settings, respectively. A third impedance setting is retrieved from the reference by reference to the balancing result to provide isolation of an input node from the output node of the hybrid circuit.

Claims

1. An apparatus for duplexing signals to be transmitted and received wirelessly by an antenna, the apparatus comprising: a hybrid circuit comprising an antenna node for coupling to the antenna, an input node for receiving a signal to be transmitted wirelessly by the antenna, an output node for outputting a signal received wirelessly by the antenna, and a balancing node; a variable impedance operably coupled to the balancing node, the variable impedance comprising a control input to select an impedance setting of the variable impedance; a data store comprising a reference of impedance settings and corresponding calibration measurements in respect of a consistent impedance applied to the antenna node of the hybrid circuit, the impedance settings corresponding to impedances; and a controller arranged to: set the variable impedance to a first impedance setting; transmit a first transmit signal at a first transmit frequency in a first frequency band; measure a first signal at the output node at a first receive frequency in a second frequency band as a result of the first signal transmitted at the first transmit frequency; select a second impedance setting; transmit a second transmit signal at a second transmit frequency in the first frequency band; measure a second signal at the output node at a second receive frequency in the second frequency band as a result of the second signal transmitted at the second transmit frequency; employ a system of equations comprising variables associating the first measured signal, the second measured signal, a first calibration measurement from the record of associations in respect of the first impedance setting, and a second calibration measurement from the record of associations in respect of the second impedance setting; determine a balancing result using the system of equations; and retrieve a third impedance setting from the record of associations by reference to the balancing result, the third impedance setting providing isolation of the input node from the output node of the hybrid circuit.

2. The apparatus of claim 1, wherein the reference of impedance settings and corresponding calibration measurements is a record of associations between a plurality of impedance settings and a plurality of respective calibration measurements in respect of the consistent impedance applied to the antenna node, the plurality of impedance settings corresponding to a plurality of impedances, respectively.

3. The apparatus of claim 1, wherein the control input of the variable impedance is continuously variable or discrete.

4. The apparatus of claim 1, wherein the reference comprises an equation recording the relationship between the calibration measurements and the impedance settings.

5. The apparatus of claim 1, wherein the controller is further arranged to: vary the impedance value using the control input to provide the plurality of impedance settings and to generate a record of associations between the plurality of impedance settings and a plurality of respective calibration measurements.

6. The apparatus of claim 1, wherein the control input of the variable impedance comprises a set of selectable settings, the plurality of impedance settings respectively corresponding to a number of the set of possible settings of the variable impedance.

7. The apparatus of claim 6, wherein the plurality of impedance settings respectively corresponds to the set of selectable settings of the variable impedance.

8. The apparatus of claim 6, wherein the number of the set of selectable settings of the variable impedance is a subset of the set of selectable settings of the variable impedance.

9. The apparatus of claim 8, wherein the subset of the set of selectable settings of the variable impedance comprises between about 100 and about 1000 variable impedance setting of the selectable settings of the variable impedance.

10. The apparatus of claim 1, wherein the controller is further arranged to: for each measurement of the first and second signals, calculate respective quantities representing a first measured gain and a second measured gain; access the data store and retrieve the first calibration measurement and the second calibration measurement from the record of associations by reference to the first and second impedance settings, respectively; and control the variable impedance as a function of the respective quantities and the retrieved first and second transmit-receive gains.

11. The apparatus of claim 1, wherein the controller is configured to carry out operations periodically to determine the third impedance setting.

12. The apparatus of claim 1, wherein the controller is arranged to evaluate: G 1 ( , X 1 ) ( C ( , X 1 ) - C ( , X 2 ) ) G 2 ( , X 2 ) - G 1 ( , X 1 ) + C ( , X 1 ) to obtain the third balancing result, where G.sub.1 is a first measured transmit-receive gain, G.sub.2 is a second measured transmit-receive gain, C is the calibration measurement, X.sub.1 is the first impedance setting, X.sub.2 is the second impedance setting, and is frequency.

13. The apparatus of claim 1, wherein the system of equations employed comprises variables associating the first measured signal, the second measured signal, the first impedance setting, the second impedance setting, the first transmitted signal, the second transmitted signal, a first calibration measurement and a second calibration measurement.

14. The apparatus of claim 1, wherein the system of equations models a transmit-receive gain variable as a function of a calibration measurement variable that can be related to the impedance setting of the variable impedance.

15. The apparatus of claim 6, wherein: the third impedance setting constitutes a coarse impedance setting for isolating the input node from the output node of the hybrid circuit, and the controller is further arranged to: iteratively vary the impedance setting starting from the third impedance setting to search for an optimum impedance setting that maximises isolation between the input node and the output node of the hybrid circuit.

16. The apparatus as claimed in claim 15, wherein the iterative variation of the impedance setting is an iterative linear variation of the impedance setting.

17. The apparatus of claim 15, further comprising: an adaptive active signal cancellation subsystem configured to provide cancellation substantially contemporaneously with the iterative variation of the impedance setting.

18. The apparatus of claim 1, wherein the first calibration measurement is a first transmit-receive gain and the second calibration measurement is a second transmit-receive gain.

19. A method of duplexing signals to be transmitted wirelessly and signals received wirelessly by an antenna in a system comprising a hybrid circuit including an antenna node for coupling to the antenna, an input node for receiving a signal to be transmitted by the antenna, an output node for outputting a signal received wirelessly by the antenna, a balancing node, a variable impedance coupled to the balancing node, the variable impedance comprising a control input to select an impedance setting of the variable impedance, and a data store comprising a reference of impedance settings and corresponding calibration measurements in respect of a consistent impedance applied to the antenna node of the hybrid circuit, the impedance settings corresponding to impedances, respectively, the method comprising: setting the variable impedance to a first impedance setting; transmitting a first transmit signal at a first transmit frequency in a first frequency band; measuring a first signal at the output node at a first receive frequency in a second frequency band as a result of the first signal transmitted at the first transmit frequency; selecting a second impedance setting; transmit a second transmit signal at a second transmit frequency in the first frequency band; measuring a second signal at the output node at a second receive frequency in the second frequency band as a result of the second signal transmitted at the second transmit frequency; employing a system of equations comprising variables associating the first measured signal, the second measured signal, a first calibration measurement from the record of associations in respect of the first impedance setting, and a second calibration measurement from the record of associations in respect of the second impedance setting; determining a balancing result using the system of equations; and retrieving a third impedance setting from the record of associations by reference to the balancing result, the third impedance setting providing isolation of the input node from the output node of the hybrid circuit.

20. A non-transitory processor-readable medium storing instructions that are executable by one or more processors of an apparatus to perform a method for duplexing signals to be transmitted wirelessly and signals received wirelessly by an antenna in a system comprising a hybrid circuit including an antenna node for coupling to the antenna, an input node for receiving a signal to be transmitted by the antenna, an output node for outputting a signal received wirelessly by the antenna, a balancing node, a variable impedance coupled to the balancing node, the variable impedance comprising a control input to select an impedance setting of the variable impedance, and a data store comprising a reference of impedance settings and corresponding calibration measurements in respect of a consistent impedance applied to the antenna node of the hybrid circuit, the impedance settings corresponding to impedances, respectively the method comprising: setting the variable impedance to a first impedance setting; transmitting a first transmit signal at a first transmit frequency in a first frequency band; measuring a first signal at the output node at a first receive frequency in a second frequency band as a result of the first signal transmitted at the first transmit frequency; selecting a second impedance setting; transmit a second transmit signal at a second transmit frequency in the first frequency band; measuring a second signal at the output node at a second receive frequency in the second frequency band as a result of the second signal transmitted at the second transmit frequency; employing a system of equations comprising variables associating the first measured signal, the second measured signal, a first calibration measurement from the record of associations in respect of the first impedance setting, and a second calibration measurement from the record of associations in respect of the second impedance setting; determining a balancing result using the system of equations; and retrieving a third impedance setting from the record of associations by reference to the balancing result, the third impedance setting providing isolation of the input node from the output node of the hybrid circuit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) At least one embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

(2) FIG. 1 is a schematic diagram of a device comprising a duplexing apparatus constituting an embodiment of the invention;

(3) FIG. 2 is a flow diagram of a calibration of the duplexing apparatus of FIG. 1 and constituting another embodiment of the invention;

(4) FIG. 3 is a flow diagram of a method of duplexing in the duplexing apparatus of FIG. 1 and constituting a further embodiment of the invention;

(5) FIG. 4 is a flow diagram of another method of duplexing in the duplexing apparatus of FIG. 1 and constituting yet another embodiment of the invention;

(6) FIG. 5 is a flow diagram of an iterative algorithm of FIG. 4 in greater detail;

(7) FIG. 6 is a flow diagram of a further method of duplexing in the duplexing apparatus of FIG. 1, as modified by the apparatus of FIG. 7 below, and constituting another embodiment of the invention; and

(8) FIG. 7 is the additional part of the duplexing apparatus of FIG. 1 used in relation to the further method of FIG. 6.

DETAILED DESCRIPTION

(9) Throughout the following description, identical reference numerals will be used to identify like parts. References herein to ports should be understood also to refer to nodes and vice versa.

(10) Referring to FIG. 1, a wireless communications device 100 employing a duplexing apparatus comprises a transmission path 102, the transmission path 102 comprising a baseband processor 104 coupled to a Digital-to-Analogue converter (DAC) 106 via a first data bus 105. The DAC 106 has an in-phase (I) component output and a quadrature (Q) component output, both coupled to corresponding inputs of a first mixer 108. An output of the first mixer 108 is coupled to an input of a power amplifier 110, an output of the power amplifier 110 being coupled to a transmit port 112 of a hybrid circuit 114, or hybrid junction. A receive port 116 of the hybrid circuit 114 is coupled to an input of a low-noise amplifier 118. An output of the low-noise amplifier 118 is coupled to other downstream components of a receiver chain. As these components of the remainder of the receiver chain would be readily understood by the skilled person and have no bearing on an understanding of the examples set forth herein, they will not be described in further detail herein.

(11) A feedback path is provided that comprises a second mixer 120 having an input coupled to the output of the low-noise amplifier 118. An in-phase component output and a quadrature component output of the second mixer 120 are respectively coupled to a first low-pass filter 122 and a second low-pass filter 124, which are part of the feedback path, the first and second low-pass filters 122, 124 being coupled to respective inputs of an Analogue-to-Digital converter (ADC) 126. An output of the ADC 126, which is also part of the feedback path, is coupled to a first input of a processor 128, for example a microprocessor, via a second data bus 127, a first output of the processor 128 being operably coupled to an input of the baseband processor 104. A second input of the processor 128 is coupled to the first data bus 105.

(12) A second output of the processor 128 is coupled to a control input of a variable impedance 130, the variable impedance 130 being coupled to a balance port 132 of the hybrid circuit 114. A third output of the processor 128 is coupled to an input of a local oscillator 134, a first output of the local oscillator 134 is coupled to the first mixer 108 and a second output of the local oscillator 134 is coupled to the second mixer 120. The processor 128 is also coupled to a memory 136, constituting a data store. In this example, the memory stores reference information, for example a lookup table 138.

(13) An antenna 140 is coupled to an antenna port 142 of the hybrid circuit 114.

(14) In operation, the processor 128 controls the device 100 generally. Indeed, the processor 128 constitutes a processing resource that, in this example, serves as a controller. The processor 128 particularly controls the duplexing operation in a manner described in more detail hereinbelow.

(15) The baseband processor 104 communicates with the processor 128. The processor 128 and/or the baseband processor can have access to the memory 136, which also stores information to be transmitted by the wireless device 100.

(16) The baseband processor 104 generates one or more output signals to be transmitted by the device 100. In this example, as implied above, these signals are digital, and expressed as quadrature (Q) and in-phase (I) components. Those skilled in the art will appreciate that alternative modulation schemes are possible.

(17) The signals output from the baseband processor 104 are input to the DAC 106, and converted to the analogue domain. The signals output from the baseband processor 104 can also be input to the processor 128 to provide any necessary feedback. The analogue signals are up-converted to radio frequency in the mixer 108, by mixing with radio frequency signals generated by the local oscillator 134 under the control of the processor 128, and input to the power amplifier 110 for amplification prior to transmission via the hybrid circuit 114 and the antenna 140.

(18) A receive path 144 of the device 100, in which the low-noise amplifier 118 resides, processes signals received by the antenna 140 via the hybrid circuit 114. The feedback path is provided for the purpose of calibrating the duplexing operation of the hybrid circuit 114, as well as balancing the hybrid circuit 114. In this example, the received signals are tapped off into the feedback path and also output to the remainder of the receive path 144 for subsequent processing. In the feedback path, the received signals are applied to the second mixer 120 from the low-noise amplifier 118 as well as the radio-frequency signals from the local oscillator 134, and downconverted to baseband. In another embodiment, the second mixer 120 can be coupled directly to the output port 116, for example, prior to the low-noise amplifier 118, thereby receiving the signal from the hybrid circuit 114 directly. However, in the present example, the received signals are demodulated into the I and Q components by the second mixer 120, but alternative demodulation schemes will be apparent to those skilled in the art. The I and Q received signals are input respectively to the low-pass filters 122, 124, and further to the ADC 126 to yield digital output signals. The digital output signals are then provided to the processor 128 for processing in a manner to be described below in order to control isolation provided by the hybrid circuit 114.

(19) In this regard, the processor 128 implements a balancing algorithm that strives to maximise isolation of the input port 112 from the output port 116 of the hybrid circuit 114 based upon the following principles.

(20) The transfer function between the input port 112 and output port 116 of the hybrid circuit 114 can be expressed using the following expression:
G(, X)=1/2(.sub.A().sub.B(, X)) (1)

(21) where G is the transmit-receive gain, .sub.A is a reflection coefficient of the antenna 140 and .sub.B is a reflection coefficient of the balancing impedance 130, is frequency, and X is the control parameter for adjusting the balancing impedance 130. In some embodiments, X is a multidimensional variable, for example a vector, representing the multiple tuning dimensions that result from multiple tunable circuit elements.

(22) In previous solutions, maximisation of the isolation was achieved by solving for the following linear simultaneous equations:
G.sub.1(, X.sub.1)=P()+Q().sub.B(, X.sub.1) (2)
G.sub.2(, X.sub.2)=P()+Q().sub.B(, X.sub.2) (3)

(23) where G.sub.1(, X.sub.1) is a first transmit-receive gain, measured for a balancing reflection coefficient of .sub.B(, X.sub.1), which results from control value X.sub.1, and G.sub.2(, X.sub.2) is a second transmit-receive gain, measured for a balancing reflection coefficient of .sub.B(, X.sub.2), which results from control value X.sub.2. These equations are based upon the following rewriting of equation (1) above with appropriate substitutions:
G(, X)=P()+Q().sub.B(, X) (4)

(24) and where G(, X) is the transmit-receive gain and .sub.B(, X) is the balancing reflection coefficient. P() is the portion of the transmit-receive gain comprising the coupling path in which signals are reflected at the antenna node 142 of the hybrid circuit 114 due to imperfect matching with the antenna 140. In the case of a perfectly matched antenna, the antenna reflection coefficient is zero and therefore P() is also zero. Q().sub.B(, X) is the portion of the transmit-receive gain comprising the coupling path in which signal are reflected at the balancing node 132 of the hybrid circuit 114. Q() depends on the properties of the hybrid circuit 114 and, as defined above, .sub.B(, X) is the reflection coefficient at the balance port 132 as controlled by the variable balancing impedance 130 through the control value X.

(25) It is known that equations (2) and (3) can be solved algebraically to yield an expression for a balancing reflection coefficient that maximises isolation between the input and output ports 112, 116 of the hybrid circuit 114:

(26) BS ( ) = - P ( ) Q ( ) = G 1 ( ) ( B ( , X 1 ) - B ( , X 2 ) ) G 2 ( ) - G 1 ( ) + B ( , X 1 ) ( 5 )

(27) Where .sub.BS is the reflection coefficient value that maximises isolation. Setting the balancing impedance to achieve the reflection coefficient as calculated above will therefore balance the duplexer.

(28) In practice, however, a difference exists between a true balancing impedance provided by the variable impedance 130 and a desired balancing impedance set by way of setting the control input of the variable impedance 130 and known only from the design parameters. With reference to the above example, equation (5) provides the value, .sub.BS, that maximises isolation. However, due to the aforementioned manufacturing imperfections, the required control setting, which may be denoted, X.sub.BS, and is the setting of the variable impedance to achieve a balancing reflection coefficient, .sub.BS, is not accurately known. Thus, although the desired value, .sub.BS, is known, the apparatus may not apply the correct setting to achieve this value, thereby preventing optimum balancing of the hybrid circuit 114. Furthermore, .sub.B(, X.sub.1) and .sub.B(, X.sub.2) are inputs to equation (5). However due to the same manufacturing imperfections mentioned above, the provided values for .sub.B(, X.sub.1) and .sub.B(, X.sub.2) can differ from their desired values. This can introduce error into the calculated value for .sub.BS, thereby also preventing optimum balancing.

(29) These drawbacks are solved by a calibration process that associates the control values of the balancing impedance with measured calibration values that are used by a balancing algorithm. The operation of this is as follows. For the sake of mathematic argument, the function C(, X), which is a linear function of .sub.B(, X), is introduced and defined as
C(, X)=().sub.B(, X)+() (6)

(30) By re-arranging equation (6) for .sub.B(, X) and substituting into equations (2) and (3) above, the following equations are obtained:

(31) G 1 ( , X 1 ) = P ( ) + Q ( ) C ( , X 1 ) - ( ) ( ) ( 7 ) G 2 ( , X 2 ) = P ( ) + Q ( ) C ( , X 2 ) - ( ) ( ) ( 8 )

(32) The following further substitutions can be employed:

(33) P ( ) = P ( ) - Q ( ) ( ) ( ) ( 9 ) Q ( ) = Q ( ) ( ) ( 10 )

(34) These expressions can be substituted into equations (7) and (8) to yield the simultaneous equations:
G.sub.1(, X.sub.1)=P()+Q()C(, X.sub.1) (11)
G.sub.2(, X.sub.2)=P()+Q()C(, X.sub.2) (12)

(35) As this is still a linear system of equations, simultaneous equations (11) and (12) can be solved, as in the case of equations (2) and (3), to balance the hybrid circuit 114. The linear equation (6) is effectively incorporated into the linear system of equations to be solved in order to balance the hybrid circuit 114 without needing to know the factors: () and (); knowing simply the values C(, X.sub.1) and C(, X.sub.2) is sufficient and there is no need to know the relationship between these values and .sub.B(, X.sub.1) and .sub.B2(, X.sub.2) respectively.

(36) However, those skilled in the art will recognise that the system of equations (11) and (12) are functions of C(, X.sub.2), and therefore exploiting this system of equations in a like manner to that described above in relation to (2) and (3) yields an expression for C() (in contrast to an expression for .sub.B()). Equation (5) can therefore be re-written as:

(37) C BS ( ) = - P ( ) Q ( ) = G 1 ( , X 1 ) ( C ( , X 1 ) - C ( , X 2 ) ) G 2 ( , X 2 ) - G 1 ( , X 1 ) + C ( , X 1 ) ( 13 )

(38) Equation (13) constitutes a system of equations, which can expressly or implicitly comprise one or more equations. Those skilled in the art will appreciate that this calculation is the same calculation as shown in equation (5), but performed in a mapped space where the mapping is given by equation (6). In order to use this equation to determine a setting (X value) for the variable impedance 130, it is necessary to store information concerning the correspondence between settings of the variable impedance 130 and the linear function of the balancing reflection coefficient. With reference to the above example, this correspondence is between X and C(, X).

(39) This is required for two reasons: firstly, to associate the control values X.sub.1 and X.sub.2 with the values C(, X.sub.1) and C(, X.sub.2), which are inputs to equation (13), and secondly, to associate the calculated value .sub.BS() with a corresponding control value, which can be denoted, X.sub.BS. This control value is that which maximises the transmit-receive isolation of the hybrid circuit 114 when applied to the variable balancing impedance 130.

(40) In this example, and turning to FIG. 2, during production of the wireless device 100 the antenna impedance is maintained at a consistent value, which can be an arbitrary impedance provided that the impedance is consistently applied throughout the calibration process, and then a calibration value or measurement, for example a transmit-receive gain value, can be measured for each setting of the control input of the variable impedance 130. The lookup table 138 is therefore compiled as part of the manufacturing process for the device 100. In this regard, the antenna impedance is set to a predetermined impedance and the predetermined impedance is maintained throughout the calibration process.

(41) The processor 128 then sets (Step 200) the variable impedance 130 to a first setting and then a test signal, for example a pilot signal, is transmitted, and received via the feedback path as a result of any leakage between the input port 112 and the output port 116 of the hybrid circuit 114. The complex transmit signal and the complex received signal, measured via the feedback path, are read from the memory 136 and the associate transmit-receive gain is calculated (Step 202), i.e. the complex self-interference channel is measured. The impedance control setting and the associated transmit-receive gain value are then stored (Step 204) in the lookup table 138. The processor 128 then establishes (Step 206) whether further settings of the variable impedance 130 need to be set in order to determine the transmit-receive gain value for each setting of the variable impedance 130. In this respect, the variable impedance 130 comprises a set of selectable settings, constituting a plurality of impedance settings, which covers all possible impedances to which the variable impedance can be set to provide. If, in this example, all settings of the variable impedance have not been set and the associated transmit-receive gain determined, then the processor 128 continues to iterate through the impedance settings of the variable impedance 130 that have not yet been set, and make corresponding measurements (Steps 200 to 206). Once it has been determined (Step 206) that all the impedance settings have been set and their associated transmit-receive gains have been determined, the processor 128 terminates the calibration process, because it has been completed.

(42) As a result of the calibration process, the lookup table 138 comprises digital settings for the variable impedance 130 and associated transmit-receive gain values. The lookup table 138 is used in conjunction with equation (13) above in the following manner in order to determine the variable impedance that results in maximising isolation between the input and output ports 112, 116 of the hybrid circuit 114. This equation constitutes a system of equations that associates a first measured signal, a second measured signal, a first transmit-receive gain from the lookup table 138 in respect of a first impedance setting, and a second transmit-receive gain from the lookup table 138 in respect of a second impedance setting. The system of equations also effectively associates signals transmitted in order to measure the first and second transmit-receive gains.

(43) In this embodiment the calibration values measured and stored by the calibration process are complex transmit-receive gain values. However, in other embodiments the calibration values can be processed transmit-receive gains, or received signal values, received in respect of consistent transmit signal values, or otherwise processed receive signal values. Those skilled in the art should appreciate that, since the calibration values need only be a consistent linear function of the balancing reflection coefficient values as shown above, numerous parameters exist that satisfy this criterion, for example the transmit-receive gain values multiplied or divided by a consistent value.

(44) Referring to FIG. 3, as part of supporting operation of the device 100, the processor 128 controls the hybrid circuit 114 in order to isolate the input port 112 from the output port 116.

(45) The processor 128 controls (Step 300) the variable impedance 130 to take a particular first impedance setting, X.sub.1. The corresponding impedance, denoted, Z.sub.1, can be, for example, approximately 50 ohms, although it should be appreciated that the impedance can be arbitrarily set and indeed the value is unimportant as the method operates in terms of impedance settings. The processor 128 also controls the local oscillator 134 to oscillate at a frequency such that signals are transmitted via the antenna 140 at a first transmit frequency, .sub.1, within a first frequency band of interest. The frequency band of interest can be a transmit band, for example.

(46) A signal is then transmitted at the frequency, , via the power amplifier 110, the hybrid circuit 114 and the antenna 140. As this happens, the signal arising at the receive node 116 (owing to imperfect isolation by the hybrid circuit 114) at a first receive frequency is measured (Step 302) using the feedback path described above. The first measured signal is stored, for example, in the memory 136. The measurement of the received signal takes place over a second frequency band of interest, which can be a receive band, for example. The first transmit frequency and the first receive frequency can be identical or different. The first and second frequency bands of interest can be entirely different, i.e. they do not overlap at all, or can overlap partially. In one embodiment, the first and second frequency bands of interest can overlap entirely, i.e. one band falls entirely within the other band, or be identical. In the latter case, the device 100 can be described as operating in an in-band full duplex mode.

(47) After the first measured signal has been stored, the processor 128 changes (Step 304) the variable impedance 130 to a second, different, known impedance setting X.sub.2, corresponding to a second impedance Z.sub.2, and instructs the baseband processor 104 to generate another signal. The processor 128 controls the local oscillator 134 to oscillate at a second transmit frequency in the first frequency band of interest. The second signal arising at the receive node 116 is measured (Step 306) at a second receive frequency in the second frequency band of interest using the feedback path described above. The second measured signal is stored, for example, in the memory 136.

(48) Once that the measurements have been made and stored in respect of the first and second impedance settings, X.sub.1, X.sub.2 (Steps 300 to 306), the processor 128 accesses the memory 136 and looks up the transmit-receive gain values in respect of the first and second impedance settings, X.sub.1, X.sub.2, used. Thereafter, using the stored measured first and second received signals, and the retrieved looked-up transmit-receive gain values, the processor 128 calculates first and second transmit-receive gains using first and second transmit signal data and the measured first and second received signals, and evaluates (Step 308) equation (13) to obtain a balancing result, for example a calculated gain value, constituting a third gain, corresponding to maximum isolation of the input and output ports 112, 116 of the hybrid circuit 114. The processor 128 then, using the calculated gain value (Step 310) reverse looks-up the calculated gain value in order to identify (Step 312) a third impedance setting in the lookup table 138 having a corresponding transmit-receive gain that is closest to the calculated gain value. The impedance setting identified is then retrieved and the processor 128 sets (Step 314) the control input of the variable impedance 130 to the retrieved setting, thereby maximising isolation between the input and output nodes 112, 116 of the hybrid circuit 114. As such, the variable impedance 130 is controlled as a function of the retrieved first and second gains and the first and second measured gains. This setting of the third impedance can be performed periodically while, for example, the device 100 is in an active state/mode.

(49) In this embodiment, the measurement values that are used in the balancing equation (13), which are denoted G.sub.1(, X.sub.1) and G.sub.2(, X.sub.2) above, are transmit-receive gain values. However, those skilled in the art will appreciate that there exist alternative measurement values that can be used. For example, if the measured gain values are, for example, multiplied or divided by a consistent quantity, the value of equation (13) is unchanged. Consequently, other embodiments exist that use other measurement values in the balancing equation, for example, using processed gain values, or received signal values received in respect of consistent transmit signal values, or otherwise processed receive signal values. Those skilled in the art will recognise that the measurement values as used in the equations need only be linearly proportional to the transmit-receive gain, and a number of parameters exist that can satisfy this criterion.

(50) In this example, the impedance control is discrete and has a finite number of impedance control states. In another embodiment, the impedance control may be continuous. Those skill in the art will appreciate that in the case of a continuous impedance control, other possibilities exist for the calibration process, for example, making calibration measurements at a set of discrete impedance control points within the continuous control domain.

(51) In this example, the record of associations is a discrete set of associations between impedance settings and calibration values or measurements. In other embodiments, the record of associations could alternatively comprise an equation, or piecewise function, or otherwise, which serves to relate the impedance settings and calibration values.

(52) In another embodiment (FIG. 4), the variable impedance 130 has a set of possible settings and a number of the set of possible impedance settings, for example a subset of the possible settings, is selected for the performance of the calibration process (Steps 200 to 206) described above. The subset of the possible settings can constitute the plurality of settings. In this example, the subset of possible impedance settings is between about 100 impedance settings and about 1000 impedance settings. In this regard, instead of iterating through all the possible impedance settings that can be set for the variable impedance 130, the processor 128 implements the method of FIG. 2 in respect of a subset of impedance settings. This results in the lookup table 138 stored in the memory 136 comprising a reduced number of entries associating impedance settings with respective measured transmit-receive gains using a constant antenna impedance, the calibration process thereby constituting a coarse calibration.

(53) Consequently, given the coarser quality of the lookup table 138 as compared with a lookup table generated using substantially all impedance settings of the variable impedance 130, the processor 128 needs to compensate for the coarse quality of the lookup table 138 in order to achieve optimum isolation between the input node 112 and the output node 116 of the hybrid junction 114.

(54) The processor 128 determines (Step 400) whether the device 100 is in an idle mode. When the device is not in an idle mode, the processor 128 implements the balancing method (FIG. 3: Steps 300 to 314) in order to obtain a coarse estimate of the balancing impedance setting, constituting the third impedance setting, given the coarse nature of the lookup table 138. Thereafter, the processor 128 initiates (Step 402) an iterative algorithm in order to, for example, search for an improved balancing impedance setting as compared with the coarse third impedance setting determined as a result of evaluating equation (13) and performing a reverse lookup using the lookup table 138. In this example, the iterative algorithm comprises performing a line search, i.e. an iterative linear variation, in respect of the third impedance setting. The third impedance setting is varied according to the search algorithm in order to improve on the third impedance setting, thereby improving isolation between the input node 112 and the output node 116 of the hybrid junction 114.

(55) In this respect, and referring to FIG. 5, the third coarse impedance setting is determined (Step 500) as mentioned above and the direction of the search is set (Step 502) as positive. The processor 128 then continues to implement the iterative algorithm to refine the coarse third impedance setting determined by modifying (Step 504) the coarse third impedance setting to a neighbouring setting in the direction set. The processor 128 then measures (Step 506) the transmit-receive gain, followed by a determination (Step 508) as to whether the impedance setting used results in an improvement to the isolation between the input node 112 and the output node 116 of the hybrid junction 114. In the event that improved isolation has resulted, the algorithm iterates in order to continue adjusting the impedance setting in the direction selection (Steps 504 to 508). In the event that the change in impedance setting has not resulted in improved isolation between the input node 112 and the output node 116 of the hybrid junction 114, the processor 128 changes (Step 510) the direction of the search and then adjusts (Step 512) the impedance setting of the variable impedance 130 by two sequential neighbouring settings in the new direction. Thereafter, the processor 128 measures (Step 506) the transmit-receive gain resulting from the changed impedance setting of the variable impedance 130 in order to determine whether isolation has improved (Step 508). Referring back to FIG. 4, the above iterative loop continues (Step 404) until adjustment of the impedance settings is no longer required (Step 406), for example when the device 100 ceases to be in the active mode.

(56) With reference to the above-described example, the skilled person should appreciate that although searching in a single dimension has been described for the sake of conciseness and clarity of description, the search can be performed in respect of a greater number of dimensions, for example two or more dimensions, such as resistance and capacitance settings. For example, in another embodiment, the tunable impedance 130 comprises multiple tunable circuit elements. In such an embodiment, the iterative optimisation can be multidimensional. This multidimensional optimisation can, for example, comprise the steps of FIG. 5, applied to each circuit element sequentially or, for example, comprise the steps of FIG. 5, applied to each circuit element concurrently.

(57) Those skilled in the art will appreciate that there are numerous well-known iterative optimisation methods that can be employed as an alternative to the steps described above in relation to FIG. 5. Additionally, those skilled in the art will also appreciate that any suitable interpolation technique can be employed in relation to the coarse record of associations between the impedance settings and calibration measurements, as an alternative to, or as a preliminary step to, an iterative optimisation.

(58) In a further embodiment (FIG. 6), an active cancellation technique can be implemented in conjunction with the use of an iterative setting adjustment algorithm when using the coarse lookup table described above. Of course, it should be appreciated that a higher resolution calibration can be employed instead of the coarse calibration and without the iterative setting adjustment algorithm. In any event, in this example, the production line based coarse self-calibration is performed (Steps 200 to 206) in the manner already described above. Similarly, as already described above, the processor 128 determines (Step 400) whether the device 100 is in an idle mode and if the device 100 is not in an idle mode, the processor 128 implements the balancing method (Steps 300 to 314) in order to obtain a coarse estimate of the balancing impedance, constituting the third impedance, given the coarse nature of the lookup table 138. Thereafter, the processor 128 initiates (Step 402) the iterative algorithm described above in order to, for example, search for an improved balancing impedance as compared with the coarse third impedance setting determined as a result of evaluating equation (13) and performing a reverse lookup using the coarse lookup table 138. In this example, the iterative algorithm comprises performing a line search in respect of the third impedance setting. The third impedance setting is varied according to the search algorithm in order to improve on the third impedance setting, thereby achieving (Step 600) a required improved isolation between the input node 112 and the output node 116 of the hybrid junction 114. Thereafter, a zero forcing cancellation algorithm is implemented (Step 602) in order to obtain initial equalizer estimates, details of which will now be described.

(59) In this example, and referring to FIG. 7, in addition to the transmission path 102, the device 100 comprises an active cancellation subsystem comprising an auxiliary transmission path 700. For a Single-Carrier Frequency Division Multiple Access waveform specified for the LTE communications system, the baseband processor 104 of FIG. 1 supports a data mapper 702 (FIG. 7) operably coupled to a waveform generator 704. The waveform generator 704 is operably coupled to a digital Fourier transform unit 706, the digital Fourier transform unit 706 being an M-point digital transform unit. A subcarrier mapping unit 708 is operably coupled to the digital Fourier transform unit 706 and an N-point inverse fast Fourier transform unit 710, where N is greater than M. The inverse Fourier transform unit 710 is operably coupled to an up-converter 712, which has an output that is operably coupled to the input of the power amplifier 110. The up-converter 712 comprises the DAC 106 and the mixer 108 of FIG. 1.

(60) In this example, a signal in the transmission path 102 is, when in use, tapped by way of copying. In this respect, a tapping point 714 is located at the output of the digital Fourier transform unit 706 and is coupled to the auxiliary transmission path 700 of the device 100, the auxiliary transmission path 700 comprising transmitter chain processing stage units, for example a Frequency Domain Equaliser (FDE) 716 (for which initial equaliser estimates are mentioned above) having an input thereof coupled to the tapping point 714 and an output operably coupled to an input of an auxiliary subcarrier mapping unit 718. In the examples set forth herein, the input of the frequency domain equalizer 716 is a set of M Fourier components representing the symbol signal being transmitted. A leakage channel between the input node 112 and the output node 116 of the hybrid junction 114, and a cancellation channel between the balance node 132 and the output node 116, are estimated by an adaptation signal processor 720. These channel estimates are used to determine coefficients for the FDE 716. The FDE 716 can be implemented as a complex coefficient vector representing a frequency domain transfer function, for example a set of M complex coefficients that encode the amplitude and phase of the frequency domain transfer function at each of the M frequencies of the Fourier components of the tapped signal. The frequency domain equaliser 716 serves to perform, when in use, a point-by-point multiplication of each Fourier component of the tapped signal with the corresponding complex FDE coefficient mentioned above in order to generate M modified Fourier components that can be input to the auxiliary subcarrier mapping unit 718.

(61) An output of the auxiliary subcarrier mapping unit 718 is operably coupled to an input of an auxiliary N-point inverse fast Fourier transform unit 722, an output of which is operably coupled to an input of an auxiliary up-converter 724. An output of the auxiliary up-converter 724 is operably coupled to an input of an auxiliary power amplifier 726. An output of the auxiliary power amplifier 726 is coupled to the balance node 132 of the hybrid junction 114 via a variable impedance matching network 130. In this example, the adaptation signal processor 720 constituting a coefficient processor is operably coupled to the frequency domain equaliser 716 and together they serve as an adaptive filter unit. The adaptation signal processor 720 is also operably coupled to a monitoring output of a signal monitoring unit 728. The local oscillator 134 is operably coupled to the up-converter 712, the auxiliary up-converter 724 and the signal monitoring unit 728. This architecture is an active cancellation architecture as described in International patent publication no. PCT/EP2015/052800, the contents of which are incorporated herein by reference in their entirety. Other architectures can also be implemented to provide active cancellation, some of which are also described in PCT/EP2015/052800.

(62) In another embodiment, the channel estimation and equalisation signal processing could alternatively be performed in the time domain using any suitable techniques.

(63) In operation, the auxiliary transmission path 700 serves to generate an isolation signal to cancel a transmission signal leaked by the hybrid junction 114 between the input node 112 and the output node 116 thereof. As the detail of the generation of the isolation signal is not central to an understanding of this embodiment, for the sake of conciseness and clarity of description, the detail that can be found in PCT/EP2015/052800 will not be reproduced herein.

(64) Referring back to FIG. 6, after obtaining the initial equaliser estimate (Step 602) as mentioned above, the adaptation signal processor 720, in cooperation with the auxiliary transmission path 700, initialises (Step 604) the active cancellation algorithm that the adaptation signal processor 720 implements, and the active cancellation algorithm is executed (Step 606) in order to generate the isolation signal that is applied to the balance node 132. The isolation signal is generated, albeit continually adapting, while the device 100 is determined (Step 608) to be in the active mode.

(65) Substantially contemporaneously, for example in parallel, the processor 128 implement (Step 610) the iterative balancing algorithm described above (Steps 402, 404, 600) while the device 100 is determined (Step 612) to be in the active mode. The dual execution of the iterative search algorithm and the active cancellation algorithm serves to maintain maximum isolation between the input node 112 and the output node 116 of the hybrid junction 114.

(66) The exemplary embodiments of the invention set forth above are considered to be illustrative and not limiting. Various changes to the described embodiments may be made without departing from the spirit and scope of the invention.

(67) The skilled person should appreciate that the above-described implementations are merely examples of the various implementations that are conceivable within the scope of the appended claims. Indeed, throughout the above description, reference has been made to the lookup table 138 and discrete digital settings of the variable impedance 130. In this regard, the skilled person should understand that the variable impedance can be a continuously variable, for example analogue, variable impedance. Instead of the lookup table 138, the memory 136 can contain an alternative kind of reference, for example an equation that represents the relationship between the impedance settings of the variable impedance 130 and the transmit-receive gains associated with the respective impedance settings. Alternatively, the memory 136 can store a piecewise approximation associating the transmit-receive gains with the respective continuous control inputs of the variable impedance 130. As a further alternative, the memory 136 can implement a lookup table or other record of a discrete plurality of associations between the transmit-receive gains and the respective continuous control settings of the variable impedance 130.

(68) In relation to the hybrid junction 114 described herein, the skilled person should appreciate that any suitable construction can be employed. For example, in the above embodiment a transformer hybrid junction has been described. In another embodiment, a quadrature hybrid junction has been employed, although other variants, for example a 180 transformer hybrid junction, could be used. Other suitable kinds of hybrid junction can also be employed, for example a waveguide hybrid junction.

(69) The systems and methods of the above embodiments may be implemented in a computer system (in particular in computer hardware or in computer software) or in specifically manufactured or adapted integrated circuits, in addition to the structural components and user interactions described. The methods of the above embodiments may be provided as computer programs or as computer program products or computer readable media carrying a computer program which is arranged, when run on a computer or other processor, to perform the method(s) described above.

(70) The term computer readable media includes, without limitation, any medium or media which can be read and accessed directly by a computer or computer system. The media can include, but are not limited to, magnetic storage media such as floppy discs, hard disc storage media and magnetic tape; optical storage media such as optical discs or CD-ROMs; electrical storage media such as memory, including RAM, ROM and flash memory; and hybrids and combinations of the above such as magnetic/optical storage media.