Manufacturing Method of Diode
20200161444 ยท 2020-05-21
Inventors
Cpc classification
Y02P70/50
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
International classification
Abstract
A manufacturing method of a diode includes depositing an epitaxial layer and an oxidation structure on a substrate; etching the epitaxial layer to form active trenches and a termination trench using a configuration of the oxidation structure, wherein the termination trench has a first sidewall, a second sidewall, and a bottom portion; performing a thermal oxidation procedure to deposit a trench oxide layer to cover a sidewall and a bottom portion of each active trench, the first sidewall, the second sidewall, and the bottom portion; depositing a semiconductor layer on each active trench, the first sidewall, and the second sidewall to fill the semiconductor layer in each active trench and cover the first sidewall and the second sidewall; and depositing a metal silicide layer on each active trench, and covering the semiconductor layer of the first sidewall and the second sidewall by the metal silicide layer.
Claims
1. A manufacturing method of a diode, comprising: depositing an epitaxial layer on a substrate; depositing an oxidation structure on the epitaxial layer; etching the epitaxial layer to form a plurality of active trenches and a termination trench by using a configuration of the oxidation structure, with the termination trench having a first sidewall, a second sidewall, and a bottom portion; performing a thermal oxidation procedure to deposit a trench oxide layer to cover a sidewall and a bottom portion of each of the active trenches, and the first sidewall, the second sidewall, and the bottom portion of the termination trench; depositing a semiconductor layer on each of the active trenches, and the first sidewall, and the second sidewall of the termination trench to fill each of the active trenches with the semiconductor layer and to cover the first sidewall and the second sidewall with the semiconductor layer; and depositing a metal silicide layer on each of the active trenches, and covering the semiconductor layer on the first sidewall and the second sidewall by the metal silicide layer.
2. The manufacturing method of the diode according to claim 1, further comprising defining the plurality of active trenches as an active region, wherein the first sidewall of the termination trench is close to the active region, and the second sidewall of the termination trench is away from the active region.
3. The manufacturing method of the diode according to claim 1, further comprising depositing a metal electrode on the metal silicide layer on the active trenches, and partially covering the metal silicide layer on the first sidewall and the second sidewall of the termination trench by the metal electrode.
4. The manufacturing method of the diode according to claim 1, further comprising depositing a back electrode on a bottom surface of the substrate.
5. The manufacturing method of the diode according to claim 1, wherein the oxidation structure is formed by a plurality of oxidation masks.
6. The manufacturing method of the diode according to claim 1, wherein a width of the termination trench is greater than a width of each of the active trenches.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0014]
DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0015] The advantages, features, and technical methods of the present invention are to be explained in detail with reference to the exemplary embodiments and the accompanying drawings for the purpose of being easier to be understood. Moreover, the present invention may be realized in different forms, and should not be construed as being limited to the embodiments set forth herein. Conversely, for a person of ordinary skill in the art, the embodiments provided shall make the present invention convey the scope more thoroughly, comprehensively, and completely. In addition, the present invention shall be defined only by the appended claims.
[0016] Please refer to
[0017] It is noted that the deposition of the metal electrode 70 and the back electrode 80 may also be achieved by electroless plating. Specifically, since the configuration of the trench oxide layer 41 of the termination trench 50 has poor electrical conductivity of the trench oxide layer 41, the metal silicide layer 60 has a relatively high electrical conductivity. Therefore, by utilizing the method of electroless plating, the metal electrode 70 may be selectively deposited on the metal silicide layer 60 of the active trench 40 instead of being deposited on the trench oxide layer 41, and the back electrode 80 may be deposited on the bottom surface of the substrate 10.
[0018] In addition, the diode manufactured by the method of the present invention may be set as follows: In this embodiment, the substrate 10 may be a silicon substrate, the epitaxial layer 20 may be n-type or p-type, and the n-type and p-type are realized by adding impurities into the semiconductor material. The semiconductor material may be silicon, and the impurities may be selected from the Group III element or the Group V element. The process of adding impurities may be realized by the method of diffusing impurities in the semiconductor material at a high temperature through ion implantation, a solid diffusion source, or a liquid diffusion source. The material of the semiconductor layer 42 may include polysilicon, and the material of the trench oxide layer 41 and the plurality of oxidation masks 31 includes oxide (SiO.sub.2). The metal silicide layer 60 may be formed by metal silicide; the metal material of the metal silicide layer 60 and the material of the metal electrode 70 and the back electrode 80 may include at least one of materials such as indium (In), tin (Sn), aluminium (Al), gold (Au), platinum (Pt), Zinc (Zn), germanium (Ge), silver (Ag), plumbum (Pb), palladium (Pd), copper (Cu), beryllium gold (AuBe), beryllium germanium (BeGe), nickel (NI), plumbum tin (PbSn), chromium (Cr), zinc gold (AuZn), titanium (Ti), tungsten (W), titanium tungsten (TiW), and the like.
[0019] Accordingly, compared to conventional techniques, the manufacturing method of a diode of the present invention may achieve the simplification of the manufacturing procedure of a diode and lower the manufacturing cost by realizing the manufacture of a diode without the configuration of an insulating barrier. The method of the present invention may be applied to the manufacturing industries of semiconductors.
[0020] The above description is merely illustrative rather than restrictive. Any scope without departing from the spirit of the present invention as to equivalent modifications or alterations are intended to be included in the following claims.