OPERATIVELY ADAPTIVE ULTRASOUND IMAGING SYSTEM

Abstract

An ultrasound imaging system is disclosed, including: an ultrasound probe including transducers, a digital acquisition board including: electronic circuits adapted to control the transducers to emit ultrasound waves and to convert signals sensed by transducers into digital data, and a real-time sequencer adapted to control the electronic circuits to drive the emission and reception of ultrasound signals, based on working parameters and sequence parameters, and a computer connected to the digital acquisition board and including a computer's memory, the parameters being stored in the computer's memory, the digital acquisition board further includes a DMA controller adapted to access the computer's memory in reading and writing by implementation of DMA protocols, and the sequencer is adapted to send requests to the DMA controller to recover the parameters from the computer's memory in real time.

Claims

1-15. (canceled)

16. An ultrasound imaging system, comprising: an ultrasound probe (1) comprising a plurality of transducers (10) for emitting and receiving an ultrasound wave inside a region of a body, a digital acquisition board (2) comprising: electronic circuits (21, 22, 23) adapted to control the transducers (10) to emit ultrasound waves and to convert signals sensed by transducers into digital data, and a real-time sequencer (20) adapted to control the electronic circuits to drive the emission and reception of ultrasound signals, based on working parameters of the electronic circuits and sequence parameters, and a computer (3) connected to the digital acquisition board (2) and adapted at least for visualizing an image representing a portion of said region, the computer (3) comprising a computer's memory (34), wherein at least part of the working parameters and sequence parameters are stored in the computer's memory (34), the digital acquisition board (2) further comprises at least one Direct Memory Access controller (24, 25) adapted to access the computer's memory (34) in reading and writing by implementation of Direct Memory Access protocols, and the real-time sequencer (20) is adapted to send requests to the Direct Memory Access controller (24, 25) to recover said working parameters and sequence parameters from the computer's memory (34) in real time.

17. The ultrasound imaging system according to claim 16, further comprising a PCI express bus (4) connecting the computer (3) to the digital acquisition board (2).

18. The ultrasound imaging system according to claim 16, wherein the electronic circuits comprise an emission processing chain (21) comprising a transmission beamformer (210) adapted to generate digital signals, and a pulser (211) adapted to convert each digital signal into an electrical excitation of a transducer (10).

19. The ultrasound imaging system according to claim 16, wherein the electronic circuits comprise a reception processing chain (22) comprising an analog processing chain (220), and a digital processing chain (221) comprising at least an analog to digital converter.

20. The ultrasound imaging system according to claim 16, wherein the working parameters comprise signal reception parameters including filtering coefficients, gains, demodulation frequencies, and time gain compensation profiles, and signal emission parameters including delays, signal waveforms, and apodization parameters.

21. The ultrasound imaging system according to claim 16, wherein the working parameters comprises at least one library of predefined settings, said library being stored in a memory of the data acquisition board (2), and the addresses of the settings stored in the library being stored in the computer's memory (34), wherein the real-time sequencer (20) is adapted to send requests to the Direct Memory Access controller (24, 25) to recover said addresses from the computer in real time, and the real-time sequencer (20) is adapted to recover settings from the memory of the data acquisition board (2) by indirection based on said addresses.

22. The ultrasound imaging system according to claim 21, wherein at least one library stored in the data acquisition board (2) comprises at least one of a library of waveforms for ultrasound emission, and a library of filters coefficients for received signals filtering.

23. The ultrasound imaging system according to claim 16, wherein the real-time sequencer (20) comprises a single ASIC or FPGA (201) including a software programmable processor.

24. The ultrasound imaging system according to claim 16, wherein the computer's memory (34) further stores the digital data converted by the electronic circuits.

25. The ultrasound imaging system according to claim 16, wherein the computer (3) further comprises a processor (33), the computer's memory (34) stores beamforming parameters, and the computer's processor is adapted to perform the beamforming of the digital data.

26. The ultrasound imaging system according to claim 16, wherein the at least one Direct Access Memory controller comprises one data import engine (24) adapted to import data from the computer's memory (34) by implementation of Direct Access Memory protocols, and one data export engine (25) adapted to write data in the computer's memory (34) by implementation of Direct Access Memory protocols.

27. A digital acquisition board (2), for use in an ultrasound imaging system, said ultrasound imaging system comprising: an ultrasound probe (1) comprising a plurality of transducers (10) for emitting and receiving an ultrasound wave inside a region of a body, a computer (3) adapted at least for visualizing an image representing a portion of said medium, the computer comprising a memory (34), the data acquisition board (2) being located between the ultrasound probe and the computer (3) and comprising: electronic circuits adapted to control the transducers to emit ultrasound waves and to convert signals sensed by transducers into digital data, and a real-time sequencer (20) adapted to control the electronic circuits to drive the emission and reception of ultrasound signals, based on working parameters of the electronic circuits and sequence parameters, wherein the data acquisition board (2) further comprises at least one Direct Memory Access controller (24, 25) adapted to access the computer's memory (34) in reading and writing by implementation of Direct Memory Access protocols, and wherein the sequencer is to send requests to the Direct Memory Access controller (24, 25) to recover said working parameters and sequence parameters from the computer's memory (34) in real time.

28. An ultrasound imaging process implemented by an ultrasound imaging system according to claim 16, the ultrasound imaging process comprising alternative emission (400) and reception (500) sequences, wherein prior to each emission sequence (400), the real-time sequencer (20) sends (310) a request to the Direct Memory Access Controller (24, 25) to recover the working parameters and sequence parameters corresponding to the next emission and reception sequences in real time from the computer's memory (34).

29. An ultrasound imaging process according to claim 28, comprising changing the settings of an imaging mode during operation of the ultrasound imaging system, and the real-time sequencer (20) recovering corresponding parameters prior to the next emission sequence (400).

30. An ultrasound imaging process according to claim 28, wherein the computer (3) further comprises a controller (33), and the process further comprises the controller (33) performing beamforming of the data received and processed by the digital acquisition board (2).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0056] Other features and advantages of the invention will be apparent from the following detailed description given by way of non-limiting example, with reference to the accompanying drawings, in which:

[0057] FIG. 1, already described, shows an exemplary ultrasound imaging system according to the prior art,

[0058] FIG. 2 schematically discloses an exemplary structure of an ultrasound imaging system according to an embodiment of the invention.

[0059] FIG. 3 represents the main steps of a process according to an embodiment of the invention.

DETAILED DESCRIPTION OF AT LEAST ONE EMBODIMENT OF THE INVENTION

[0060] Ultrasound Imaging System

[0061] With reference to FIG. 2, an exemplary structure on an ultrasound imaging system is disclosed. This ultrasound imaging system is used for ultrasound imaging of a region, the region being typically living tissues of a body, preferably human tissues of a patient or tissues of an animal.

[0062] This system comprises an ultrasound probe 1, comprising a plurality of ultrasound transducers 10. The probe can be a linear array of transducers comprising typically tens of transducers, for instance between 100 and 300 transducers aligned along an axis. This probe can be used for bidimensional imaging. Alternatively, the probe can be a bidimensional array of transducers to perform a 3D imaging of the region.

[0063] The ultrasound imaging system 1 further comprises a digital acquisition board 2 described in more details thereafter, and connected to the ultrasound probe 1. The digital acquisition board pilots the transducers to emit ultrasound waves within the region according to specific parameters, and processes the ultrasound echoes sensed by the transducers into digital data that can then be beamformed and displayed as images. Said digital data are called RF data (before demodulation) or IQ data (after demodulation).

[0064] The ultrasound imaging system 1 also comprises a computer 3 for controlling the digital acquisition board 2 according to one or several imaging modes such as B-mode, Doppler ultrasonography, shear wave elastography, etc., and for viewing images obtained from the digital acquisition board 2. To this end, the computer 3 preferably comprises a screen 30, a Human-Machine Interface 31 allowing a user to enter instructions to the computer. The Human-Machine Interface can for example comprise a keyboard and/or a mouse or track ball. Alternatively the Human-Machine Interface can also comprise a tactile screen. In that case the screen 30 can be used both as a display and a Human-Machine Interface or the system may comprise a display screen 30 and an additional touch screen (not shown).

[0065] The computer 3 further comprises a central unit 32 comprising a controller 33 and a memory 34. The controller 33 may be for instance a processor or microprocessor.

[0066] The controller 33 is preferably configured to perform beamforming of the RF data obtained at the digital acquisition board.

[0067] Also, the memory 34 is preferably dimensioned to store both RF data transmitted by the Digital Acquisition Board 2, and images resulting from the beamforming.

[0068] The ultrasound imaging system preferably also comprises a PCI express bus or equivalent high speed bus (for example USB3) 4 connecting the Digital Acquisition Board 2 to the computer 3, in order to allow sufficient speed and bandwidth of the connection to ensure proper operation of the system.

[0069] Digital Acquisition Board

[0070] Still referring to FIG. 2, the Digital Acquisition Board 2 comprises electronic circuits adapted to control the transducers 10 to emit ultrasound waves, and to convert signals sensed by the transducers into digital data called RF data or IQ data. The Digital Acquisition Board 2 also comprises a real-time sequencer 20. The real-time sequencer 20 comprises at least one calculator 201, which is preferably a Field-Programmable Gate Array (FPGA) adapted to operate in real-time. In an embodiment, the real-time sequencer 20 comprises a single FPGA.

[0071] The real-time sequencer 20 controls the components of the electronic circuits, through control buses.

[0072] This control is performed by transmitting, to each component of the electronic circuits, sequence parameters regulating the timing of the ultrasound emission and reception events, and working parameters for tuning the components to emit ultrasounds and process ultrasound echoes according to a specific imaging mode.

[0073] On FIG. 2, thin lines represent the control buses through which the sequencer controls the electronic circuits. Dotted lines represent the path of data used by the sequencer, and thick solid lines represent the path of the ultrasound data which is described in more details hereinafter.

[0074] The electronic circuits of the digital acquisition board 2 comprise an emission processing chain 21 which is adapted to generate and transmit instructions to the transducers 10 for emitting ultrasounds of desired shapes and according to desired timings.

[0075] To this end, the emission processing chain comprises a high voltage pulser 210, which is a stage of power electronics generating, for each transducer 10, an electrical excitation which the transducer then converts into an ultrasound wave. This pulser 210 is controlled by a transmission beamformer 211 which generates electronic signals according to the waveforms and timing of the ultrasounds to be emitted, said waveforms and timing being transmitted by the sequencer 20 (arrow a).

[0076] Some parameters of the pulser 210 can also be tuned by the sequencer 20 (arrow b), such as for instance output impedance, instructions for activating or deactivating some channels of the pulser, etc.

[0077] The electronics circuits of the digital acquisition board 2 also comprise a reception processing chain 22 which is adapted to generate, from ultrasound echoes received by the transducers 10, RF data which can be then beamformed in order to generate images interpretable by an operator.

[0078] The reception processing chain 22 for example comprises an analog reception chain 220 which can comprise, for each reception channel (corresponding to a respective transducer 10 of the probe): [0079] A low noise amplifier (not shown) [0080] A variable gain amplifier (not shown) [0081] Fixed fain amplifiers (not shown) [0082] Analogical filters (not shown), with cut frequency that can be fixed or variable, and [0083] An anti-aliasing low-pass filter (not shown) at the output of the analog reception chain 220.

[0084] The components of this analog reception chain 220 operate based on working parameters such as gains, cut frequencies, etc. which are transmitted by the sequencer 20 (arrow c).

[0085] The reception processing chain 22 further comprises a digital reception chain 221, which can comprise at least one analog to digital converter, and optionally a digital demodulator and digital filtering circuits (not shown). The components of this digital reception chain 221 also operate based on working parameters such as gains and cut frequencies, demodulation frequency and filtering coefficients transmitted by the sequencer 20 (arrow d).

[0086] The analog and digital reception chains 220, 221 can optionally be implemented on one or several common chip(s), each chip being configured to process a number of channels, for instance 8, 16 or 32 channels simultaneously.

[0087] In some embodiments where the data beamforming is not performed at the computer but instead performed by the digital acquisition board, the reception processing chain 22 may comprise beamforming hardware 222 which is configured to perform beamforming on the RF data. In that case the beamforming parameters depending on the imaging mode may also be transmitted by the sequencer 20 (arrow e).

[0088] The Data Acquisition Board 2 also comprises a transmission and reception switch 23, which is connected to both the emission processing chain 21 and the reception processing chain 22, and is adapted to direct successively signals from the emission processing chain 21 towards the transducers, and ultrasound echoes received by the transducers towards the reception processing chain 22. The switch 23 is either passive, or active and controlled either by the pulser 220 or the sequencer 20 (arrow f).

[0089] Real-Time Operation of the Digital Acquisition Board

[0090] At least part of the working parameters tuning the components of the electronic circuits and transmitted by the sequencer, and of the sequence parameters defining the timings of the processing, also transmitted by the sequencer, are stored in the memory 34 of the computer 3, in order to lower the amount of data stored in the Digital Acquisition Board 2.

[0091] During operation of the ultrasound imaging system, the parameters stored in the computer's memory 34 are accessed in real time by the real-time sequencer 20, for each transmission and reception event, that is to say at a repetition frequency of around 10 kHz or lower.

[0092] To this end, the digital acquisition board 2 comprises at least one Digital Memory Access Controller which is adapted to access the memory of the computer in reading and writing in real time, through implementation of Direct Memory Access (DMA) Protocols. Implementation of DMA protocols allow accessing directly the memory 34 of the computer 3 in order to recover data stored therein, without involving the computer processor which generally does not operate in real time, because the most widespread operating systems of computers are not real time operating systems.

[0093] The Digital Acquisition Board preferably comprises one DMA controller 24 being a data import engine, adapted to access the memory 34 in reading, said controller 24 being adapted to recover the working parameters and sequence parameters stored in the memory 34 for each emission and reception event.

[0094] Preferably, the digital acquisition board also comprises at least one DMA controller 25, being a data export engine, adapted to access the memory 34 in writing in order to store the RF data processed after each reception event in the memory 34 of the computer. Therefore the RF data needs not be stored in the Digital Acquisition Board 2 prior to being transferred to the computer for beamforming, and the memory needs of the Digital Acquisition Board 2 can be reduced.

[0095] In the case where the Digital Acquisition Board 2 comprises beamforming hardware 222 performing beamforming on RF data, then the DMA controller uses DMA protocols to store the beamformed data in the computer's memory.

[0096] The real-time sequencer sends requests to each of the DMA controllers 24, 25 (respectively lines g and h on FIG. 2) for reading or writing data in the memory 34. Said requests in particular comprise the addresses that have to be accessed in the computer's memory 34, so-called scatter gather list.

[0097] Last, the Digital Acquisition Board 2 also comprises a sequencer buffer memory 26 which is sized to store the working parameters and sequence parameters of a single or of few successive emission or reception events. The memory capacity of this buffer 26 is at least 10 times, and up to thousands times below the memory capacity of the dedicated memories used in the prior art for storing all parameters related to an imaging mode.

[0098] Thus, parameters obtained by the DMA controller 24 from the computer's memory are temporarily stored in the buffer memory 26, and once these parameters have been transmitted by the real-time sequencer to the components of the electronic circuits, they are erased from the buffer memory 26 by new parameters called from computer memory 34 for the next event(s).

[0099] The Digital Acquisition Board 2 also comprises a data buffer memory 27 which is sized to temporarily store RF data before sending them to the computer's memory by the DMA controller 25, in case of discrepancies between the data rates of the reception events and the transfer to the computer's memory.

[0100] Given the limited memory needs of the Digital Acquisition Board that are obtained thanks to the invention, the buffer memories 26 and 27 are preferably implemented within the internal memory of the FPGA of the real-time sequencer 20, therefore no additional memory chip than the internal memory already provided by the real-time sequencer 20 is needed in the Digital Acquisition Board 2.

[0101] The real-time sequencer 20 is also adapted to handle the priorities in accessing the buffer memories from either the sequencer 20, the DMA controllers 24, 25 and the reception processing chain 22.

[0102] For instance, the real-time sequencer 20 may preferably detect overflow of the buffer memories 26, 27 and consequently generate message or instructions to overcome this overflow (for instance skip an image, etc.)

[0103] Contrary to the prior art, once the parameters are recovered by the real-time sequencer, they are not stored in a dedicated memory of the digital acquisition board for a full period of operation according to a specific imaging mode. By contrast, the parameters are accessed in the memory of the computer for each transmission and each reception event, then transmitted once by the real-time sequencer 20 to the corresponding components of the electronics circuits, then erased from the buffer memory 26.

[0104] Therefore no memory other than the buffer memories 26, 27 is needed to store the data needed for operating the imaging device. In addition, the reduction in the number of memories in the Digital Acquisition Board reduces the need for FPGA I/O pins to connect memory modules as well as computational resources of the real-time sequencer. Hence the number of FPGAs comprised in the sequencer can be reduced, down to a single FPGA.

[0105] Another interesting result of the above-described imaging system is that the operator of the computer can also order, through the computer, a change in the parameters of the imaging mode, during real-time sequencer execution, in order to improve the image quality and perform adaptive operation of the imaging device. In that case, adjusting the parameters of the imaging mode only requires changing the parameters that are accessed in the computer's memory 34 by the sequencer (namely changing the address in the memory accessed by the sequencer).

[0106] This is shown in FIG. 3 which represents an exemplary embodiment of an imaging process performed by the imaging system described hereinabove.

[0107] The exemplary process shown in FIG. 3 comprises a firing sequence 400 followed by a reception sequence 500 of ultrasounds. The operation of the device comprises the succession of alternating firing and reception sequences.

[0108] Preliminarily to each firing and reception sequence, the process comprises a step 300 of loading the parameters necessary for performing the firing and reception sequences. Preferably, this step is performed in a time interval of 5 to 10 microseconds between a previous reception sequence 500 and a following firing sequence 400.

[0109] During a substep 310, the sequencer sends a request to the data import engine 24 to recover working parameters and sequence parameters corresponding to a selected imaging mode from the computer's memory, and the data import engine accesses said parameter by DMA in the memory 34. The recovered parameters relate both to the firing sequence and the reception sequence immediately following the firing sequence.

[0110] During a substep 320, the data import engine 24 records the parameters in the buffer memory 26.

[0111] The firing sequence 400 then comprises a substep 410, during which the real-time sequencer 20 transmits to each component of the emission processing chain 21 and, in an embodiment, to the transmission/reception switch 23, the instructions and parameters necessary to pilot the transducers to generate ultrasound echoes in the region. During this step, the real-time sequencer 20 also transmits the instructions and parameters to the reception processing chain 22 necessary to perform the processing of the ultrasound echoes.

[0112] Then emission processing chain 21 and the transducers operate according to the instructions and parameters to generate ultrasound echoes during a substep 420.

[0113] A reception sequence 500 comprises a step 510 of receiving, by the transducers, ultrasound echoes propagated within the region, and transmitting said echoes to the reception processing chain 22.

[0114] During a step 520, the components of the reception processing chain 22 perform a processing of the ultrasound echoes into RF data (or as the case may be, into beamformed data), according to the instructions sent by the real-time sequencer.

[0115] During a step 530, the RF data (or beamformed data) is recorded in the buffer memory 27, thereby erasing the data previously recorded in this memory 27.

[0116] During a step 540, the data export engine 25 records, in the computer's memory 34, the data stored in the buffer memory 27 by DMA as soon as this data is recorded in the buffer memory.

[0117] In an embodiment where beamforming of the RF data is performed by the computer, said beamforming is performed later in a step 600.

[0118] In case of a change in the settings of an imaging mode during operation of the system, for instance when an operator prompts instructions to obtain specific image settings, or in case of an auto-adaptive optimization process of the images, instructions are transferred by the computer's processor 33 to the real-time sequencer 20, which in the next recovery step 300 changes the parameters accessed in the computer's memory according to the new settings.

[0119] In some embodiments, all the working parameters and sequence parameters can be stored in the computer's memory.

[0120] In another embodiment, some parameters may remain stored in a memory of the Digital Acquisition Board. In particular, some working parameters can comprise libraries of predefined settings, which can for instance depend on the selected imaging mode, and remain constant during all the emission and reception events of a given imaging mode.

[0121] For example, there can exist a finite number of waveforms, corresponding to respective imaging modes, which are transmitted by the real-time sequencer and which define the electrical signals generating by the transmission beamformer 211. According to another example, a library comprising sets of filters numerical coefficients used in the various components of the reception processing chain 22 according to the various imaging modes can be established.

[0122] In that case, the library comprising the working parameters can be stored in the internal memory of a FPGA of the real-time sequencer, or of the transmission beamformer 211 or of one of the components 220, 221, 222 of the reception processing chain 22, as it only requires limited memory capacity (about tens of kilobits). The real-time sequencer 20 then accesses, in the computer's memory 34, the address of the specific parameter of the library that is needed for a given emission or reception event, and then accesses said parameter by indirection in the FPGA's memory.

[0123] The invention thus allows using the memory of a computer without involving the operation delays of a computer. This simplifies the cost and structure of a digital acquisition board, while allowing adaptive operation of the imaging system.