PAM-N receiver capable of adaptively adjusting threshold voltages determining level of data in received signal and method of adaptively adjusting threshold voltages of PAM-N receiver

Abstract

A PAM-N receiver capable of adaptively adjusting threshold voltages determining a level of a received signal and a method of adaptively adjusting threshold voltages thereof are disclosed. According to the method of the present invention, the result of comparison between reference data levels and the level of data in the received signal are used to adjust the reference data levels, and the threshold voltages of a PAM-N receiver are adaptively calculated from the adjusted reference data levels, thereby reflecting transmission line conditions and Inter-Symbol Interference.

Claims

1. A method of adjusting threshold voltages of a PAM-N receiver comprising a sampler comparing a level of data contained in an equalized signal EQOUT with first reference data level DLR1 through Nth reference data level DLRN and first threshold voltage VTH1 through (N−1)th threshold voltage VTH(N−1), the method comprising: (a) determining the level of the data by comparing the data in the equalized signal EQ.sub.OUT with the first threshold voltage VTH1 through the (N−1)th threshold voltage VTH(N−1); (b) comparing the level of the data determined in (a) as Kth data level DLK with Kth reference data level DLRK; (c) increasing the Kth reference data level DLRK when DLK is greater than DLRK according to comparison result obtained in (b) and decreasing the Kth reference data level DLRK when DLK is smaller than DLRK according to the comparison result obtained in (b) to generate Kth updated reference data level DLURK; and (d) updating at least one of (K−1)th threshold voltage VTH(K−1) and Kth threshold voltage VTHK with (K−1)th updated threshold voltage VUTH(K−1) and Kth updated threshold voltage VUTHK by calculating at least one of the (K−1)th updated threshold voltage VUTH(K−1) and the Kth updated threshold voltage VUTHK from the Kth updated reference data level DLURK (where N is a natural number equal to or greater than 2, K is a natural number satisfying 1≤K≤N, DLK is one of DL1 through DLN satisfying DL1<DL2<. . .<DL(N-1)<DLN, DLRK is one of DLR1 through DLRN satisfying DLR1<DLR2<. . .<DLR(N−1)<DLRN, VTH(K−1) is one of VTH1 through VTH(N−1) satisfying VTH1<VTH2<. . .<VTH(N−2)<VTH(N−1)).

2. The method of claim 1, further comprising: (e) updating (N−K+1)th threshold voltage VTH(N−K+1) with (N−K+1)th updated threshold voltage VUTH(N−K−1) obtained by inverting the (K−1)th updated threshold voltage VUTH(K−1) when the equalized signal EQOUT is a differential signal (where, K is a natural number satisfying N/2+1<K≤N).

3. The method of claim 1, wherein (d) comprises: (d-1) calculating the (K−1)th updated threshold voltage VUTH(K−1) from an average of (K-1)th reference data level DLR(K−1) and the Kth updated reference data level DLURK; and (d-2) updating the (K−1)th threshold voltage VTH(K−1) with the (K−1)th updated threshold voltage VUTH(K-1).

4. The method of claim 1, wherein (d) comprises: (d-3) calculating the Kth updated threshold voltage VUTHK from an average of (K+1)th reference data level DLR(K+1) and the Kth updated reference data level DLURK; and (d-4) updating the Kth threshold voltage VTHK with the Kth updated threshold voltage VUTHK.

5. The method of claim 1, wherein (d) comprises: (d-1) calculating the (K−1)th updated threshold voltage VUTH(K−1) from an average of (K-1)th reference data level DLR(K−1) and the Kth updated reference data level DLURK; (d-2) updating the (K−1)th threshold voltage VTH(K−1) with the (K−1)th updated threshold voltage VUTH(K−1); (d-3) calculating the Kth updated threshold voltage VUTHK from an average of (K+1)th reference data level DLR(K+1) and the Kth updated reference data level DLURK; and (d-4) updating the Kth threshold voltage VTHK with the Kth updated threshold voltage VUTHK.

6. The method of claim 1, further comprising: (h) performing, when the received signal contains a plurality of data, (a) through (d) for each of the plurality of data.

7. A PAM-N receiver comprising: an equalizer generating an equalized signal EQOUT containing data having at least one of first data level DL1 through Nth data level DLN obtained by equalizing a received signal; a sampler determining a level of the data by comparing the data in the equalized signal EQ.sub.OUT with first reference data level DLR1 through Nth reference data level DLRN and first threshold voltage VTH1 through (N−1)th threshold voltage VTH(N−1); and a controller adjusting the first reference data level DLR1 through the Nth reference data level DLRN and the first threshold voltage VTH1 through the (N−1)th threshold voltage VTH(N−1) according to an output signal SMPLOUT indicating a result of comparison performed by the sampler; wherein the sampler comprises a Kth data level comparator outputting: “1” as the output signal SMPLOUT when DLK is greater than DLRK; and “0” as the output signal SMPLOUT when DLK is smaller than DLRK by comparing the level of the data determined to have Kth data level DLK with Kth reference data level DLRK; and wherein the controller comprises: a reference data level controller generating an Kth updated reference data level DLURK obtained by increasing the Kth reference data level DLRK when an output of the Kth data level comparator is “1” and by decreasing the Kth reference data level DLRK when the output of the Kth data level comparator is “0”; and a threshold voltage controller updating at least one of (K−1)th threshold voltage VTH(K−1) and Kth threshold voltage VTHK with (K-1)th updated threshold voltage VUTH(K−1) and Kth updated threshold voltage VUTHK by calculating at least one of the (K−1)th updated threshold voltage VUTH(K−1) and the Kth updated threshold voltage VUTHK from the Kth updated reference data level DLURK (where N is a natural number equal to or greater than 2, K is a natural number satisfying 1≤K≤N, DLK is one of DL1 through DLN satisfying DL1<DL2<. . .<DL(N−1)<DLN, DLRK is one of DLR1 through DLRN satisfying DLR1<DLR2<. . .<DLR(N−1)<DLRN, VTH(K−1) is one of VTH1 through VTH(N−1) satisfying VTH1<VTH2<. . .<VTH(N−2)<VTH(N−1)).

8. The PAM-N receiver of claim 7, wherein the threshold voltage controller updates (N−K+1)th threshold voltage VTH(N−K+1) with (N−K+1)th updated threshold voltage VUTH(N−K+1) obtained by inverting the (K−1)th updated threshold voltage VUTH(K−1) when the equalized signal EQOUT is a differential signal (where, K is a natural number satisfying N/2+1<K≤A).

9. The PAM-N receiver of claim 7, wherein the threshold voltage controller: calculates the (K−1)th updated threshold voltage VUTH(K−1) from an average of (K−1)th reference data level DLR(K−1) and the Kth updated reference data level DLURK; and updates the (K−1)th threshold voltage VTH(K−1) with the (K−1)th updated threshold voltage VUTH(K−1).

10. The PAM-N receiver of claim 7, wherein the threshold voltage controller: calculates the Kth updated threshold voltage VUTHK from an average of (K+1)th reference data level DLR(K+1) and the Kth updated reference data level DLURK; and updates the Kth threshold voltage VTHK with the Kth updated threshold voltage VUTHK.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1A through 1D are diagrams illustrating binary PAM (PAM-2) and multi-level PAM (PAM-4, PAM-8 and PAM-N) signals, respectively.

(2) FIG. 2 is a block diagram illustrating an equalizer and a sampler of a conventional PAM-N receiver.

(3) FIG. 3A is a diagram schematically illustrating a signal processing process of the conventional PAM-4 receiver 10 shown in FIG. 2, and FIG. 3B is a diagram schematically illustrating a process for processing the signal EQ.sub.OUT by the sampler 30 of the conventional PAM-4 receiver 10 shown in FIG. 2.

(4) FIG. 4 is a diagram illustrating a distribution of data levels of a signal RS received by a PAM-4 receiver.

(5) FIG. 5 is a diagram illustrating data level and distribution of a received PAM-N signal and threshold voltages.

(6) FIG. 6 is a block diagram illustrating a PAM-N receiver according to the present invention. FIGS. 7A and 7B are block diagrams illustrating a sampler of a PAM-N receiver according to the present invention.

(7) FIGS. 8A through 8F are block diagrams illustrating a PAM-4 receiver and a sampler according to the present invention.

(8) FIGS. 9A and 9B are diagrams illustrating an increase/decrease of a reference data level according to a data level of a received signal.

(9) FIG. 10 is a flowchart illustrating a method of adaptively adjusting threshold voltages according to an embodiment of the present invention.

(10) FIG. 11 is a flowchart illustrating step S400 in detail.

(11) Hereinafter, a PAM-N receiver and a method of adaptively adjusting threshold voltages thereof capable of adaptively adjusting threshold voltages for determining data levels of a received signal according to the present invention will be described in detail with reference to the accompanying drawings.

(12) First, data levels of a signal RS received by the PAM-N receiver according to the present invention will be described.

(13) FIG. 4 is a diagram illustrating a distribution of data levels of a received signal RS wherein a distribution of data levels of a signal RS received by a PAM-4 receiver is exemplified. While the data levels of the signal RS received by the PAM-4 receiver is exemplified for convenience of description, the signal RS is not limited to ones received by a PAM-4 receiver.

(14) Referring to FIG. 4, when a PAM-4 transmitter transmits data “11”, the data level of the data “11” received by the PAM-4 receiver should be greater than a threshold voltage VTH.sub.3. Specifically, when the PAM-4 receiver receives a plurality of data “11”, each of the plurality of data “11” may have different data levels due to Inter-Symbol Interference (ISI). The ISI is a phenomenon in which the preceding data affects the following data. For example, when data “00” and “11” are sequentially transmitted and received, the received data “11” is likely to have a relatively low data level, and when data “10” and “11” are sequentially transmitted and received, the received data “11” is likely to have a relatively high data level. Similarly, when data “11” and “00” are sequentially transmitted and received, the received data “00” is likely to have a relatively high data level, and when data “01” and “00” are sequentially transmitted and received, the received data “00” is likely to have a relatively low data level. As a result, even when the same data “11” are repeatedly transmitted, the data levels of the received data “11” differ and distributed throughout a certain range, e.g. follow a distribution DL.sub.D4 shown in FIG. 4.

(15) When the PAM-4 transmitter transmits data “10”, the data level of the data “10” received by the PAM-4 receiver should be greater than a threshold voltage VTH.sub.2 and less than the threshold voltage VTH.sub.3. As described above, even when the same data “10” are repeatedly transmitted, the data levels of the received data “10” differ due to ISI and distributed throughout a certain range, e.g. follow a distribution DL.sub.D3 shown in FIG. 4.

(16) When the PAM-4 transmitter transmits data “01”, the data level of the data “01” received by the PAM-4 receiver should be greater than a threshold voltage VTH.sub.1 and less than the threshold voltage VTH.sub.2. As described above, even when the same data “01” are repeatedly transmitted, the data levels of the received data “01” differ due to ISI and distributed throughout a certain range, e.g. follow a distribution DL.sub.D2 shown in FIG. 4.

(17) When the PAM-4 transmitter transmits data “00”, the data level of the data “00” received by the PAM-4 receiver should be less than the threshold voltage VTH.sub.1. As described above, even when the same data “00” are repeatedly transmitted, the data levels of the received data “00” differ due to ISI and distributed throughout a certain range, e.g. follow a distribution DL.sub.D1 shown in FIG. 4.

(18) As described above, even when the same data are repeatedly received, the levels of the actually received data vary within a certain range. That is, even when the same data are repeatedly received, the levels of the received data may be different from one another.

(19) The threshold voltages VTH.sub.1, VTH.sub.2 and VTH.sub.3 shown in FIG. 4 are used to determine the data value of the received signal. For example, when the data level of the received signal is higher than the threshold voltage VTH.sub.3, the value is determined as “11”. Therefore, in order to accurately determine the data value of the received signal, appropriate threshold voltages VTH.sub.1, VTH.sub.2 and VTH.sub.3 are required.

(20) For example, the threshold voltage VTH.sub.3 may be calculated according to equation 1 below where DL.sub.4 denotes any one data level following the distribution DL.sub.D4 of data “11” shown in FIG. 4 and DL.sub.3 denotes any one data level following the distribution DL.sub.D3 of data “10”.

(21) $\begin{array}{cc}{V}_{\mathrm{TH}3}=\frac{{\mathrm{DL}}_4+{\mathrm{DL}}_3}{2}& \left[\mathrm{Equation}1\right]\end{array}$

(22) Similarly, the threshold voltages VTH.sub.2 and VTH.sub.1 may be calculated according to equations 2 and 3 below, respectively, where DL.sub.2 denotes any one data level following the distribution DL.sub.D2 of data “01” and DL.sub.1 denotes any one data level following the distribution DL.sub.D1 of data “00”.

(23) $\begin{array}{cc}{V}_{\mathrm{TH}2}=\frac{{\mathrm{DL}}_3+{\mathrm{DL}}_2}{2}& \left[\mathrm{Equation}2\right]\end{array}$$\begin{array}{cc}{V}_{\mathrm{TH}1}=\frac{{\mathrm{DL}}_2+{\mathrm{DL}}_1}{2}& \left[\mathrm{Equation}3\right]\end{array}$

(24) That is, the threshold voltages VTH.sub.1, VTH.sub.2 and VTH.sub.3 may be an average value of two data levels.

(25) However, since the levels of the received data vary within a certain range even when the same data are received, the accuracy of data value determination varies depending on how the threshold voltages VTH.sub.1, VTH.sub.2 and VTH.sub.3 are selected.

(26) Hereinafter, the data levels of the received signal are denoted as DL.sub.1, DL.sub.2, DL.sub.3, . . . and the threshold voltages that actually determine the data value of the received signal are denoted as VTH.sub.1, VTH.sub.2, VTH.sub.3, . . . . A more detailed description are given in the following.

(27) First, as shown in FIG. 5, each of the levels of a plurality of data included in the signal received by the PAM-N receiver according to the present invention may be any one of N data levels. That is, the signal RS received by the PAM-N receiver includes the plurality of data, and the level of each data may be any one of a first data level DL.sub.1 through an N.sup.th data level DL.sub.N. For example, when data “000 . . . 000” is transmitted and received, the data level corresponding to the received data “000 . . . 000” is the first data level DL.sub.1, and when data “111 . . . 111” is transmitted and received, the data level corresponding to the received data “111 . . . 111” is the N.sup.th data level DL.sub.N. As described above, even when the plurality of data having the same value is repeatedly transmitted, the levels of the received data may differ from one another due to ISI. For example, when a plurality of data “111 . . . 111” is transmitted and received, the received data “111 . . . 111” have a data level of N.sup.th data level DL.sub.N. However, the level of one received data “111 . . . 111” may differ from that of another received data “111 . . . 111” due to ISI. That is, the level of each received data may be an analog value within a certain range. Even when the received signal is equalized by the equalizer, the level of one equalized data “111 . . . 111” may differ from that of another equalized data “111 . . . 111”. Therefore, each of the first data level DL.sub.1 through the N.sup.th data level DL.sub.N means a certain range as shown in FIG. 4.

(28) Herein, for example, “the level of the data is the first data level DL.sub.1” means “the level of the data is a voltage within the distribution DL.sub.D1”. “The levels of one data and another data are the first data level DL.sub.1” does not necessarily mean “The levels of one data and another data are the same” since the levels of one data and another data are referred to as the first data level DL.sub.1 as long as the levels of one data and another data are both within the same range (distribution DL.sub.D1) despite the difference in values due to ISI. That is, each of the first data level DL.sub.1 through the N.sup.th data level DL.sub.N represents a range rather than a fixed value. For example, when a plurality of data “000 . . . 001” is transmitted and received, the level of each data “000 . . . 001” is “second data level DL.sub.2” as long as the level of each data “000 . . . 001” is within a certain range (distribution DL.sub.D2) shown in FIG. 4. However, the levels of the plurality of data “000 . . . 001” may differ from one another due to ISI.

(29) Herein, in order to facilitate description, any one data level selected from the first data level DL.sub.1 through the N.sup.th data level DL.sub.N is referred to as a K.sup.th data level DL.sub.K. Here, N is a natural number equal to or greater than 2, and K is a natural number satisfying 1≤K≤N. In addition, the first data level DL.sub.1 through the N.sup.th data level DL.sub.N satisfies DL.sub.1<DL.sub.2<DL.sub.3< . . . <DL.sub.(N−1)<DL.sub.N.

(30) In addition, FIG. 5 shows threshold voltages used to determine the data value from the data levels. The data level of the received signal (or equalized signal EQ.sub.OUT) is compared with the threshold voltages, and the data value is determined according to the comparison result. For example, when the data level of the received signal is greater than (N−1).sup.th threshold voltage VTH.sub.(N−1), the data value is determined as “111 . . . 111”, and when the data level of the received signal is smaller than the (N−1).sup.th threshold voltage VTH.sub.(N−1) but greater than the (N−2).sup.th threshold voltage VTH.sub.(N−2), the data value is determined as “111 . . . 110”.

(31) Hereinafter, a PAM-N receiver according to the present invention capable of receiving a signal having data levels shown in FIG. 5 will be described in detail.

(32) FIG. 6 is a block diagram illustrating a PAM-N receiver according to the present invention.

(33) Referring to FIG. 6, a PAM-N receiver 1000 according to the present invention includes an equalizer 100, a sampler 110 and a DEMUX 120.

(34) The equalizer 100 equalizes the received signal RS to generate an output signal EQ.sub.OUT having the first data level DL.sub.1 through the N.sup.th data level DL.sub.N.

(35) Specifically, as shown in FIG. 3A or FIG. 3B, the equalized signal EQ.sub.OUT is generated by equalizing the received signal RS. The signal EQ.sub.OUT includes a plurality of data, and the level of each of plurality of data may be any one of the first data level DL.sub.1 through the N.sup.th data level DL.sub.N.

(36) As described above, even the same transmitted data may have different data levels when received. For example, when the signal EQ.sub.OUT contains two received data both corresponding to data “111 . . . 111”, the data levels of the first received data “111 . . . 111” and the second received data “111 . . . 111” may be different. However, when the level of the first received data “111 . . . 111” and the level of the second received data “111. . . . 111” are both in a certain range greater than the (N−1).sup.th threshold voltage VTH.sub.(N−1), both the first received data and the second received data may be collectively referred to as having the N.sup.th data level DL.sub.N.

(37) That is, when the signal EQ.sub.OUT contains at least one data, each level of the at least one data included in the signal EQ.sub.OUT may is one of the first data level DL.sub.1 through the N.sup.th data level DL.sub.N.

(38) The sampler 110 samples the output signal EQ.sub.OUT according to a first reference data level DLR.sub.1 through an N.sup.th reference data level DLR.sub.N and the first threshold voltage VTH.sub.1 to the (N−1).sup.th threshold voltage VTH.sub.(N−1).

(39) Specifically, the sampler 110 compares the level of each data included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N, and with the first threshold voltage VTH.sub.1 through the (N−1).sup.th threshold voltage VTH.sub.(N−1), and outputs an output signal SMPL.sub.OUT which represents the comparison result.

(40) Here, the reference data levels are reference voltages used in the comparison with the level of the received signal (or the equalized signal EQ.sub.OUT). As described above, the data levels of the received signal (or the equalized signal EQ.sub.OUT) may differ from one another even for the same transmitted data. That is, due to factors affecting data transmission such as noise and/or ISI, even the data level for the same transmitted data may differ for each reception. Therefore, it is essential to select or adjust the threshold voltages reflecting the characteristics affecting data transmission and ISI in order to determine the data level accurately. In accordance with the present invention, predetermined reference data levels are first selected (“initial reference data levels”) and the threshold voltages appropriate for determining the level of the received signal (or equalized signal EQ.sub.OUT) are then calculated by increasing or decreasing the reference data level depending on which one of the level of the received signal (or equalized signal EQ.sub.OUT) and the reference data level is greater. While the initial reference data levels maybe arbitrarily selected, it is preferable that the average value of the initial threshold voltage be set as the initial reference data level. For example, in FIG. 5, the average of the (N−1).sup.th threshold voltage VTH.sub.(N−1) and the (N−2).sup.th threshold voltage VTH.sub.(N−2) may be selected as a reference data level DLR.sub.(N−1). Alternatively, a data level corresponding to an average value (a data level that occurs most frequently) in the distribution of the received signal (or equalized signal EQ.sub.OUT) may be selected as the reference data level. Regardless of how the initial reference data levels are chosen, the threshold voltages eventually converge to optimal values as data are received since the reference data level is increased or decreased according to the level of the received signal.

(41) The DEMUX 120 parallelizes the output signal SMPL.sub.OUT of the sampler 110 and outputs parallelized signal as signal DATA.sub.OUT. That is, the output signal SMPL.sub.OUT is de-serialized and provided to the controller 130 as the signal DATA.sub.OUT.

(42) Hereinafter, the sampler 110 will be described in detail with reference to FIGS. 7A and 7B.

(43) FIG. 7A is a block diagram illustrating the sampler 110 including a plurality of comparators.

(44) Referring to FIG. 7A, the sampler 110 includes first threshold voltage comparator 112-1 through (N−1).sup.th threshold voltage comparator 112-(N−1) and first data level comparator 114-1 through N.sup.th data level comparator 114-N (where N is a natural number).

(45) The first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1) compare the level of each data included in the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 to the (N−1).sup.th threshold voltage VTH.sub.(N−1), and output the comparison result.

(46) For example, the first threshold voltage comparator 112-1 compares the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 for each clock CLK and outputs a signal THCP.sub.1 representing a comparison result. That is, the first threshold voltage comparator 112-1 outputs THCP.sub.1=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the first threshold voltage VTH.sub.1, and outputs THCP.sub.1=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the first threshold voltage VTH.sub.1.

(47) The second threshold voltage comparator 112-2 compares the signal EQ.sub.OUT with the second threshold voltage VTH.sub.2 for each clock CLK and outputs a signal THCP.sub.2 representing a comparison result. That is, the second threshold voltage comparator 112-2 outputs THCP.sub.2=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the second threshold voltage VTH.sub.2, and outputs THCP.sub.2=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the second threshold voltage VTH.sub.2.

(48) Similarly, the (N−2).sup.th threshold voltage comparator 112-(N−2) compares the signal EQ.sub.OUT with the (N−2).sup.th threshold voltage VTH.sub.(N−2) for each clock CLK and outputs a signal THCP.sub.(N−2) representing a comparison result. That is, the (N−2).sup.th threshold voltage comparator 112-(N−2) outputs THCP.sub.(N−2)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−2).sup.th threshold voltage VTH.sub.(N−2), and outputs THCP.sub.(N−2)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−2).sup.th threshold voltage VTH.sub.(N−2).

(49) Similarly, the (N−1).sup.th threshold voltage comparator 112-(N−1) compares the signal EQ.sub.OUT with the (N−1).sup.th threshold voltage VTH.sub.(N−1) for each clock CLK and outputs a signal THCP.sub.(N−1) representing a comparison result. That is, the (N−1).sup.th threshold voltage comparator 112-(N−1) outputs THCP.sub.(N−1)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−1).sup.th threshold voltage VTH.sub.(N−1), and outputs THCP.sub.(N−1)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−1).sup.th threshold voltage VTH.sub.(N−1).

(50) A K.sup.th threshold voltage comparator 112-K (where “K.sup.th threshold voltage comparator 112-K” represents any one of the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1)) outputs a signal THCP.sub.K representing a comparison result obtained by comparing the signal EQ.sub.OUT with the K.sup.th threshold voltage VTH.sub.K for each clock CLK. Specifically, the K.sup.th threshold voltage comparator 112-K outputs THCP.sub.K=1 when the level of the data included in the signal EQ.sub.OUT is greater than the K.sup.th threshold voltage VTH.sub.K, and outputs THCP.sub.K=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the K.sup.th threshold voltage VTH.sub.K.

(51) A (K−1).sup.th threshold voltage comparator 112-(K−1), which is adjacent to the K.sup.th threshold voltage comparator 112-K, outputs a signal THCP.sub.(K−1) representing a comparison result obtained by comparing the signal EQ.sub.OUT with the (K−1).sup.th threshold voltage VTH.sub.(K−1) for each clock CLK. Specifically, the (K−1).sup.th threshold voltage comparator 112-(K−1) outputs THCP.sub.(K−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (K−1).sup.th threshold voltage VTH.sub.(K−1), and outputs THCP.sub.(K−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (K−1).sup.th threshold voltage VTH.sub.(K−1).

(52) Here, K is a natural number satisfying 1≤K≤(N−1), and VTH.sub.1, VTH.sub.2, VTH.sub.3, . . . , VTH.sub.(N−2) and VTH.sub.(N−1) satisfy VTH.sub.1<VTH.sub.2<VTH.sub.3< . . . <VTH.sub.(N−2)<VTH.sub.(N−1).

(53) The level of the data contained in the signal EQ.sub.OUT is determined from the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively. For example, when the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “1”, the level of the data included in the signal EQ.sub.OUT is determined as the N.sup.th data level DL.sub.N, and when the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “0”, the level of the data included in the signal EQ.sub.OUT is determined as the first data level DL.sub.1.

(54) This may be applied to the (K−1).sup.th threshold voltage comparator 112-(K−1). For example, when the signal THCP.sub.1 through the signal THCP.sub.(K−1) outputted by the first threshold voltage comparator 112-1 through the (K−1).sup.th threshold voltage comparator 112-(K−1), respectively, are all “1”, and the signal THCP.sub.K through the signal THCP.sub.(N−1) outputted by the K.sup.th threshold voltage comparator 112-K through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “0”, the level of the data included in the signal EQ.sub.OUT is determined as the K.sup.th data level DL.sub.K. That is, when THCP.sub.1=THCP.sub.2= . . . =THCP.sub.(K−1)=1 and, THCP.sub.K=THCP.sub.(K+1)= . . . =THCP.sub.(N−1)=0, the level of the data included in the signal EQ.sub.OUT is the K.sup.th data level DL.sub.K. Therefore, the level of the data included in the signal EQ.sub.OUT may be determined by checking the values outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1).

(55) The first data level comparator 114-1 through the N.sup.th data level comparator 114-N compare the level of the data included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N, respectively, and output the comparison result thereof.

(56) For example, the first data level comparator 114-1 compares the signal EQ.sub.OUT with the first reference data level DLR.sub.1 for each clock CLK, and outputs a signal DLCP.sub.1 representing the comparison result. Specifically, the first data level comparator 114-1 outputs DLCP.sub.1=1 when the level of the data included in the signal EQ.sub.OUT is greater than the first reference data level DLR.sub.1, and outputs DLCP.sub.1=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the first reference data level DLR.sub.1.

(57) The second data level comparator 114-2 compares the signal EQ.sub.OUT with the second reference data level DLR.sub.2 for each clock CLK, and outputs a signal DLCP.sub.2 representing the comparison result. Specifically, the second data level comparator 114-2 outputs DLCP.sub.2=1 when the level of the data included in the signal EQ.sub.OUT is greater than the second reference data level DLR.sub.2, and outputs DLCP.sub.2=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the second reference data level DLR.sub.2.

(58) The (N−1).sup.th data level comparator 114-(N−1) compares the signal EQ.sub.OUT with the (N−1).sup.th reference data level DLR.sub.(N−1) for each clock CLK, and outputs a signal DLCP.sub.(N−1) representing the comparison result. Specifically, the (N−1).sup.th data level comparator 114-(N−1) outputs DLCP.sub.(N−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (N−1).sup.th reference data level DLR.sub.(N−1), and outputs DLCP.sub.(N−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−1).sup.th reference data level DLR.sub.(N−1).

(59) The N.sup.th data level comparator 114-N compares the signal EQ.sub.OUT with the N.sup.th reference data level DLR.sub.N for each clock CLK, and outputs a signal DLCP.sub.N representing the comparison result. Specifically, the N.sup.th data level comparator 114-N outputs DLCP.sub.N=1 when the level of the data included in the signal EQ.sub.OUT is greater than the N.sup.th reference data level DLR.sub.N, and outputs DLCP.sub.N=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the N.sup.th reference data level DLR.sub.N.

(60) A K.sup.th data level comparator 114-K (where “K.sup.th data level comparator 114-K” represents any one of the first data level comparator 114-1 through the N.sup.th data level comparator 114-N) outputs a signal DLCP.sub.K representing a comparison result obtained by comparing the signal EQ.sub.OUT with the K.sup.th reference data level DLR.sub.K for each clock CLK. Specifically, the K.sup.th data level comparator 114-K outputs DLCP.sub.K=1 when the level of the data included in the signal EQ.sub.OUT is greater than the K.sup.th reference data level DLR.sub.K, and outputs DLCP.sub.K=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the K.sup.th reference data level DLR.sub.K.

(61) A (K−1).sup.th data level comparator 114-(K−1), which is adjacent to the K.sup.th data level comparator 114-K, outputs a signal DLCP.sub.(K−1) representing a comparison result obtained by comparing the signal EQ.sub.OUT with the (K−1).sup.th reference data level DLR.sub.(K−1) for each clock CLK. Specifically, the (K−1).sup.th data level comparator 114-(K−1) outputs DLCP.sub.(K−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (K−1).sup.th reference data level DLR.sub.(K−1), and outputs DLCP.sub.(K−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (K−1).sup.th reference data level DLR.sub.(K−1).

(62) Here, K is a natural number satisfying 1≤K≤N, and DLR.sub.1, DLR.sub.2, DLR.sub.3, . . . , DLR.sub.(N−1), and DLR.sub.N satisfy DLR.sub.1<DLR.sub.2<DLR.sub.3< . . . <DLR.sub.(N−1)<DLR.sub.N. In other words, each of the first data level comparator 114-1 through the N.sup.th data level comparator 114-N compare the level of the data included in the signal EQ.sub.OUT with the corresponding reference data level thereof.

(63) The signal DLCP.sub.1 through the signal DLCP.sub.N outputted by the first data level comparator 114-1 through the N.sup.th data level comparator 114-N, respectively, are used to determined which one of the level of the data included in the signal EQ.sub.OUT and the reference data level is greater. For example, when the data included in the signal EQ.sub.OUT is determined to have a level of the N.sup.th data level DL.sub.N by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.N outputted by the N.sup.th data level comparator 114-N is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the N.sup.th reference data level DLR.sub.N. Similarly, when the data included in the signal EQ.sub.OUT is determined to have a level of the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.1 outputted by the first data level comparator 114-1 is “0”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be smaller than the first reference data level DLR.sub.1.

(64) This may be applied to the K.sup.th data level comparator 114-K as follows.

(65) When the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the K.sup.th reference data level DLR.sub.K.

(66) In addition, when the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “0”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be smaller than the K.sup.th reference data level DLR.sub.K.

(67) The sampler 110 outputs an output signal SMPL.sub.OUT which contains the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, and the signal DLCP.sub.1 through the signal DLCP.sub.N outputted by the first data level comparator 114-1 through the N.sup.th data level comparator 114-N, respectively.

(68) The output signal SMPL.sub.OUT is transmitted to the controller 130 via the DEMUX 120 as a signal DATA.sub.OUT.

(69) FIG. 7B is a block diagram illustrating the sampler 110 including a plurality of comparators wherein an updated threshold voltage and an updated reference data level are applied to the plurality of comparators illustrated in FIG. 7A is exemplified.

(70) Referring to FIG. 7B, the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1) compare the level of the data included in the signal EQ.sub.OUT with an first updated threshold voltage VUTH.sub.1 through an (N−1).sup.th updated threshold voltage VUTH.sub.(N−1), and output the comparison result.

(71) For example, the first threshold voltage comparator 112-1 compares the signal EQ.sub.OUT with the first updated threshold voltage VUTH.sub.1 for each clock CLK and outputs a signal THCP.sub.1 representing a comparison result. That is, the first threshold voltage comparator 112-1 outputs THCP.sub.1=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the first updated threshold voltage VUTH.sub.1, and outputs THCP.sub.1=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the first updated threshold voltage VUTH.sub.1.

(72) The second threshold voltage comparator 112-2 compares the signal EQ.sub.OUT with the second updated threshold voltage VUTH.sub.2 for each clock CLK and outputs a signal THCP.sub.2 representing a comparison result. That is, the second threshold voltage comparator 112-2 outputs THCP.sub.2=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the second updated threshold voltage VUTH.sub.2, and outputs THCP.sub.2=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the second updated threshold voltage VUTH.sub.2.

(73) The (N−2).sup.th threshold voltage comparator 112-(N−2) compares the signal EQ.sub.OUT with the (N−2).sup.th updated threshold voltage VUTH.sub.(N−2) for each clock CLK and outputs a signal THCP.sub.(N−2) representing a comparison result. That is, the (N−2).sup.th threshold voltage comparator 112-(N−2) outputs THCP.sub.(N−2)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−2).sup.th updated threshold voltage VUTH.sub.(N−2), and outputs THCP.sub.(N−2)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−2).sup.th updated threshold voltage VUTH.sub.(N−2).

(74) Similarly, the (N−1).sup.th threshold voltage comparator 112-(N−1) compares the signal EQ.sub.OUT with the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) for each clock CLK and outputs a signal THCP.sub.(N−1) representing a comparison result. That is, the (N−1).sup.th threshold voltage comparator 112-(N−1) outputs THCP.sub.(N−1)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1), and outputs THCP.sub.(N−1)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1).

(75) The K.sup.th threshold voltage comparator 112-K (where “K.sup.th threshold voltage comparator 112-K” represents any one of the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1)) outputs a signal THCP.sub.K representing a comparison result obtained by comparing the signal EQ.sub.OUT with the K.sup.th updated threshold voltage VUTH.sub.K for each clock CLK. Specifically, the K.sup.th threshold voltage comparator 112-K outputs THCP.sub.K=1 when the level of the data included in the signal EQ.sub.OUT is greater than the K.sup.th updated threshold voltage VUTH.sub.K, and outputs THCP.sub.K=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the K.sup.th updated threshold voltage VUTH.sub.K.

(76) The (K−1).sup.th threshold voltage comparator 112-(K−1), which is adjacent to the K.sup.th threshold voltage comparator 112-K, outputs a signal THCP.sub.(K−1) representing a comparison result obtained by comparing the signal EQ.sub.OUT with the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) for each clock CLK. Specifically, the (K−1).sup.th threshold voltage comparator 112-(K−1) outputs THCP.sub.(K−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1), and outputs THCP.sub.(K−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1).

(77) Here, K is a natural number satisfying 1≤K≤(N−1), and VTH.sub.1, VTH.sub.2, VTH.sub.3, . . . , VTH.sub.(N−2) and VTH.sub.(N−1) satisfy VTH.sub.1<VTH.sub.2<VTH.sub.3< . . . <VTH.sub.(N−2)<VTH.sub.(N−1).

(78) The level of the data contained in the signal EQ.sub.OUT is determined from the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively. For example, when the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “1”, the level of the data included in the signal EQ.sub.OUT is determined as the N.sup.th data level DL.sub.N, and when the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “0”, the level of the data included in the signal EQ.sub.OUT is determined as the first data level DL.sub.1.

(79) This may be applied to the (K−1).sup.th threshold voltage comparator 112-(K−1). For example, when the signal THCP.sub.1 through the signal THCP.sub.(K−1) outputted by the first threshold voltage comparator 112-1 through the (K−1).sup.th threshold voltage comparator 112-(K−1), respectively, are all “1”, and the signal THCP.sub.K through the signal THCP.sub.(N−1) outputted by the K.sup.th threshold voltage comparator 112-K through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, are all “0”, the level of the data included in the signal EQ.sub.OUT is determined as the K.sup.th data level DL.sub.K. That is, when THCP.sub.1=THCP.sub.2= . . . =THCP.sub.(K−1)=1 and, THCP.sub.K=THCP.sub.(K+1)= . . . =THCP.sub.(N−1)=0, the level of the data included in the signal EQ.sub.OUT is the K.sup.th data level DL.sub.K. Therefore, the level of the data included in the signal EQ.sub.OUT may be determined by checking the values outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1).

(80) The first data level comparator 114-1 through the N.sup.th data level comparator 114-N compare the level of the data included in the signal EQ.sub.OUT with the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N, respectively, and output the comparison result thereof.

(81) For example, the first data level comparator 114-1 compares the signal EQ.sub.OUT with the first updated reference data level DLUR.sub.1 for each clock CLK, and outputs a signal DLCP.sub.1 representing the comparison result. Specifically, the first data level comparator 114-1 outputs DLCP.sub.1=1 when the level of the data included in the signal EQ.sub.OUT is greater than the first updated reference data level DLUR.sub.1, and outputs DLCP.sub.1=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the first updated reference data level DLUR.sub.1.

(82) The second data level comparator 114-2 compares the signal EQ.sub.OUT with the second updated reference data level DLUR.sub.2 for each clock CLK, and outputs a signal DLCP.sub.2 representing the comparison result. Specifically, the second data level comparator 114-2 outputs DLCP.sub.2=1 when the level of the data included in the signal EQ.sub.OUT is greater than the second updated reference data level DLUR.sub.2, and outputs DLCP.sub.2=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the second updated reference data level DLUR.sub.2.

(83) The (N−1).sup.th data level comparator 114-(N−1) compares the signal EQ.sub.OUT with the (N−1).sup.th updated reference data level DLUR(N-I) for each clock CLK, and outputs a signal DLCP.sub.(N−1) representing the comparison result. Specifically, the (N−1).sup.th data level comparator 114-(N−1) outputs DLCP.sub.(N−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (N−1).sup.th updated reference data level DLUR.sub.(N−1), and outputs DLCP.sub.(N−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−1).sup.th updated reference data level DLUR.sub.(N−1).

(84) The N.sup.th data level comparator 114-N compares the signal EQ.sub.OUT with the N.sup.th updated reference data level DLUR.sub.N for each clock CLK, and outputs a signal DLCP.sub.N representing the comparison result. Specifically, the N.sup.th data level comparator 114-N outputs DLCP.sub.N=1 when the level of the data included in the signal EQ.sub.OUT is greater than the N.sup.th updated reference data level DLUR.sub.N, and outputs DLCP.sub.N=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the N.sup.th updated reference data level DLUR.sub.N.

(85) The K.sup.th data level comparator 114-K (where “K.sup.th data level comparator 114-K” represents any one of the first data level comparator 114-1 through the N.sup.th data level comparator 114-N) outputs a signal DLCP.sub.K representing a comparison result obtained by comparing the signal EQ.sub.OUT with the K.sup.th updated reference data level DLUR.sub.K for each clock CLK. Specifically, the K.sup.th data level comparator 114-K outputs DLCP.sub.K=1 when the level of the data included in the signal EQ.sub.OUT is greater than the K.sup.th updated reference data level DLUR.sub.K, and outputs DLCP.sub.K=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the K.sup.th updated reference data level DLUR.sub.K.

(86) The (K−1).sup.th data level comparator 114-(K−1), which is adjacent to the K.sup.th data level comparator 114-K, outputs a signal DLCP.sub.(K−1) representing a comparison result obtained by comparing the signal EQ.sub.OUT with the (K−1).sup.th updated reference data level DLUR.sub.(K−1) for each clock CLK. Specifically, the (K−1).sup.th data level comparator 114-(K−1) outputs DLCP.sub.(K−1)=1 when the level of the data included in the signal EQ.sub.OUT is greater than the (K−1).sup.th updated reference data level DLUR.sub.(K−1), and outputs DLCP.sub.(K−1)=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the (K−1).sup.th updated reference data level DLUR.sub.(K−1).

(87) Here, K is a natural number satisfying 1≤K≤N, and DLUR.sub.1, DLUR.sub.2, DLUR.sub.3, . . . , DLUR.sub.(N−1), and DLUR.sub.N satisfy DLUR.sub.1<DLUR.sub.2<DLUR.sub.3< . . . <DLUR.sub.(N−1)<DLUR.sub.N. In other words, each of the first data level comparator 114-1 through the N.sup.th data level comparator 114-N compare the level of the data included in the signal EQ.sub.OUT with the corresponding updated reference data level thereof.

(88) The signal DLCP.sub.1 through the signal DLCP.sub.N outputted by the first data level comparator 114-1 through the N.sup.th data level comparator 114-N, respectively, are used to determined which one of the level of the data included in the signal EQ.sub.OUT and the updated reference data level is greater. For example, when the data included in the signal EQ.sub.OUT is determined to have a level of the N.sup.th data level DL.sub.N by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.N outputted by the N.sup.th data level comparator 114-N is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the N.sup.th updated reference data level DLUR.sub.N. Similarly, when the data included in the signal EQ.sub.OUT is determined to have a level of the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.1 outputted by the first data level comparator 114-1 is “0”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be smaller than the first updated reference data level DLUR.sub.1.

(89) This may be applied to the K.sup.th data level comparator 114-K as follows.

(90) When the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the K.sup.th updated reference data level DLUR.sub.K.

(91) In addition, when the level of the data included in the signal EQ.sub.OUT is determined to be the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “0”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be smaller than the K.sup.th updated reference data level DLUR.sub.K.

(92) The sampler 110 outputs an output signal SMPL.sub.OUT which contains the signal THCP.sub.1 through the signal THCP.sub.(N−1) outputted by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), respectively, and the signal DLCP.sub.1 through the signal DLCP.sub.N outputted by the first data level comparator 114-1 through the N.sup.th data level comparator 114-N, respectively.

(93) The output signal SMPL.sub.OUT is transmitted to the controller 130 via the DEMUX 120 as a signal DATA.sub.OUT.

(94) The controller 130 adjusts the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N and the first threshold voltage VTH.sub.1 through the (N−1).sup.th threshold voltage VTH.sub.(N−1) according to the output signal SMPL.sub.OUT of the sampler 110

(95) Specifically, as shown in FIG. 6, the controller 130 includes a threshold voltage controller 132 and a reference data level controller 134.

(96) The reference data level controller 134 adjusts the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N according to the signal DLCP.sub.1 to the signal DLCP.sub.N outputted by the first data level comparator 114-1 through the N.sup.th data level comparator 114-N, respectively and included in the output signal SMPL.sub.OUT.

(97) More specifically, for example, when the data included in the signal EQ.sub.OUT is determined to have a level of the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.1 outputted from the first data level comparator 114-1 is “1”, the reference data level controller 134 increases the first reference data level DLR.sub.1 by a predetermined value to generate the first updated reference data level DLUR.sub.1.

(98) Contrarily, when the data included in the signal EQ.sub.OUT is determined to have a level of the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.1 outputted from the first data level comparator 114-1 is “0”, the reference data level controller 134 decreases the first reference data level DLR.sub.1 by a predetermined value to generate the first updated reference data level DLUR.sub.1.

(99) Similarly, for example, when the data included in the signal EQ.sub.OUT is determined to have a level of the second data level DL.sub.2 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.2 outputted from the second data level comparator 114-2 is “1”, the reference data level controller 134 increases the second reference data level DLR.sub.2 by a predetermined value to generate the second updated reference data level DLUR.sub.2.

(100) Contrarily, when the data included in the signal EQ.sub.OUT is determined to have a level of the second data level DL.sub.2 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.2 outputted from the second data level comparator 114-2 is “0”, the reference data level controller 134 decreases the second reference data level DLR.sub.2 by a predetermined value to generate the second updated reference data level DLUR.sub.2.

(101) As another example, when the data included in the signal EQ.sub.OUT is determined to have a level of the third data level DL.sub.3 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.3 outputted from the third data level comparator 114-3 is “1”, the reference data level controller 134 increases the third reference data level DLR.sub.3 by a predetermined value to generate the third updated reference data level DLUR.sub.3.

(102) Contrarily, when the data included in the signal EQ.sub.OUT is determined to have a level of the third data level DL.sub.3 by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.3 outputted from the third data level comparator 114-3 is “0”, the reference data level controller 134 decreases the third reference data level DLR.sub.3 by a predetermined value to generate the third updated reference data level DLUR.sub.3.

(103) This may be applied to the K.sup.th data level comparator 114-K described above. For example, when the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted from the K.sup.th data level comparator 114-K is “1” (that is, when DL.sub.K>DLR.sub.K as shown in FIG. 9A), the reference data level controller 134 increases the K.sup.th reference data level DLR.sub.K by a predetermined voltage to generate the K.sup.th updated reference data level DLUR.sub.K.

(104) In addition, as another example, when the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted from the K.sup.th data level comparator 114-K is “0” (that is, when DL.sub.K<DLR.sub.K as shown in FIG. 9B), the reference data level controller 134 decreases the K.sup.th reference data level DLR.sub.K by a predetermined voltage to generate the K.sup.th updated reference data level DLUR.sub.K.

(105) The reference data level controller 134 provides the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N to the sampler 110.

(106) The sampler 110 compares the received signal RS (or equalized signal EQ.sub.OUT) with the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N and to determine which one of the received signal RS (or equalized signal EQ.sub.OUT) and the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N is greater, and provides the comparison result to the controller 130. That is, the sampler 110 updates the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N with the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N, and each data included in the received signal RS (or equalized signal EQ.sub.OUT) is subjected to the process described above.

(107) The threshold voltage controller 132 calculates at least one of a (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) and a K.sup.th updated threshold voltage VUTH.sub.K from the K.sup.th updated reference data level DLUR.sub.K, and updates at least one of the (K−1).sup.th threshold voltage VTH.sub.(K−1) and the K.sup.th threshold voltage VTH.sub.K of the sampler 110 with the calculated (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) and the calculated K.sup.th updated threshold voltage VUTH.sub.K.

(108) According to one embodiment of the present invention, the threshold voltage controller 132 generates the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) from the first reference data level DLR.sub.1 through N.sup.th reference data level DLR.sub.N and the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N generated by the reference data level controller 134, thereby updating each threshold voltage of the sampler 110.

(109) For example, as shown in equation 4 below, the threshold voltage controller 132 may update the (K−1).sup.th threshold voltage VTH.sub.(K−1) with the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) obtained from the average of the K.sup.th updated reference data level DLUR.sub.K and the (K−1).sup.th reference data level DLR.sub.(K−1). That is, the threshold voltage controller 132 may update two neighboring threshold voltages from the K.sup.th updated reference data level DLUR.sub.K.

(110) $\begin{array}{cc}{\mathrm{VUTH}}_{\left(K-1\right)}=\frac{{\mathrm{DLUR}}_K+{\mathrm{DLR}}_{\left(K-1\right)}}{2}& \left[\mathrm{Equation}4\right]\end{array}$

(111) In another embodiment, as shown in equation 5 below, the threshold voltage controller 132 may update the K.sup.th threshold voltage VTH.sub.K with the K.sup.th updated threshold voltage VUTH.sub.K obtained from the average of the (K+1).sup.th reference data level DLR.sub.(K+1) and the K.sup.th updated reference data level DLUR.sub.K.

(112) $\begin{array}{cc}{\mathrm{VUTH}}_K=\frac{{\mathrm{DLR}}_{\left(K+1\right)}+{\mathrm{DLUR}}_K}{2}& \left[\mathrm{Equation}5\right]\end{array}$

(113) The threshold voltage controller 132 may update only the (K−1).sup.th threshold voltage VTH.sub.(K−1), update only the K.sup.th threshold voltage VTH.sub.K, or update both of the (K−1).sup.th threshold voltage VTH.sub.(K−1) and the K.sup.th threshold voltage VTH.sub.K. That is, The threshold voltage controller 132 may update either the (K−1).sup.th threshold voltage VTH.sub.(K−1)or the K.sup.th threshold voltage VTH.sub.K, or both of the (K−1).sup.th threshold voltage VTH.sub.(K−1) and the K.sup.th threshold voltage VTH.sub.K from the K.sup.th updated reference data level DLUR.sub.K which is generated when there is a change in the K.sup.th reference data level DLR.sub.K. However, when the first reference data level DLR.sub.1 is adjusted to generate the first updated reference data level DLUR.sub.1, only the first threshold voltage VTH.sub.1 is updated, and when the N.sup.th reference data level DLR.sub.N is adjusted to generate the N.sup.th updated reference data level DLUR.sub.N, only the (N−1).sup.th threshold voltage VTH.sub.(N−1) is updated.

(114) Here, “update” means to replace the old value with a new value. For example, “to update the K.sup.th threshold voltage VTH.sub.K with the K.sup.th updated threshold voltage VUTH.sub.K” means that “the value of the K.sup.th threshold voltage VTH.sub.K is replaced with that of the K.sup.th updated threshold voltage VUTH.sub.K” or “the value of the K.sup.th threshold voltage VTH.sub.K is overwritten by that of the K.sup.th updated threshold voltage VUTH.sub.K.”

(115) The threshold voltage controller 132 provides the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) to the sampler 110.

(116) The sampler 110 may update the first threshold voltage VTH.sub.1 through the (N−1).sup.th threshold voltage VTH.sub.(N−1) with the first threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1), respectively, and compare the updated threshold voltage with the level of the data.

(117) That is, as shown in FIG. 7B, the sampler 110 compares the data included in the output signal EQ.sub.OUT with the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N and the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) provided by the controller 130, and provides the comparison result as the output signal SMPL.sub.OUT to the controller 130. While FIG. 7B shows the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N and the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1), the entirety of the first updated reference data level DLUR.sub.1 through the N.sup.th updated reference data level DLUR.sub.N and the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) may or may not be updated. For example, only the first reference data level DLR.sub.1 may be updated with the first updated reference data level DLUR.sub.1 depending on the level of the output signal EQ.sub.OUT. Similarly, only the second threshold voltage VTH.sub.2 and the fourth threshold voltage VTH.sub.4 may be updated with second updated threshold voltage VUTH.sub.2 and the fourth updated threshold voltage VUTH.sub.4, respectively, depending on the level of the output signal EQ.sub.OUT. In other words, when the reference data level controller 134 and the threshold voltage controller 132 generate any updated reference data levels and updated threshold voltages, the updated reference data levels and the updated threshold voltages are provided to the sampler 110 and the reference data levels and the threshold voltages of the sampler 110 are replaced with the updated reference data levels and the updated threshold voltages, respectively. A detailed description will be given with reference to FIG. 8A through FIG. 8E later.

(118) According to another embodiment of the present invention, when the received signal RS or equalized signal EQ.sub.OUT is a differential signal, all of the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) are not required to be calculated. Specifically, since the differential signal includes a differential pair consisting of non-inverted and inverted signals, a threshold voltage for the non-inverted signal may be inverted to obtain a threshold voltage for the inverted signal.

(119) That is, when the received signal RS or equalized signal EQ.sub.OUT is a differential signal, the threshold voltage controller 132 may invert the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) to generate the (N−K+1).sup.th updated threshold voltage VUTH.sub.(N−K+1), and both of the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) and the (N−K+1).sup.th updated threshold voltage VUTH.sub.(N−K+1) may be provided to the sampler 110.

(120) To facilitate the understanding of the present invention, an example receiver according to the present invention capable of receiving a PAM-4 signal will be described with reference to FIGS. 8A through 8F.

(121) FIG. 8A is a block diagram illustrating a PAM-4 receiver 1000a according to the present invention. The PAM-4 receiver 1000a according to the present invention shown in FIG. 8A is identical to the PAM-N receiver 1000 shown in FIG. 6 except the configuration of a sampler 110a and the signals provided to the controller 130. Therefore, the PAM-4 receiver 1000a according to the present invention will be described with a focus on the configuration of the sampler 110a and the signals exchanged between the sampler 110a and the controller 130 hereinafter.

(122) FIG. 8B is a diagram illustrating the sampler 110a capable of sampling a PAM-4 signal. That is, the sampler 110a shown in FIG. 8B is the same as the sampler 110 shown in FIG. 7A when N=4.

(123) Referring to FIG. 8B, the sampler 110a includes a first threshold voltage comparator 112-1 through a third threshold voltage comparator 112-3 and a first data level comparator 114-1 through a fourth data level comparator 114-4.

(124) The first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 compare the level of each data included in the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 to the third threshold voltage VTH.sub.3, and output the comparison result.

(125) For example, the first threshold voltage comparator 112-1 compares the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 for each clock CLK and outputs a signal THCP.sub.1 representing a comparison result. That is, the first threshold voltage comparator 112-1 outputs THCP.sub.1=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the first threshold voltage VTH.sub.1, and outputs THCP.sub.1=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the first threshold voltage VTH.sub.1.

(126) The second threshold voltage comparator 112-2 compares the signal EQ.sub.OUT with the second threshold voltage VTH.sub.2 for each clock CLK and outputs a signal THCP.sub.2 representing a comparison result. That is, the second threshold voltage comparator 112-2 outputs THCP.sub.2=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the second threshold voltage VTH.sub.2, and outputs THCP.sub.2=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the second threshold voltage VTH.sub.2.

(127) The third threshold voltage comparator 112-3 compares the signal EQ.sub.OUT with the third threshold voltage VTH.sub.3 for each clock CLK and outputs a signal THCP.sub.3 representing a comparison result. That is, the third threshold voltage comparator 112-3 outputs THCP.sub.3=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the third threshold voltage VTH.sub.3, and outputs THCP.sub.3=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the third threshold voltage VTH.sub.3.

(128) The level of the data contained in the signal EQ.sub.OUT is determined from the signal THCP.sub.1 through the signal THCP.sub.3 outputted by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, respectively. For example, when the signal THCP.sub.1 through the signal THCP.sub.3 outputted by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, respectively, are all “1”, the level of the data included in the signal EQ.sub.OUT is determined as the fourth data level DL.sub.1. When the signal THCP.sub.1 and the signal THCP.sub.2 outputted by the first threshold voltage comparator 112-1 and the second threshold voltage comparator 112-2, respectively, are both “1”, and the signal THCP.sub.3 outputted by the third threshold voltage comparator 112-3 is “0”, the level of the data included in the signal EQ.sub.OUT is determined as the third data level DL.sub.3. When the signal THCP.sub.1 outputted by the first threshold voltage comparator 112-1 is “1”, and the signal THCP.sub.2 and the signal THCP.sub.3 outputted by the second threshold voltage comparator 112-2 and the third threshold voltage comparator 112-3, respectively, are both “0”, the level of the data included in the signal EQ.sub.OUT is determined as the second data level DL.sub.2. When the signal THCP.sub.1 through the signal THCP.sub.3 outputted by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, respectively, are all “0”, the level of the data included in the signal EQ.sub.OUT is determined as the first data level DL.sub.1. Therefore, the level of the data included in the signal EQ.sub.OUT may be determined by checking the values outputted by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3.

(129) The first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1 through the fourth reference data level DLR.sub.4, respectively, and output the comparison result thereof.

(130) For example, the first data level comparator 114-1 compares the signal EQ.sub.OUT with the first reference data level DLR.sub.1 for each clock CLK, and outputs a signal DLCP.sub.1 representing the comparison result. Specifically, the first data level comparator 114-1 outputs DLCP.sub.1=1 when the level of the data included in the signal EQ.sub.OUT is greater than the first reference data level DLR.sub.1, and outputs DLCP.sub.1=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the first reference data level DLR.sub.1.

(131) The second data level comparator 114-2 compares the signal EQ.sub.OUT with the second reference data level DLR.sub.2 for each clock CLK, and outputs a signal DLCP.sub.2 representing the comparison result. Specifically, the second data level comparator 114-2 outputs DLCP.sub.2=1 when the level of the data included in the signal EQ.sub.OUT is greater than the second reference data level DLR.sub.2, and outputs DLCP.sub.2=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the second reference data level DLR.sub.2.

(132) The third data level comparator 114-3 compares the signal EQ.sub.OUT with the third reference data level DLR.sub.3 for each clock CLK, and outputs a signal DLCP.sub.3 representing the comparison result. Specifically, the third data level comparator 114-3 outputs DLCP.sub.3=1 when the level of the data included in the signal EQ.sub.OUT is greater than the third reference data level DLR.sub.3, and outputs DLCP.sub.3=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the third reference data level DLR.sub.3.

(133) The fourth data level comparator 114-4 compares the signal EQ.sub.OUT with the fourth reference data level DLR.sub.4 for each clock CLK, and outputs a signal DLCP.sub.4 representing the comparison result. Specifically, the fourth data level comparator 114-4 outputs DLCP.sub.4=1 when the level of the data included in the signal EQ.sub.OUT is greater than the fourth reference data level DLR.sub.4, and outputs DLCP.sub.4=0 when the level of the data included in the signal EQ.sub.OUT is smaller than the fourth reference data level DLR.sub.4.

(134) In other words, each of the first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data included in the signal EQ.sub.OUT with the corresponding reference data level thereof.

(135) The signal DLCP.sub.1 through the signal DLCP.sub.4 outputted by the first data level comparator 114-1 through the fourth data level comparator 114-4, respectively, are used to determined which one of the level of the data included in the signal EQ.sub.OUT and the reference data level is greater.

(136) For example, when the level of the data included in the signal EQ.sub.OUT is determined to be the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.1 outputted by the first data level comparator 114-1 is “0”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be smaller than the first reference data level DLR.sub.1. Similarly, when the level of the data included in the signal EQ.sub.OUT is determined to be the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.1 outputted by the fourth data level comparator 114-1 is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the first reference data level DLR.sub.1.

(137) When the level of the data included in the signal EQ.sub.OUT is determined to be the second data level DL.sub.2 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.2 outputted by the second data level comparator 114-2 is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the second reference data level DLR.sub.2.

(138) In another example, when the level of the data included in the signal EQ.sub.OUT is determined to be the fourth data level DL.sub.4 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.4 outputted by the fourth data level comparator 114-4 is “1”, the level of the data included in the signal EQ.sub.OUT is deduced or determined to be greater than the fourth reference data level DLR.sub.4.

(139) The sampler 110a outputs the output signals SMPL.sub.OUT containing the signal THCP.sub.1 through the signal THCP.sub.3 outputted by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, respectively, and the signal DLCP.sub.1 through the signal DLCP.sub.4 outputted by the first data level comparator 114-1 through the fourth data level comparator 114-4, respectively.

(140) The output signal SMPL.sub.OUT is transmitted to the controller 130 via the DEMUX 120 as a signal DATA.sub.OUT.

(141) The controller 130, upon receiving the output signal SMPL.sub.OUT, updates the threshold voltages and the reference data levels according to the signals THCP.sub.1 through the signal THCP.sub.3 and the signal DLCP.sub.1 through the signal DLCP.sub.4 included in the output signal SMPL.sub.OUT.

(142) Specifically, the reference data level controller 134 adjusts the first reference data level DLR.sub.1 through the fourth reference data level DLR.sub.4 based on the signal DLCP.sub.1 through the signal DLCP.sub.4 outputted by the first data level comparator 114-1 through the fourth data level comparator 114-4, respectively, and included in the output signal SMPL.sub.OUT.

(143) More specifically, for example, when the level of the data included in the signal EQ.sub.OUT is determined as the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.1 outputted from the first data level comparator 114-1 is “0”, the reference data level controller 134 decreases the first reference data level DLR.sub.1 by a predetermined value to generate the first updated reference data level DLUR.sub.1. When the level of the data included in the signal EQ.sub.OUT is determined as the first data level DL.sub.1 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.1 outputted from the first data level comparator 114-1 is “1”, the reference data level controller 134 increases the first reference data level DLR.sub.1 by a predetermined value to generate the first updated reference data level DLUR.sub.1.

(144) Similarly, for example, when the level of the data included in the signal EQ.sub.OUT is determined as the second data level DL.sub.2 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.2 outputted from the second data level comparator 114-2 is “0”, the reference data level controller 134 decreases the second reference data level DLR.sub.2 by a predetermined value to generate the second updated reference data level DLUR.sub.2. When the level of the data included in the signal EQ.sub.OUT is determined as the second data level DL.sub.2 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.2 outputted from the second data level comparator 114-2 is “1”, the reference data level controller 134 increases the second reference data level DLR.sub.2 by a predetermined value to generate the second updated reference data level DLUR.sub.2.

(145) As another example, when the level of the data included in the signal EQ.sub.OUT is determined as the third data level DL.sub.3 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.3 outputted from the third data level comparator 114-3 is “0”, the reference data level controller 134 decreases the third reference data level DLR.sub.3 by a predetermined value to generate the third updated reference data level DLUR.sub.3. When the level of the data included in the signal EQ.sub.OUT is determined as the third data level DL.sub.3 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.3 outputted from the third data level comparator 114-3 is “1”, the reference data level controller 134 increases the third reference data level DLR.sub.3 by a predetermined value to generate the third updated reference data level DLUR.sub.3.

(146) As yet another example, when the level of the data included in the signal EQ.sub.OUT is determined as the fourth data level DL.sub.4 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.4 outputted from the fourth data level comparator 114-4 is “0”, the reference data level controller 134 decreases the fourth reference data level DLR.sub.4 by a predetermined value to generate the fourth updated reference data level DLUR.sub.4. When the level of the data included in the signal EQ.sub.OUT is determined as the fourth data level DL.sub.4 by the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3, and the signal DLCP.sub.4 outputted from the fourth data level comparator 114-4 is “1”, the reference data level controller 134 increases the fourth reference data level DLR.sub.4 by a predetermined value to generate the fourth updated reference data level DLUR.sub.4.

(147) Threshold voltage controller 132 calculates the first updated threshold voltage VUTH.sub.1 through the third updated threshold voltage VUTH.sub.3 from the first updated reference data level DLUR.sub.1 through the fourth updated reference data level DLUR.sub.4 generated by the reference data level controller 134.

(148) For example, when the third reference data level DLR.sub.3 is updated with the third updated reference data level DLUR.sub.3, the second updated threshold voltage VUTH.sub.2 may be calculated from equation 6 below. That is, when the third updated reference data level DLUR.sub.3 is generated by updating the third reference data level DLR.sub.3, the second threshold voltage VTH.sub.2 may also be updated with the second updated threshold voltage VUTH.sub.2 which is an average value of the second reference data level DLR.sub.2 and the third updated reference data level DLUR.sub.3 according to the equation 6 below.

(149) $\begin{array}{cc}{\mathrm{VUTH}}_2=\frac{{\mathrm{DLUR}}_3+{\mathrm{DLR}}_2}{2}& \left[\mathrm{Equation}6\right]\end{array}$

(150) In addition, when the third updated reference data level DLUR.sub.3 is generated to update the reference data level DLR.sub.3, the third threshold voltage VTH.sub.3 may be updated with the third updated threshold voltage VUTH.sub.3 which is an average value of the fourth reference data level DLR.sub.4 and the third updated reference data level DLUR.sub.3 according to equation 7 below.

(151) $\begin{array}{cc}{\mathrm{VUTH}}_3=\frac{{\mathrm{DLR}}_4+{\mathrm{DLUR}}_3}{2}& \left[\mathrm{Equation}7\right]\end{array}$

(152) That is, the threshold voltage controller 132 may update only the second threshold voltage VTH.sub.2 from the third updated reference data level DLUR.sub.3, update only the third threshold voltage VTH.sub.3, or update both the second threshold voltage VTH.sub.2 and the third threshold voltage VTH.sub.3.

(153) Similarly, when the second updated reference data level DLUR.sub.2 is generated, and the second reference data level DLR.sub.2 is updated, the first threshold voltage VTH.sub.1 may be updated with the first updated threshold voltage VUTH.sub.1 which is an average value of the first reference data level DLR.sub.1 and the second updated reference data level DLUR.sub.2 according to the equation 8 below.

(154) $\begin{array}{cc}{\mathrm{VUTH}}_1=\frac{{\mathrm{DLUR}}_2+{\mathrm{DLR}}_1}{2}& \left[\mathrm{Equation}8\right]\end{array}$

(155) In addition, when the second updated reference data level DLUR.sub.2 is generated and the reference data level DLR.sub.2 is updated, the second threshold voltage VTH.sub.2 may be updated with the second updated threshold voltage VUTH.sub.2 which is an average value of the third reference data level DLR.sub.3 and the second updated reference data level DLUR.sub.2 according to the equation 9 below.

(156) $\begin{array}{cc}{\mathrm{VUTH}}_2=\frac{{\mathrm{DLR}}_3+{\mathrm{DLUR}}_2}{2}& \left[\mathrm{Equation}9\right]\end{array}$

(157) That is, the threshold voltage controller 132 may update only the first threshold voltage VTH.sub.1 from the second updated reference data level DLUR.sub.2, update only the second threshold voltage VTH.sub.2, or update both the first threshold voltage VTH.sub.1 and the second threshold voltage VTH.sub.2.

(158) However, when the first updated reference data level DLUR.sub.1 is generated by adjusting the first reference data level DLR.sub.1, only the first threshold voltage VTH.sub.1 is updated as shown in equation 10 below, and when the fourth reference data level DLUR.sub.1 is generated by adjusting the fourth reference data level DLR.sub.1, only the third threshold voltage VTH.sub.3 is updated as in equation 11 below.

(159) $\begin{array}{cc}{\mathrm{VUTH}}_1=\frac{{\mathrm{DLR}}_2+{\mathrm{DLUR}}_1}{2}& \left[\mathrm{Equation}10\right]\end{array}$$\begin{array}{cc}{\mathrm{VUTH}}_3=\frac{{\mathrm{DLUR}}_4+{\mathrm{DLR}}_3}{2}& \left[\mathrm{Equation}11\right]\end{array}$

(160) The controller 130 provides the first updated reference data level DLUR.sub.1 through the third updated reference data level DLUR.sub.3 and the first updated threshold voltage VUTH.sub.1 through the third updated threshold voltage VUTH.sub.3 to the sampler 110a.

(161) Hereinafter, the PAM-4 receiver according to the present invention will be described in more detail with reference to FIGS. 8B through 8F.

(162) In order to facilitate description, it is assumed that the PAM-4 receiver according to the present invention sequentially receives data “10”, “01”, “10” and “00”.

(163) The received data “10” is equalized by the equalizer 100 and outputted as the equalized signal EQ.sub.OUT, and the signal EQ.sub.OUT is inputted to the sampler 110a.

(164) As shown in FIG. 8B, the signal EQ.sub.OUT is inputted into the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 and also into the first data level comparator 114-1 through the fourth data level comparator 114-4, and is compared therewith. That is, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 compare the level of the data corresponding to the data “10” included in the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 through the third threshold voltage VTH.sub.3, and the first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data corresponding to the data “10” included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1 through the fourth reference data level DLR.sub.4.

(165) Since the level of the data included in the signal EQ.sub.OUT corresponds to data “10”, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 should determine the level as the third data level DL.sub.3. In addition, the third data level comparator 114-3 outputs DLCP.sub.3=0 or DLCP.sub.3=1 according to the result of comparison between the level of the data included in the signal EQ.sub.OUT and the third reference data level DLR.sub.3. That is, the third data level comparator 114-3 outputs DLCP.sub.3=0 or DLCP.sub.3=1 depending on which one of the level of the data included in the signal EQ.sub.OUT and the third reference data level DLR.sub.3 is greater.

(166) The comparison result is transmitted to the controller 130. The controller 130 increases or decreases the third reference data level DLR.sub.3 according to the value of DLCP.sub.3 to generate an third updated reference data level DLUR.sub.3, and generates a second updated threshold voltage VUTH.sub.2 and a third updated threshold voltage VUTH.sub.3 according to the equations 6 and 7.

(167) The third updated reference data level DLUR.sub.3, the second updated threshold voltage VUTH.sub.2 and the third updated threshold voltage VUTH.sub.3 are transmitted to the sampler 110a.

(168) Once the third updated reference data level DLUR.sub.3, the second updated threshold voltage VUTH.sub.2 and the third updated threshold voltage VUTH.sub.3 are received, the sampler 110a performs a comparison of the next data “01” as shown in FIG. 8C.

(169) Specifically, the received data “01” is equalized by the equalizer 100 and outputted as an equalized signal EQ.sub.OUT, which is then inputted to the sampler 110a.

(170) As shown in FIG. 8C, the signal EQ.sub.OUT is inputted into the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 and also into the first data level comparator 114-1 through the fourth data level comparator 114-4, and is compared therewith. That is, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 compare the level of the data corresponding to the data “01” included in the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1, the second updated threshold voltage VUTH.sub.2 and the third updated threshold voltage VUTH.sub.3, and the first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data corresponding to the data “01” included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1, the second reference data level DLR.sub.2, the third updated reference data level DLUR.sub.3 and the fourth reference data level DLR.sub.4.

(171) Since the level of the data included in the signal EQ.sub.OUT corresponds to data “01”, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 should determine the level as the second data level DL.sub.2. In addition, the second data level comparator 114-2 outputs DLCP.sub.2=0 or DLCP.sub.2=1 according to the result of comparison between the level of the data included in the signal EQ.sub.OUT and the second reference data level DLR.sub.2. That is, the second data level comparator 114-2 outputs DLCP.sub.2=0 or DLCP.sub.2=1 depending on which one of the level of the data included in the signal EQ.sub.OUT and the second reference data level DLR.sub.2 is greater.

(172) The comparison result is transmitted to the controller 130. The controller 130 increases or decreases the second reference data level DLR.sub.2 according to the value of DLCP.sub.2 to generate an second updated reference data level DLUR.sub.2, and generates a first updated threshold voltage VUTH.sub.1 and a second re-updated threshold voltage VU2TH.sub.2 according to the equations 12 and 13.

(173) 0$\begin{array}{cc}{\mathrm{VUTH}}_1=\frac{{\mathrm{DLUR}}_2+{\mathrm{DLR}}_1}{2}& \left[\mathrm{Equation}12\right]\end{array}$$\begin{array}{cc}\mathrm{VU}2{\mathrm{TH}}_2=\frac{{\mathrm{DLUR}}_3+{\mathrm{DLUR}}_2}{2}& \left[\mathrm{Equation}13\right]\end{array}$

(174) In the case of equation 13, since the third updated reference data level DLUR.sub.3 is generated by receiving data “10”, and the second updated reference data level DLUR.sub.2 is generated by receiving data “01”, the second re-updated threshold voltage VU2TH.sub.2 is calculated from the average of the third updated reference data level DLUR.sub.3 and the second updated reference data level DLUR.sub.2.

(175) The second updated reference data level DLUR.sub.2, the first updated threshold voltage VUTH.sub.1 and the second re-updated threshold voltage VU2TH.sub.2 are transmitted to the sampler 110a.

(176) Once the second updated reference data level DLUR.sub.2, the first updated threshold voltage VUTH.sub.1 and the second re-updated threshold voltage VU2TH.sub.2 are received, the sampler 110a performs a comparison of the next data “10” as shown in FIG. 8D.

(177) Specifically, the received data “10” is equalized by the equalizer 100 and outputted as an equalized signal EQ.sub.OUT, which is then inputted to the sampler 110a.

(178) As shown in FIG. 8C, the signal EQ.sub.OUT is inputted into the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 and also into the first data level comparator 114-1 through the fourth data level comparator 114-4, and is compared therewith. That is, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 compare the level of the data corresponding to the data “01” included in the signal EQ.sub.OUT with the first updated threshold voltage VUTH.sub.1, the second re-updated threshold voltage VU2TH.sub.2 and the third updated threshold voltage VUTH.sub.3, and the first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data corresponding to the data “01” included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1, the second updated reference data level DLUR.sub.2, the third updated reference data level DLUR.sub.3 and the fourth reference data level DLR.sub.4.

(179) Since the level of the data included in the signal EQ.sub.OUT corresponds to data “10”, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 should determine the level as the third data level DL.sub.3. In addition, the third data level comparator 114-3 outputs DLCP.sub.3=0 or DLCP.sub.3=1 according to the result of comparison between the level of the data included in the signal EQ.sub.OUT and the third updated reference data level DLUR.sub.3. That is, the third data level comparator 114-3 outputs DLCP.sub.3=0 or DLCP.sub.3=1 depending on which one of the level of the data included in the signal EQ.sub.OUT and the third updated reference data level DLUR.sub.3 is greater.

(180) Here, when the reference data level is updated by the previous data, the reference data level compared with the current data included in the signal EQ.sub.OUT is always the updated (or re-updated) reference data level.

(181) The comparison result is transmitted to the controller 130. The controller 130 increases or decreases the third updated reference data level DLUR.sub.3 according to the value of DLCP.sub.3 to generate a third re-updated reference data level DLU2R3, and generates a second re-re-updated threshold voltage VU3TH.sub.2 and a third re-updated threshold voltage VU2TH.sub.3 according to the equations 12 and 13 below, respectively.

(182) $\begin{array}{cc}\mathrm{VU}3{\mathrm{TH}}_2=\frac{\mathrm{DLU}2R_3+{\mathrm{DLUR}}_2}{2}& \left[\mathrm{Equation}14\right]\end{array}$$\begin{array}{cc}\mathrm{VU}2{\mathrm{TH}}_3=\frac{{\mathrm{DLR}}_4+\mathrm{DLU}2R_3}{2}& \left[\mathrm{Equation}15\right]\end{array}$

(183) A third re-updated reference data level DLU2R.sub.3, a second re-re-updated threshold voltage VU3TH.sub.2, and a third re-updated threshold voltage VU2T.sub.3 are transmitted to the sampler 110a.

(184) Once the third re-updated reference data level DLU2R.sub.3, the second re-re-updated threshold voltage VU3TH.sub.2 and the third re-updated threshold voltage VU2TH.sub.3 are received, the sampler 110a performs a comparison of the next data “00” as shown in FIG. 8E.

(185) Specifically, the received data “00” is equalized by the equalizer 100 and outputted as an equalized signal EQ.sub.OUT, which is then inputted to the sampler 110a.

(186) As shown in FIG. 8E, the signal EQ.sub.OUT is inputted into the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 and also into the first data level comparator 114-1 through the fourth data level comparator 114-4, and is compared therewith. That is, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 compare the level of the data corresponding to the data “00” included in the signal EQ.sub.OUT with the first updated threshold voltage VUTH.sub.1, the second re-re-updated threshold voltage VU3TH.sub.2 and the third re-updated threshold voltage VU2TH.sub.3, and the first data level comparator 114-1 through the fourth data level comparator 114-4 compare the level of the data corresponding to the data “00” included in the signal EQ.sub.OUT with the first reference data level DLR.sub.1, the second updated reference data level DLUR.sub.2, the third re-updated reference data level DLU2R.sub.3 and the fourth reference data level DLR.sub.4.

(187) Since the level of the data included in the signal EQ.sub.OUT corresponds to data “00”, the first threshold voltage comparator 112-1 through the third threshold voltage comparator 112-3 should determine the level as the first data level DL.sub.1. In addition, the first data level comparator 114-1 outputs DLCP.sub.1=0 or DLCP.sub.1=1 according to the result of comparison between the level of the data included in the signal EQ.sub.OUT and the first reference data level DLR.sub.1. That is, the first data level comparator 114-1 outputs DLCP.sub.1=0 or DLCP.sub.1=1 depending on which one of the level of the data included in the signal EQ.sub.OUT and the first reference data level DLR.sub.1 is greater.

(188) The comparison result is transmitted to the controller 130. The controller 130 increases or decreases the first reference data level DLR.sub.1 according to the value of DLCP.sub.1 to generate an first updated reference data level DLUR.sub.1, and generates a first re-updated threshold voltage VU2TH.sub.1 according to the equation 16 below.

(189) $\begin{array}{cc}\mathrm{VU}2{\mathrm{TH}}_1=\frac{{\mathrm{DLUR}}_2+{\mathrm{DLUR}}_1}{2}& \left[\mathrm{Equation}16\right]\end{array}$

(190) The first updated reference data level DLUR.sub.1 and the first re-updated threshold voltage VU2TH.sub.1 are transmitted to the sampler 110a.

(191) Once the first updated reference data level DLUR.sub.1 and the first re-updated threshold voltage VU2TH.sub.1 are received, the sampler 110a performs a comparison of the next data as shown in FIG. 8F, and the controller updates the reference data level and the threshold voltage.

(192) Hereinafter, a method of adaptively adjusting threshold voltages of a PAM-N receiver according to an embodiment of the present invention will be described in detail.

(193) FIG. 10 is a flowchart illustrating a method of adaptively adjusting threshold voltages of a PAM-N receiver according to an embodiment of the present invention. The method of adaptively adjusting threshold voltages of a PAM-N receiver according to an embodiment of the present invention is performed in the PAM-N receiver shown in FIG. 6, and as described above, the level of the data included in the received signal RS or the equalized signal EQ.sub.OUT is one of the first data level DL.sub.1 through the N.sup.th data level DL.sub.N.

(194) Hereinafter, any one data level selected from the first data level DL.sub.1 through the N.sup.th data level DL.sub.N is referred to as “K.sup.th data level DL.sub.K” and the data level which is one level lower than the K.sup.th data level DL.sub.K is referred to as “(K−1).sup.th data level DL.sub.(K−1)” as described above with reference to FIGS. 5 and 6.

(195) Referring to FIG. 10, the sampler 110 compares the level of the data included in the equalized signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 through the (N−1).sup.th threshold voltage VTH.sub.(N−1) to determine the data level (S100).

(196) Specifically, as described above with reference to FIG. 7A, the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1) of the sampler 110 compare the level of each data included in the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 through the (N−1).sup.th threshold voltage VTH.sub.(N−1), and the comparison result is outputted.

(197) For example, the first threshold voltage comparator 112-1 compares the signal EQ.sub.OUT with the first threshold voltage VTH.sub.1 for each clock CLK and outputs a signal THCP.sub.1 representing a comparison result. That is, the first threshold voltage comparator 112-1 outputs THCP.sub.1=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the first threshold voltage VTH.sub.1, and outputs THCP.sub.1=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the first threshold voltage VTH.sub.1.

(198) The second threshold voltage comparator 112-2 compares the signal EQ.sub.OUT with the second threshold voltage VTH.sub.2 for each clock CLK and outputs a signal THCP.sub.2 representing a comparison result. That is, the second threshold voltage comparator 112-2 outputs THCP.sub.2=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the second threshold voltage VTH.sub.2, and outputs THCP.sub.2=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the second threshold voltage VTH.sub.2.

(199) Similarly, the (N−2).sup.th threshold voltage comparator 112-(N−2) compares the signal EQ.sub.OUT with the (N−2).sup.th threshold voltage VTH.sub.(N−2) for each clock CLK and outputs a signal THCP.sub.(N−2) representing a comparison result. That is, the (N−2).sup.th threshold voltage comparator 112-(N−2) outputs THCP.sub.(N−2)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−2).sup.th threshold voltage VTH.sub.(N−2), and outputs THCP.sub.(N−2)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−2).sup.th threshold voltage VTH.sub.(N−2).

(200) Similarly, the (N−1).sup.th threshold voltage comparator 112-(N−1) compares the signal EQ.sub.OUT with the (N−1).sup.th threshold voltage VTH.sub.(N−1) for each clock CLK and outputs a signal THCP.sub.(N−1) representing a comparison result. That is, the (N−1).sup.th threshold voltage comparator 112-(N−1) outputs THCP.sub.(N−1)=1 for each data when the level of the data included in the signal EQ.sub.OUT is greater than the (N−1).sup.th threshold voltage VTH.sub.(N−1), and outputs THCP.sub.(N−1)=0 for each data when the level of the data included in the signal EQ.sub.OUT is smaller than the (N−1).sup.th threshold voltage VTH.sub.(N−1).

(201) Thereafter, the sampler 110 compares the level of the data determined to have the K.sup.th data level DL.sub.K in step S100 with the K.sup.th reference data level DLR.sub.K (S200).

(202) Specifically, when a data is determined to have a level of the K.sup.th data level DL.sub.K in step S100, the level of this data is compared with the K.sup.th reference data level DLR.sub.K to determine which one of the level of this data and the K.sup.th reference data level DLR.sub.K is greater. Here, the K.sup.th reference data level DLR.sub.K represents one of the first reference data level DLR.sub.1 through the N.sup.th reference data level DLR.sub.N, and as described above, the comparison may be performed for each natural number K satisfying 1≤K≤N.

(203) For example, when a data is determined to have a level of the first data level DL.sub.1 in step S100 (i.e. K=1), the level of this data is compared with the first reference data level DLR.sub.1 to determine which one of the level of this data and the first reference data level DLR.sub.1 is greater. Similarly, when a data is determined to have a level of the fifth data level DL.sub.5 in step S100 (i.e. K=5), the level of this data is compared with the fifth reference data level DLR.sub.5 to determine which one of the level of this data and the fifth reference data level DLR.sub.5 is greater. When a data is determined to have a level of the N.sup.th data level DL.sub.N in step S100 (i.e. K=N), the level of this data is compared with the N.sup.th reference data level DLR.sub.N to determine which one of the level of this data and the N.sup.th reference data level DLR.sub.N is greater.

(204) Thereafter, the controller 130 increases the K.sup.th reference data level DLR.sub.K when [DL.sub.K>DLR.sub.K] or decreases the K.sup.th reference data level DLR.sub.K when [DL.sub.K<DLR.sub.K] according to the comparison result obtained in step S200 to generate a K.sup.th updated reference data level DLUR.sub.K, and the K.sup.th reference data level DLR.sub.K is updated with the K.sup.th updated (replaced) reference data level DLUR.sub.K (S300).

(205) Specifically, when the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “1” (i.e. DL.sub.K>DLR.sub.K as shown in FIG. 9A), the reference data level controller 134 increases the K.sup.th reference data level DLR.sub.K by a predetermined voltage to generate the K.sup.th updated reference data level DLUR.sub.K.

(206) In addition, for example, when the data included in the signal EQ.sub.OUT is determined to have a level of the K.sup.th data level DL.sub.K by the first threshold voltage comparator 112-1 through the (N−1).sup.th threshold voltage comparator 112-(N−1), and the signal DLCP.sub.K outputted by the K.sup.th data level comparator 114-K is “0” (i.e. DL.sub.K<DLR.sub.K as shown in FIG. 9B), the reference data level controller 134 decreases the K.sup.th reference data level DLR.sub.K by a predetermined voltage to generate the K.sup.th updated reference data level DLUR.sub.K.

(207) Thereafter, the controller 130 updates at least one of (K−1).sup.th threshold voltage VTH.sub.(K−1) and K.sup.th threshold voltage VTH.sub.K with (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) and K.sup.th updated threshold voltage VUTH.sub.K by calculating at least one of the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) and the K.sup.th updated threshold voltage VUTH.sub.K from the K.sup.th updated reference data level DLUR.sub.K generated in S300 (S400).

(208) Hereinafter, step S400 will be described in detail with reference to FIG. 11.

(209) FIG. 11 is a flowchart illustrating in detail step S400 including steps S410 through S440.

(210) Referring to FIG. 11, as in the equation 4 above, the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) is calculated from the average of the (K−1).sup.th reference data level DLR.sub.(K−1) and the K.sup.th updated reference data level DLUR.sub.K (S410).

(211) Thereafter, the (K−1).sup.th threshold voltage VTH.sub.(K−1) is updated with the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) (S420).

(212) Thereafter, as in the equation 5 above, the K.sup.th updated threshold voltage VUTH.sub.K is calculated from the average of the (K+1).sup.th reference data level DLR.sub.(K+1) and the K.sup.th updated reference data level DLUR.sub.K (S430).

(213) Thereafter, the K.sup.th threshold voltage VTH.sub.K is updated with the K.sup.th updated threshold voltage VUTH.sub.K (S440).

(214) According to an embodiment of the present invention, only steps S410 and S420, only steps S430 and S440, or all of steps S410 through S440 may be performed.

(215) In one embodiment, when the first reference data level DLR.sub.1 is adjusted to generate the first updated reference data level DLUR.sub.1, only the first threshold voltage VTH.sub.1 may be updated (that is, only the steps S430 and S440 are performed), and when the N.sup.th reference data level DLR.sub.N is adjusted to generate the N.sup.th updated reference data level DLUR.sub.N, only the (N−1).sup.th threshold voltage VTH.sub.(N−1) may be updated (that is, only the steps S410 and S420 are performed). In another embodiment, when any one of the second reference data level DLR.sub.2 through the (N−1).sup.th reference data level DLR.sub.(N−1) is adjusted, only the steps S410 and S420 may be performed, only the steps S430 and S440 may be performed, or all of the steps S410 through S440 may be performed.

(216) Referring back to FIG. 10, when the received signal RS or the equalized signal EQ.sub.OUT is a differential signal, the (N−K+1).sup.th threshold voltage VTH.sub.(N−K+1) of the sampler 110 may be updated with a (N−K+1).sup.th updated threshold voltage VUTH.sub.(N−K+1) which is obtained by inverting the (K−1).sup.th updated threshold voltage VUTH.sub.(K−1) (S500).

(217) As described above, since the differential signal includes a differential pair consisting of non-inverted and inverted signals, a threshold voltage for the non-inverted signal may be inverted to obtain a threshold voltage for the inverted signal. Therefore, all of the first updated threshold voltage VUTH.sub.1 through the (N−1).sup.th updated threshold voltage VUTH.sub.(N−1) are not required to be calculated.

(218) The received signal RS or the equalized signal EQ.sub.OUT includes a plurality of data, and by repeatedly performing the steps S100 through S500 for each of the plurality of data, the threshold voltage and the reference data level may be repeatedly updated (S600).

(219) The PAM-N receiver and the threshold voltage control method according to the present invention have the following advantages.

(220) (1) Since the threshold voltages are adaptively adjusted according to the level of the data included in the received signal, threshold voltages optimized for the received signal may be obtained.

(221) (2) Since the value of the received data is determined using the threshold voltages which have been subjected to optimization, the value of the received data may be determined accurately.