SWITCH-MODE POWER SUPPLY OF A NFC TYPE READER
20200112345 ยท 2020-04-09
Inventors
Cpc classification
H02M3/158
ELECTRICITY
H02M3/33576
ELECTRICITY
H02M3/156
ELECTRICITY
Y02B70/10
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
G06K19/0725
PHYSICS
H02M1/0019
ELECTRICITY
International classification
H04B5/00
ELECTRICITY
Abstract
A reader is adapted to wirelessly exchanging information with a wireless apparatus. The reader includes a signal generator configured to generate a modulation signal. An emitter/receptor stage is configured to be driven by the modulation signal. A switched-mode power supply is configured to power the emitter/receptor stage. The switched-mode power supply includes a power switch controlled in function of the modulation signal.
Claims
1. A reader adapted to wirelessly exchanging information with a wireless apparatus, the reader comprising: a signal generator configured to generate a modulation signal; an emitter/receptor stage configured to be driven by the modulation signal; and a switched-mode power supply configured to power the emitter/receptor stage, the switched-mode power supply comprising a power switch controlled as a function of the modulation signal.
2. The reader according to claim 1, wherein the modulation signal is an on-off key modulation signal having a first state and a second state.
3. The reader according to claim 2, wherein the power switch is in an open state when the modulation signal is in the first state.
4. The reader according to claim 2, wherein the first state is an off state.
5. The reader according to claim 1, wherein the switched-mode power supply comprises an inductor coupled to the power switch and a rectifier switch coupled to the inductor and controlled as a function of the modulation signal.
6. The reader according to claim 5, wherein the modulation signal is an on-off key modulation signal having a first state and a second state and wherein the rectifier switch is in an off state when the modulation signal is in the first state.
7. The reader according to claim 6, wherein the first state is the off state.
8. The reader according to claim 1, wherein the switched-mode power supply is a DC-DC converter.
9. The reader according to claim 1, wherein the reader is a near field communication reader.
10. A switched-mode power supply comprising: an input node configured to be coupled to a power source; an inductor coupled between the input node and an intermediate node; a power switch stage coupled between the intermediate node and a reference voltage node; a rectifier switch stage coupled between the intermediate node and an output node; an output capacitor coupled between the output node and the reference voltage node; and a power switch control circuit having an output coupled to a control terminal of the power switch stage, the power switch control circuit having a first input coupled to receive a modulation signal and a second input coupled to receive a boost driver signal.
11. The switched-mode power supply according to claim 10, wherein the switched-mode power supply is a boost DC-DC converter.
12. The switched-mode power supply according to claim 10, wherein the power switch stage comprises an N-type MOSFET.
13. The switched-mode power supply according to claim 12, wherein the power switch control circuit comprises an AND gate having a first input coupled to receive the modulation signal and a second input coupled to receive the boost driver signal and an output of the AND gate being coupled to a gate of the N-type MOSFET.
14. The switched-mode power supply according to claim 10, wherein the power switch stage comprises: a first diode having an anode coupled to the reference voltage node and a cathode coupled to the intermediate node; and a power switch coupled in parallel with the first diode and having a power control input coupled to the output of the power switch control circuit.
15. The switched-mode power supply according to claim 10, wherein the boost driver signal is a pulse-width-modulated signal.
16. The switched-mode power supply according to claim 10 wherein the rectifier switch stage comprises: a second diode having an anode coupled to the intermediate node and a cathode coupled to the output node; and a rectifier switch coupled in parallel with the second diode and having a rectifier control input coupled to a rectifier switch control block.
17. The switched-mode power supply according to claim 16, wherein the rectifier switch control block comprises a first input coupled to receive a rectifier driver signal, a second input coupled to receive the modulation signal, and an output coupled to the rectifier control input of the rectifier switch.
18. A switched-mode power supply comprising: an input node configured to be coupled to a power source; a power switch stage coupled between the input node and an intermediate node; a first diode having a cathode coupled between the intermediate node and an anode coupled to a reference voltage node; an inductor coupled between the intermediate node and an output node; an output capacitor coupled between the output node and the reference voltage node; and a power switch control circuit having an output coupled to a control terminal of the power switch stage, the power switch control circuit having a first input coupled to receive a modulation signal and a second input coupled to receive a boost driver signal.
19. The switched-mode power supply according to claim 18, wherein the power switch stage comprises: a second diode having an anode coupled to the intermediate node and a cathode coupled to the input node; and a power switch coupled in parallel with the second diode and having an input coupled to the output of the power switch control circuit.
20. The switched-mode power supply according to claim 19, wherein the power switch comprises an N-type MOSFET and the power switch control circuit consists of an AND gate.
21. The switched-mode power supply according to claim 18, wherein the boost driver signal is a pulse-width-modulated signal.
22. The switched-mode power supply according to claim 18, wherein the switched-mode power supply is a buck DC-DC converter.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Other advantages and features of the invention will become apparent on examining the detailed description of wholly non-limiting modes of implementation and embodiments and the appended drawings, in which:
[0029]
DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0030] The reference 1 of the
[0031] The NFC reader 2 comprise a power source, here for example a direct current DC power source 3, a switched-mode power supply, here for example a DC-DC converter 4, coupled to the power source 3, an emitter/receptor stage 5 coupled to the switched-mode power supply 4, and a signal generator GM configured to deliver a modulation signal MS to the switched-mode power supply 4 and the emitter/receptor stage 5.
[0032] The switched-mode power supply 4 is configured to convert an input voltage Vin received from the power source 3 to an output voltage Vout to be delivered to the emitter/receptor stage 5.
[0033] The emitter/receptor stage 5 is powered by the output voltage Vout of the switched-mode power supply 4 and intended to receive the modulation signal MS from the signal generator GM.
[0034] For example, the modulation signal MS is an on-off keying, commonly known to skilled in the art under the acronym OOK, modulated signal, or in others words, a 100% amplitude shift keying, commonly known to skilled in the art under the acronym ASK, modulated signal.
[0035] We now refer to the
[0036] The switched-mode power supply 4 illustrated in this example is for example a boost DC-DC converter comprising an input pin 6 coupled to the power source 3, an inductor 7 coupled between the input pin 6 and a middle node 8, a power switch stage 9 coupled between the middle node 8 and the ground GND, a rectifier switch stage 10 coupled between the middle node 8 and an output pin 11, and an output capacitor 12 coupled between the output pin 11 and the ground GND.
[0037] The power switch stage 9 comprises a first diode 13 of which the anode 14 is coupled to the ground and the cathode 15 is coupled to the middle node 8, and a power switch 16 coupled in parallel with the first diode 13 and having a power control input PCI coupled to a power switch control block 17.
[0038] The power switch 16 can comprise an N-type MOSFET.
[0039] The power switch control block 17 comprises a first input IPS1 intended to receive a boost driver signal BDS, which is generally a pulse-width-modulated signal, commonly known to those skilled in the art under the acronym PWM signal. The power switch control block 17 also comprises a second input IPS2 intended to receive the modulation signal MS, and an output OPS coupled to the power control input PCI of the power switch 16.
[0040] The power switch control block 17 can be for example a simple AND gate if the power switch 16 is a NMOS switch.
[0041] As illustrated in the
[0042] When the modulation signal MS is in the off state, the power switch 16 is in its open state since the output OPS of the power switch control block 17 is also in the off state.
[0043] In others words, the DC-DC converter 4 has its power switch 16 in its off state and the output voltage of the DC-DC converter 4 is almost stable during a period where the modulation signal MS is in the off state, as the current IL generated by the inductor 7 is quickly decreasing to an almost null value and the load 5 of the switched-mode power supply 4 is not consuming current.
[0044] As we can observe in the
[0045] Furthermore, the power consumption of the DC-DC converter 4 is also advantageously reduced.
[0046] When the modulation signal MS is in the on state, the output of the power switch control block 17 is equal to the boost driver signal BDS.
[0047] The rectifier switch stage 10 comprises a second diode 19 of which the anode 20 is coupled to the middle node 8 and the cathode 21 is coupled to the output pin 11 and a rectifier switch 22 coupled in parallel with the second diode 19 and having a rectifier control input RCI coupled to a rectifier switch control block 23.
[0048] The rectifier switch 22 can comprise an N-type MOSFET.
[0049] The rectifier switch control block 23 comprises a first input IRS1 intended to receive a rectifier driver signal RDS, which is generally a PWM signal, a second input IRS2 intended to receive the modulation signal MS, and an output ORS coupled to the rectifier control input RCI of the rectifier switch 22.
[0050] The rectifier switch control block 23 can be for example a simple AND gate if the rectifier switch 22 is a NMOS switch.
[0051] When the modulation signal MS is in the off state, the rectifier switch 22 is in its open state since the output ORS of the rectifier switch control block 23 is also in the off state. As mentioned, the power switch 16 is also in the open state when the modulation signal MS is in the off state, which corresponds to the off state of the boost DC-DC converter.
[0052] When the modulation signal MS is in the on state, the output ORS of the rectifier switch control block 23 is equal to the rectifier driver signal RDS.
[0053] In this way, the rectifier switch 22 is directly controlled by the rectifier driver signal RDS, increasing thus the efficiency of DC-DC converter 4.
[0054] Furthermore, as we can observe in the
[0055] Alternatively, we refer to the
[0056] The switched-mode power supply 4 illustrated in this example is for example a buck DC-DC converter comprising an input pin 25 coupled to the power source 3, a power switch stage 26 coupled between the input pin 25 and a middle node 27, a first diode 28 of which the cathode is coupled between the middle node 27 and the anode is coupled the ground GND, an inductor 29 coupled between the middle node 27 and an output pin 30, and an output capacitor 31 coupled between the output pin 3o and the ground.
[0057] The power switch stage 26 comprises a second diode 35 of which the anode 36 is coupled to the middle node 27 and the cathode 37 is coupled to the input pin 25. A power switch 32 is controlled by a power switch control block 33 comprising a first input IPS1 intended to receive the driver signal BDS (PWM signal), a second input IPS2 intended to receive the modulation signal MS, and an output coupled to the power switch 32.
[0058] The power switch 32 can comprise an N-type MOSFET.
[0059] The power switch control block 33 can be for example a simple AND gate if the power switch 32 is a NMOS switch.
[0060] When the modulation signal MS is in the off state, the power switch 32 is in its open state since the output of the power switch control block 33 is also in the off state.
[0061] The current IL of the inductor 29 of the DC-DC converter in the off state is almost null and the output voltage Vout of the DC-DC converter 4 is almost stable at least during the period where the modulation signal MS is in the off state. Advantageously, the power consumption of the DC-DC converter 4 is also reduced.
[0062] When the modulation signal MS is in the on state, the output of the power switch control block 33 is equal to the boost driver signal BDS.
[0063] Furthermore, in the same way as illustrated in the
[0064] Thus, whatever the disclosed embodiment, the power regulation of the switched-mode power supply 4 is adapted to the load variation of the NFC reader 2 and the possible overshoots or undershoots during load transient are also reduced.