Programmable feed-forward regulation
10609796 ยท 2020-03-31
Assignee
Inventors
Cpc classification
H05B45/50
ELECTRICITY
H05B47/25
ELECTRICITY
H05B41/2827
ELECTRICITY
Y02B20/30
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
H05B47/24
ELECTRICITY
International classification
G05F1/00
PHYSICS
Abstract
Programmable drivers (or power supplies) for solid state light sources are disclosed, on which output regulation is improved to expand the dimming range to 1% and reduce and/or remove flicker. Additional fault conditions are set up to avoid latching, and thus provide for a controllable restart feature. Such drivers include an isolated half bridge resonant converter with an improved control approach designed to regulate very low current though primary side in a feed-forward loop. Such drivers include both digital and analog loops that improve the performance in steady state and/or during transients, particularly for a lighting load, in comparison to a single full digital control.
Claims
1. A regulation circuit comprising: a forward loop connectable to a primary side of a transformer, the forward loop sampling a load current at the primary side of a transformer as a half waveform proportional to the load current, the forward loop providing a first output connectable to a controller configured to regulate a solid state driver; and a feedback loop connectable to a secondary side of a transformer, the feedback loop providing a second output connectable to a controller configured to regulate the solid state driver; wherein the forward loop comprises: a half-bridge shunt circuit having a shunt circuit input and a shunt circuit output; a first series resistor having a first lead connected to the output of the half-bridge shunt circuit and a second lead; and a converter having an input connected to the second lead of the first series resistor and an output comprising the first output to regulate a solid state driver.
2. The regulation circuit of claim 1, wherein the half-bridge shunt comprises: a half bridge rectifier having a half-bridge rectifier input connected to the shunt bridge input, a half-bridge rectifier output connected to the shunt circuit output and a connection to ground; and a shunt resistor having a first lead connected to the shunt circuit output and a second lead connected to ground.
3. The regulation circuit of claim 2, wherein the half-bridge rectifier comprises: a first schottky diode having an anode connected to the half-bridge rectifier input, and a cathode connected to the half-bridge rectifier output; and a second schottky diode having an anode connected to ground and a cathode connected to the half-bridge rectifier input.
4. The regulation circuit of claim 1, wherein the feedback loop comprises: a Proportional Integral Derivative (PID) digital control programmable set point having a current sensing input capable of electrical communication with a first lead of a load, a voltage sensing input capable of electrical communication with a second lead of the load, a connection to an isolated ground, a user setting input, and an output; a second series resistor having a first lead connected to the output of the PID digital control programmable set point, and a second lead; an opto-coupler having a first input connected to the second lead of the second resistor, a second input connected to the isolated ground; a third input, and an output; a pull-up resistor having a first lead connected to a reference voltage, and a second lead connected to the third input of the opto-coupler; a filter having a first input connected to the output of the opto-coupler, a second input connected to ground, and an output; and a third series resistor having a first lead connected to the output of the filter and a second lead comprising the second output of the feedback loop.
5. The regulation circuit of claim 1, wherein the filter comprises: a fourth resistor having a first lead connected to the first input of the filter, and a second lead connected to the second input of the filter; a fifth resistor having a first lead connected to the first lead of the fourth resistor and a second lead connected to the output of the filter; and a first capacitor having a first lead connected to the output of the filter and a second lead connected to the second lead of the fourth resistor.
6. The regulation circuit of claim 1, further comprising a first voltage divider coupled to an anode of a third diode, the third diode having a cathode connectable to a reset input of the controller, the first voltage divider and the third diode setting a voltage for normal operation of the regulation circuit.
7. The regulation circuit of claim 6, wherein the first voltage divider comprises: a sixth resistor having a first lead connectable to a first side of the primary transformer and having a second lead; and a seventh resistor having a first lead connected to the second lead of the sixth resistor and having a second lead connected to ground.
8. The regulation circuit of claim 1, further comprising: an eighth resistor having a first lead connectable to a Direct Current (DC) bus and a second lead; a fourth diode having an anode connected to the second lead of the eighth resistor and a cathode connectable to the reset input of the controller; and a ninth resistor having a first lead connected to the cathode of the fourth diode and having a second lead connected to ground, the eighth resistor, the fourth diode, and the ninth resistor setting a voltage for a startup condition of the regulation circuit.
9. The regulation circuit of claim 1, further comprising a fault detection circuit coupled to a primary side of the transformer.
10. The regulation circuit of claim 1, wherein the fault detection circuit includes a load open fault detection circuit and a load short fault detection circuit.
11. The regulation circuit of claim 10, wherein the load open fault detection circuit comprises: a second capacitor having a first lead connectable to a first side of a primary of the transformer and a second lead; a third capacitor having a first lead connected to the second lead of the second capacitor and having a second lead connected to ground; a fifth zener diode having a cathode connected to the second lead of the second capacitor and having an anode; a sixth zener diode having a cathode connected to the anode of the fifth zener diode and having a cathode; a tenth resistor having a first lead connected to the cathode of the fifth zener diode and having a second lead connected to ground; a seventh diode having a anode connected to the first lead of the tenth resistor and having a cathode; and an eleventh resistor having a first lead connected to the cathode of the third diode and having a second lead connected to an overcurrent protection input of the controller.
12. The regulation circuit of claim 11, wherein, in a load open condition, an excessive voltage is detected by the second capacitor, the third capacitor, the fifth zener diode, the sixth zener diode as higher than normal voltage over the tenth resistor, wherein the voltage over the tenth resistor is high enough to cause the seventh diode to conduct, causing an over current status for a half-bridge shunt, that results in an instantaneous shut down of the controller.
13. The regulation circuit of claim 10, wherein the load short fault detection circuit comprises: the half-bridge shunt; and the first voltage divider.
14. The regulation circuit of claim 13, wherein during a load short fault condition the voltage at the first voltage divider drops below 0.3 volts and resets the controller.
15. The regulation circuit of claim 13, wherein a normal window for operation is less than two volts and greater than 0.3 volts, wherein the normal window voltage is greater than 2 volts in an open load condition, and wherein the normal window voltage is less than 0.3 volts in a load short condition.
16. The regulation circuit of claim 1, wherein the forward loop samples the load current at the primary side of a transformer on a cycle by cycle basis.
17. The regulation circuit of claim 1, further comprising a load connectable to the feedback loop.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The foregoing and other objects, features and advantages disclosed herein will be apparent from the following description of particular embodiments disclosed herein, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles disclosed herein.
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DETAILED DESCRIPTION
(9) The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the invention and illustrate the best mode of practicing embodiments of the invention. Upon reading the following description in light of the accompanying figures, those skilled in the art will understand the concepts of the invention and recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
(10) Referring to
(11) In some embodiments, the forward loop is connectable to a primary side of a transformer, the forward loop samples a load current at the primary side of a transformer as a half waveform proportional to the load current, and the forward loop provides a first output connectable to a controller for regulating a solid state driver.
(12) The forward loop includes a half-bridge shunt circuit having a shunt circuit input and a shunt circuit output. The forward loop also includes a first series resistor (R1) having a first lead connected to the output of the half-bridge shunt circuit and a second lead, and a converter having an input connected to the second lead of the first series resistor, and an output comprising the first output to regulate a solid state driver.
(13) The half-bridge shunt comprises a half bridge rectifier having a half-bridge rectifier input connected to the shunt bridge input, a half-bridge rectifier output connected to the shunt circuit output and a connection to ground; and a shunt resistor (Rshunt) having an first lead connected to the shunt circuit output and a second lead connected to ground
(14) The half-bridge rectifier comprises a first schottky diode (D1) having an anode connected to the half-bridge rectifier input, and a cathode connected to the half-bridge rectifier output; and a second schottky diode (D2) having an anode connected to ground and a cathode connected to the half-bridge rectifier input. This assures high speed and positive sensing of input signal for forward loop controller.
(15) The feedback loop is the combination of the opto-coupler and a digital algorithm of filtering, hysteresis adjustment and PID controller sensing the load current loop, which is adjustable according load variation, output current deviations and programmable setting.
(16) In some embodiments, the feedback loop comprises a Proportional Integral Derivative (PID) digital control programmable set point having a current sensing input capable of electrical communication with a first lead of a load, a voltage sensing input capable of electrical communication with a second lead of the load, a connection to an isolated ground, a user setting input, and an output. The feedback loop further includes a second series resistor (R2) having a first lead connected to the output of the PID digital control programmable set point, and a second lead; an Opto-coupler having a first input connected to the second lead of the second resistor, a second input connected to the isolated ground; a third input, and an output; a pull-up resistor (RPullup) having a first lead connected to a reference voltage, and a second lead connected to the third input of the opto-coupler; a filter having a first input connected to the output of the opto-coupler, a second input connected to ground, and an output; and a third series resistor (R3) having a first lead connected to the output of the filter and a second lead comprising the second output of the feedback loop.
(17) The filter comprises a fourth resistor (R4) having a first lead connected to the first input of the filter, and a second lead connected to the second input of the filter; a fifth resistor (R5) having a first lead connected to the first lead of the fourth resistor and a second lead connected to the output of the filter; and a first capacitor (C1) having a first lead connected to the output of the filter and a second lead connected to the second lead of the fourth resistor.
(18) The feedback loop can change depending on the operation of the load and over the lifetime of the load. Over time, the load can degrade and the feedback loop can be adjusted to provide a same current.
(19) By having the isolated inherent feedback, it is possible to swap the frequency along the resonance response of the tank, adjusting the load current considering load regulations and losses. The benefit of the forward loops is to reach low levels of regulations and the contribution of the feedback loop is to adjust load variations in a wider range. For the opto-coupler, the conversion is simply current to PWM signal and can be adjusted accordingly to output levels. In some embodiments, a PWM frequency of 500 Hz is used, but in some embodiments, higher frequencies (such as but not limited to 550 Hz, 600 Hz, 625 Hz, 665 Hz, and so on) are used.
(20) The circuit also includes a fault detection circuit coupled to a primary side of the transformer. The fault detection circuit includes a load open fault detection circuit and a load short fault detection circuit. The load open fault detection circuit comprises a second capacitor (C2) having a first lead connectable to a first side of a primary of the transformer and a second lead; a third capacitor (C3) having a first lead connected to the second lead of the second capacitor and having a second lead connected to ground; a fifth zener diode (D5) having a cathode connected to the second lead of the second capacitor and having an anode; a sixth zener diode (D6) having a cathode connected to the anode of the fifth zener diode and having a cathode; a tenth resistor (R10) having a first lead connected to the cathode of the fifth zener diode and having a second lead connected to ground; a seventh diode (D7) having a anode connected to the first lead of the tenth resistor and having a cathode; and an eleventh resistor (R11) having a first lead connected to the cathode of the third diode and having a second lead connected to an overcurrent protection input of the controller.
(21) In case of a load open condition, an excessive voltage is detected by the second capacitor, the third capacitor, the fifth zener diode, and the sixth zener diode as higher than normal voltage over the tenth resistor, wherein the voltage over the tenth resistor is high enough to cause the seventh diode to conduct, causing an over current status for a half-bridge shunt, that results in an instantaneous shut down of the controller.
(22) In some embodiments, the load short fault detection circuit comprises the half-bridge shunt and the first voltage divider. In the event of a load short fault condition, the voltage at the first voltage divider drops below 0.3 volts and resets the controller.
(23) The process to recover from a load open condition is through the reset input of the controller. The voltage must exit a normal window and get back to normal in a way such that switching starts normally after a shutdown timer expires. If the open load condition continues, shut down occurs again. When the open load condition goes away, the load is driven at a specified current and voltage.
(24) Regarding the restarting feature, the primary side transformer voltage is sensed by the window comparator, and normal condition is between two levels as shown in Table 1.
(25) TABLE-US-00001 TABLE 1 Condition Voltage Level Load Open >2 Set Fmax Normal load regulation window 2 Max 1.5 Typical 0.3 Min Load short <0.3 Set Fmax
(26) Once a fault condition triggers the driver to shut down, and oscillation is stopped, the sensed voltage will eventually be out of this window. By moving out the DC level, the driver is reset and the oscillation is restarted to detect the load conditions. This becomes a kind of secured burst mode while the fault condition is maintained. If the fault condition is removed, the voltage on the primary side will get back to a normal level and the start up process also begins.
(27) Shut down on short circuit is done by over current sensing of the half-bridge shunt. In case of an open load, the overvoltage protection C2, C3 divider together with D5, D6, and R10 are in charge to get the driver to shut down. Restart is detected by rise edge voltage of window comparator translated to reset input of controller, as seen in
(28) In embodiments, the target current for the load (i.e., one or more solid state light sources or any other appropriate lighting load) occurs on the secondary side, which is truly measuring the current load and in case of dimming, or fallback due to over power, over voltage, and so on, can change accordingly.
(29) The current set point information is not necessarily small as the current being set, for two reasons. First is that due to use of a microcontroller, the current setting is converted to a PWM signal, which avoids the linearity problems of the opto-coupler or any other element. Second, on the primary side, the PWM signal is converted to a DC value, which does not have to be in millivolts, it is better to use a resistor divider and additional filtering, so low level settings are not transferred like so low levels to primary, avoiding noise issues. Additionally the op-amp inside this IC has noise rejection and was specially designed to handle a few milliamps for dimming applications (e.g., 1% dimming, means less than 10 mA output).
(30) Thus, in embodiments, on the primary side, there is a control loop that is cycle by cycle sensing the current load and regulating it according to the information that comes from the secondary side as a set point target. The regulation on the primary side is done by changing the frequency accordingly. Should the primary measurement include error, this primary measurement may also have to compensate for mistakes due to the opto-coupler and the LCC resonant converter. This is especially applicable when the driver is able to handle a wide range of loads, as shown in
(31) Referring now to
(32) Referring now to
(33) In
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(35) The methods and systems described herein are not limited to a particular hardware or software configuration, and may find applicability in many computing or processing environments. The methods and systems may be implemented in hardware or software, or a combination of hardware and software. The methods and systems may be implemented in one or more computer programs, where a computer program may be understood to include one or more processor executable instructions. The computer program(s) may execute on one or more programmable processors, and may be stored on one or more storage medium readable by the processor (including volatile and non-volatile memory and/or storage elements), one or more input devices, and/or one or more output devices. The processor thus may access one or more input devices to obtain input data, and may access one or more output devices to communicate output data. The input and/or output devices may include one or more of the following: Random Access Memory (RAM), Redundant Array of Independent Disks (RAID), floppy drive, CD, DVD, magnetic disk, internal hard drive, external hard drive, memory stick, or other storage device capable of being accessed by a processor as provided herein, where such aforementioned examples are not exhaustive, and are for illustration and not limitation.
(36) The computer program(s) may be implemented using one or more high level procedural or object-oriented programming languages to communicate with a computer system; however, the program(s) may be implemented in assembly or machine language, if desired. The language may be compiled or interpreted.
(37) As provided herein, the processor(s) may thus be embedded in one or more devices that may be operated independently or together in a networked environment, where the network may include, for example, a Local Area Network (LAN), wide area network (WAN), and/or may include an intranet and/or the internet and/or another network. The network(s) may be wired or wireless or a combination thereof and may use one or more communications protocols to facilitate communications between the different processors. The processors may be configured for distributed processing and may utilize, in some embodiments, a client-server model as needed. Accordingly, the methods and systems may utilize multiple processors and/or processor devices, and the processor instructions may be divided amongst such single- or multiple-processor/devices.
(38) The device(s) or computer systems that integrate with the processor(s) may include, for example, a personal computer(s), workstation(s) (e.g., Sun, HP), personal digital assistant(s) (PDA(s)), handheld device(s) such as cellular telephone(s) or smart cellphone(s), laptop(s), handheld computer(s), or another device(s) capable of being integrated with a processor(s) that may operate as provided herein. Accordingly, the devices provided herein are not exhaustive and are provided for illustration and not limitation.
(39) References to a microprocessor and a processor, or the microprocessor and the processor, may be understood to include one or more microprocessors that may communicate in a stand-alone and/or a distributed environment(s), and may thus be configured to communicate via wired or wireless communications with other processors, where such one or more processor may be configured to operate on one or more processor-controlled devices that may be similar or different devices. Use of such microprocessor or processor terminology may thus also be understood to include a central processing unit, an arithmetic logic unit, an application-specific integrated circuit (IC), and/or a task engine, with such examples provided for illustration and not limitation.
(40) Furthermore, references to memory, unless otherwise specified, may include one or more processor-readable and accessible memory elements and/or components that may be internal to the processor-controlled device, external to the processor-controlled device, and/or may be accessed via a wired or wireless network using a variety of communications protocols, and unless otherwise specified, may be arranged to include a combination of external and internal memory devices, where such memory may be contiguous and/or partitioned based on the application. Accordingly, references to a database may be understood to include one or more memory associations, where such references may include commercially available database products (e.g., SQL, Informix, Oracle) and also proprietary databases, and may also include other structures for associating memory such as links, queues, graphs, trees, with such structures provided for illustration and not limitation.
(41) References to a network, unless provided otherwise, may include one or more intranets and/or the internet. References herein to microprocessor instructions or microprocessor-executable instructions, in accordance with the above, may be understood to include programmable hardware.
(42) Unless otherwise stated, use of the word substantially may be construed to include a precise relationship, condition, arrangement, orientation, and/or other characteristic, and deviations thereof as understood by one of ordinary skill in the art, to the extent that such deviations do not materially affect the disclosed methods and systems.
(43) Throughout the entirety of the present disclosure, use of the articles a and/or an and/or the to modify a noun may be understood to be used for convenience and to include one, or more than one, of the modified noun, unless otherwise specifically stated. The terms comprising, including and having are intended to be inclusive and mean that there may be additional elements other than the listed elements.
(44) Elements, components, modules, and/or parts thereof that are described and/or otherwise portrayed through the figures to communicate with, be associated with, and/or be based on, something else, may be understood to so communicate, be associated with, and or be based on in a direct and/or indirect manner, unless otherwise stipulated herein.
(45) Although the methods and systems have been described relative to a specific embodiment thereof, they are not so limited. Obviously many modifications and variations may become apparent in light of the above teachings. Many additional changes in the details, materials, and arrangement of parts, herein described and illustrated, may be made by those skilled in the art.