SIPM sensor chip

Abstract

A SiPM sensor chip with a plurality of pixels includes a photodiode; a quench resistor; and a current divider configured to divide the photocurrent of the photodiodes into two currents of equal size. The current divider Sq,nm or Snm lead to networks NS,h,n and NS,V,m, each of which leads to additional current dividers Sh,n and Sv m having coding resistors Rh,A,n and Rh,B,n, and Rv,c,m and Rv D m, which are linearly coded and which lead to output channels A, B, C, D, with these sensor features being integrated into the sensor chip. The networks Ns,h,n and/or NSiVlm each lead to a summation network Oh and/or Ov, in which the signals of the networks Ns,h,n and/or NS,v,m are merged via summation resistors Rs,h,n and Rs,v,m, respectively, and lead to the output channels E and/or F.

Claims

1. An SiPM sensor chip with a plurality of pixels, comprising: a photodiode; a quench resistor; and a current divider configured to divide the photocurrent of the photodiodes into two currents of equal size, wherein the plurality of pixels are arranged on a grid on which each pixel has an xy position in rows along an x direction and y direction, wherein the SiPM sensor chip has N rows in the x direction x.sub.n x.sub.1, x.sub.2, x.sub.3, . . . x.sub.N, where n==1, 2, . . . N, and M rows in the y direction y.sub.m=y.sub.1, y.sub.2, y.sub.3, . . . y.sub.M, where m=1, 2, . . . M, wherein x encodes for a horizontal direction h and y encodes for a vertical direction v, wherein the current divider S.sub.q,nm or S.sub.nm lead to networks N.sub.S,h,n and N.sub.S,v,m, each of which leads to additional current dividers S.sub.h,n and S.sub.v m having coding resistors R.sub.h,A,n and R.sub.h,B,n, and R.sub.v,c,m and R.sub.v Dm, which are linearly coded and which lead to output channels A, B, C, D, with these sensor features being integrated into the sensor chip, and wherein the networks N.sub.s,h,n and/or N.sub.SiVlm each lead to a summation network O.sub.h and/or O.sub.v, in which the signals of the networks N.sub.s,h,n and/or N.sub.S,v,m are merged via summation resistors R.sub.s,h,n and R.sub.s,v,m, respectively, and lead to the output channels E and/or F.

2. The SiPM sensor chip as set forth in claim 1, wherein the summation network O.sub.h and/or O.sub.v each contain an operational amplifier OP.sub.h or OP.sub.v that has a negative feedback via operational amplifier resistors R.sub.S,h and R.sub.S,v.

3. The SiPM sensor chip as set forth in claim 1, wherein the summation resistors R.sub.S,h,n and/or R.sub.S,v,m are integrated into the SiPM sensor chip.

4. The SiPM sensor chip as set forth in claim 3, wherein the summation networks O.sub.h and/or O.sub.v are integrated into the SiPM sensor chip.

5. The SiPM sensor chip as set forth in claim 1, wherein a pixel comprises a photodiode D.sub.nm with a current divider S.sub.q nm with two quench resistors R.sub.q,nm,h and R.sub.q,nm,v.

6. The SiPM sensor chip as set forth in claim 1, wherein a pixel comprises at least one photodiode D.sub.nm,k, each with its own quench resistors R.sub.q,nm,k, where k=1, 2, 3, . . . K, and a network NI,nm, which leads to a current divider S.sub.nm, that is composed of the resistors R.sub.nm,v and R.sub.nm,h.

7. The SiPM sensor chip as set forth in claim 1, comprising a pixel comprising a photodiode D.sub.nm with a current divider S.sub.q,nm with two quench resistors R.sub.q,nm and R.sub.q,nm,v and a pixel comprising at least one photodiode D.sub.nm,k, each with its own quench resistors R.sub.q,nm,k, where k=1, 2, 3, . . . K, and a network NI,nm, which leads to a current divider S.sub.nm that is composed of the resistors R.sub.nm,v and R.sub.nm,h.

8. The SiPM sensor chip as set forth in claim 1, wherein the coding resistor values of the coding resistors R.sub.hAn and R.sub.h,B,n, which encode the x direction and are connected to the output channels A and B, are encoded linearly so as to ascend and descend counter to one another, and the coding resistor values of the coding resistors R.sub.v,c,m and R.sub.v,D,m, which encode in the y direction and are connected to the output channels C and D, are encoded linearly so as to ascend and descend counter to one another.

9. The SiPM sensor chip as set forth in claim 1, wherein the potentials on the networks N.sub.S,h,n and/or N.sub.S,v,m are quadratically encoded.

10. SiPM sensor chips as set forth in claim 9, wherein a plurality of sensor chips are arranged on a grid to form a block ab, with the linear position coding and the quadratic coding of the potentials extending across sensors over a plurality of sensor chips in the directions a and b.

11. The SiPM sensor chip as set forth in claim 1, wherein the pixels are arranged in rows in the x direction and rows in the y direction, with the rows x and y being inclined in relation to one another at an angle of <90, resulting in a diamond pattern.

12. The SiPM sensor chip as set forth in claim 1, wherein the sensor chip has a plurality of J blocks, with blocks j=1 . . . J, each of which is embodied as set forth in any one of claims 1 to 11, and the sensor chip has its own output channels Aj, Bj, Cj, and Dj, as well as Ej and/or Fj, for each block j.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will be described in even greater detail below based on the exemplary figures. The invention is not limited to the exemplary embodiments. All features described and/or illustrated herein can be used alone or combined in different combinations in embodiments of the invention. The features and advantages of various embodiments of the present invention will become apparent by reading the following detailed description with reference to the attached drawings which illustrate the following:

(2) FIG. 1 depicts a sensor chip according to an embodiment of the invention;

(3) FIG. 2 depicts a pixel of a sensor according to an embodiment of the invention;

(4) FIG. 3 depicts a representation of the light distribution as a function of the depth of interaction in a monocrystal;

(5) FIG. 4 depicts output signals of position-coded channels;

(6) FIG. 5 depicts an output voltage of a summation network; and

(7) FIG. 6 depicts an output signal of a summation network as a function of the depth of interaction.

DETAILED DESCRIPTION

(8) Embodiments of the invention provide sensor chips that overcome certain drawbacks of the prior art and with which the parallax error in the determination of an LOR can be reduced. Such sensor chips enable the use of scintillation monocrystals for the detection of signals in positron-emission topography, with it being possible for the DOI problem to be avoided by reducing the parallax error during the determination of the LOR.

(9) Embodiments of the invention improve the sensitivity and the resolution of the sensor chip. Moreover, sensor chips according to embodiments of the invention are suitable for operation together with an MRT, particularly with strong magnetic fields. The accuracy of small-sized PET rings and/or in PET rings that lie closely against the object of study is to be improved. The space requirement of the electronics associated with the measuring arrangement can be reduced. The costs of the device can also be reduced. Sensor chips according to embodiments of the invention are not limited in their applicability to the use in PET; instead, it is possible for them to be used generally for scintillation monocrystals.

(10) With a sensor chip according to an embodiment of the invention, it is possible to reduce parallax errors in the determination of LORs, particularly in scintillation monocrystals. The sensitivity and the resolution of the measuring method and the device are improved. The use of scintillation monocrystals that are longer in the z direction is to be made possible. The detector can be operated together with an MRT device. Particularly in small devices, or if the PET ring lies closely against the object of study, the parallax error is reduced. Space is saved for the associated electronics, thus reducing costs. The sensor chip according to the embodiment of the invention achieves a very high level of detail accuracy. After all, the number of scans of the light distribution function is thus increased significantly, since scanning is even possible at the microcell level. As a result, the graininess increases by a factor of up to 160 or greater compared to conventional SiPMs, photomultipliers, and avalanche diodes, with the factor being dependent on the methods of implementation (to be described later on). This results in a more accurate determination of the second-order moment.

(11) According to an embodiment of the invention, a detector concept for PET measurements is made available in which each individual detector has a scintillation monocrystal and at least one sensor chip that is positioned on one side of the scintillation crystal. Preferably, the sensor chip is mounted on the xy plane of the scintillation monocrystal, especially preferably on the side of the scintillation monocrystal that faces away from the center of the detector ring. In another embodiment, the sensor chip can be mounted on a side of the scintillation monocrystal that is not located on the xy plane, such as on the xz or yz plane, for example. However, this has the disadvantage that, for sensor chips that are mounted on the xz or yz plane, losses of scanner sensitivity are incurred. If the sensor is on the side facing toward the center, additional Compton effects occur.

(12) It is also possible for a plurality of scintillation monocrystals to be coupled with a sensor chip.

(13) The use of the scintillation monocrystal offers the advantage that the sensitivity of the monocrystal can be maximized compared to pixelated scintillation crystals. In the case of pixelated scintillation crystals, the efficiency of the scintillation monocrystals is substantially reduced, for example to only 71% or 59% at 0.8 mm0.8 mm or 0.5 mm0.5 mm crystal pixel size of a pixelated crystal array.

(14) Without constituting a limitation, the scintillation monocrystal can be composed of LSO, LYSO, BGO, GSO, BaF.sub.2, or NaI:TI (thallium-doped sodium iodide). The materials are known to those skilled in the art.

(15) The ratio of the z component of the scintillation monocrystal to the extension thereof in the x direction of less than or equal to 1 yields good results with a square cross section for xy. The best results are obtained with a ratio of 0.25. Optionally, the ratio can also be smaller. The length of the scintillation monocrystal that is achieved in this way is determined rather by practical circumstances, such as by the diameter of the PET ring or the costs associated with large monocrystals. The dimensioning of the scintillation monocrystal in the z direction depends on the desired sensitivity that is to be achieved. The achieving of the large extension of the scintillation monocrystal in the z direction is a result of the inventive configuration of the sensor chip described in the following, which enables dimensioning that is such that DOI errors are minimized.

(16) According to an embodiment of the invention, the sensor chip is an SiPM and is composed of SiPM microcells.

(17) A sensor chip or a plurality of small sensor chips can be mounted on a scintillation monocrystal that are placed together to form a larger sensor chip.

(18) These can be glued to the scintillation monocrystal. In the event that a plurality of small sensor chips are grouped together, these are regarded as a single sensor chip in terms of the invention if they are mounted on only one side of the scintillation monocrystal. The adhesive used for this purpose should be translucent. Moreover, a layer of a light diffuser can be located between the scintillation monocrystal and the sensor chip if the light intensity is excessively bundled.

(19) An arrangement is also possible in which more than one sensor chip is mounted on the monocrystal. For example, there can be a stack along the z axis in which sensor chips and scintillation monocrystals alternate. This is expedient particularly if scintillation monocrystals are used in which the light distribution cannot be distinguished so starkly in certain crystal regions and a subdivision of the scintillation monocrystal into a plurality of layers, each with one sensor, is sensible.

(20) In another embodiment, sensor chips can also be mounted on the sides of the scintillation monocrystal that do not lie on the xy plane of the scintillation monocrystal. One, two, or morefor example, 3sensor chips can be mounted on different sides. Sensor chips can be mounted on two opposing sides of the scintillation monocrystal or on adjoining sides of the scintillation monocrystal that lie in the xz or yz direction. Any subcombination is conceivable. The variant in which sensor chips are mounted on opposing sides has the advantage that the accuracy is enhanced when a measurement signal is received. However, the inventive embodiment of the method and of the device engenders precisely the advantage that the signals only need to be read out on one side of the scintillation monocrystal. This corresponds to an embodiment with a single sensor chip. The method and device according to the invention are thus also rendered cost-effective.

(21) According to an embodiment of the invention, the sensor chip is composed of a plurality of pixels that are characterized in that a specific xy position is associated with each pixel. A pixel is composed of at least one photodiode, quench resistors, and a current divider that divides the photocurrent generated by the diodes into two equal parts.

(22) Instead of a quench resistor, the quenching process can also be initiated by active quenching using methods known to those skilled in the art, such as through the use of a transistor, for example. In the following description, a quench resistor Rq is disclosed in the disclosed embodiments. However, it is also possible in all embodiments to use a different, equivalent means for quenchinga transistor, for example , so that the disclosure is not limited to the use of a quench resistor.

(23) The pixels are arranged on a grid in which the pixels are arranged in rows in the x direction and in the y direction. The pixels in rows and columns are preferably arranged so as to be parallel to the x axis and they axis. Typically, 10, 100, or 1000 pixels are arranged in the x direction and the y direction, respectively. The arrangement then contains N rows in the x direction x.sub.n=x.sub.1 x.sub.2, x.sub.3 . . . x.sub.N, where n=1, 2, . . . N and M rows in the y direction y.sub.m=y.sub.1, y.sub.2, y.sub.3 . . . y.sub.M, where m=1, 2, . . . M. The directions x and y are preferably arranged so as to be orthogonal to one another, but they can also be arranged at an angle that is different from 90, resulting in a diamond pattern.

(24) This arrangement forms a block. A sensor chip can have a plurality of blocks that are arranged on a grid.

(25) In an embodiment, a pixel consists of a single SiPM microcell that is composed of a photodiode with 2 quench resistors that form a current divider together. The term SiPM microcell is referred to hereinafter as a microcell.

(26) This arrangement results in a very high level of detail accuracy. Through the arrangement of 100100 or 10001000 in a single SiPM, the second-order moment is determined during the integration into the microcell array from 100 or 200 and 1000 to 2000 scanning points of the light distribution. Typical PS-PMTs or arrays of SiPMs have a level of detail accuracy of 10 to 20 in each spatial direction. With the novel sensor chip, the number of scans of the light distribution function is increased by a factor of 5 or more in comparison to non-chip-implemented SiPMs or photomultipliers or avalanche diodes, which results in improved determination of the second-order moment with the sensor chips according to the invention, since each microcell has an individual position coding and yields a signal that is supplied for analysis.

(27) The position of a microcell on this grid is then characterized by x.sub.ny.sub.m on the xy plane, since every pixel contains only one microcell.

(28) In each one of these positions is located a microcell consisting of the photodiode D.sub.nm, which has an output network N.sub.D,n m, downstream of which a current divider S.sub.q,nm is connected that has two quench resistors R.sub.q,nm,h and R.sub.q,nm,v in which the index v designates the y direction and the index h designates the x direction, and with the photodiode being connected to a supply voltage V.sub.ref. The quench resistors are of equal size and are in a range from 1 megaohm to 100 megaohm. The reference voltage V.sub.ref can lie between 20 V and 40 V, depending on the manufacturing technology. In the terms D.sub.nm, R.sub.q,nm,h, or R.sub.q,nm,v, n indicates the position of the photodiodes and the quench resistors along the x axis and m the position along the y axis. N.sub.D,nm denotes the lines connecting the photodiode to the current divider S.sub.q nm, which is arranged downstream from the photodiode.

(29) The networks N.sub.s,v,m and N.sub.s,h,n connected to the quench resistors R.sub.q,nm,h, and R.sub.q,nm,v, in which networks N.sub.s,v,m and N.sub.s,h,n the index v denotes the y direction and the index h, in turn, denotes the x direction, lead to additional current dividers S.sub.h n and S.sub.v,m, which have the coding resistors R.sub.h,A,n and R.sub.h,B,n, and R.sub.v,C,m and R.sub.v D m, respectively, which lead to the output channels A, B, C, and D. According to the continuous coordinates x.sub.ny.sub.m for a row in the x direction and a row in the y direction, the coding resistors R.sub.h,A,n and R.sub.h,B,n, and R.sub.v,C,m and R.sub.v,D,m have different coding resistor values for a respective coordinate xy that enable position encoding with respect to the xy coordinates for a respective row x or a row y. For example, the coding resistors R.sub.h,A,n and R.sub.h,B,n, and R.sub.v,C,m and R.sub.v,D,m can thus assume continuous values within an x row with progressive positions x.sub.ny.sub.1, x.sub.ny.sub.2, x.sub.ny.sub.3 . . . x.sub.ny.sub.M, and within a y row with progressive positions x.sub.1y.sub.m, x.sub.2y.sub.m . . . x.sub.ny.sub.m for the junctions to the output channels A and B, and C and D, which makes position coding possible. The coding resistors have resistance values that are usually in the range between 10 and 1 k. The exact position of the detected light is given by the active microcell. The active microcells with the coordinates xy can be determined using the formula (AB)/(A+B) and (CB)/(C+B). The principle is known as Anger logic.

(30) For the position coding, the coding resistor values are encoded linearly, with the coding resistors that encode the x direction being connected to the output channel A and B, changing inversely to one another linearly in an ascending and descending manner. This means that channel A can be encoded so as to increase linearly and channel B so as to decrease linearly, or vice versa. The same applies to the y direction, which is encoded with channel C and D. As a result, the generated photocurrent of each microcell is apportioned individually to the readout channels as a function of the position.

(31) The coding resistor values R.sub.h,A,1 and R.sub.h,B,n, R.sub.h,A,2 and R.sub.h,B,n-1, R.sub.h,A,3 and R.sub.h,B,2 . . . R.sub.h,A,n and R.sub.h,B,1, as well as R.sub.v,C,1 and R.sub.v,D,n, R.sub.v,C,2 and R.sub.v,D,n-1, R.sub.v,C,3 and R.sub.v,D,n-2 . . . R.sub.v,C,n and R.sub.v,D,1 determine not only the photocurrent distribution, which is important for the position coding, but, at the same time, they are selected according to the invention such that the voltage that is required for the summation network described below is set that is required for the calculation of the depth information for the position of the scintillation. The coding resistors are to be implemented as precisely as possible in the chip in order to achieve maximally precise linear coding.

(32) In an embodiment, a pixel is composed of at least one photodiode D.sub.nm,k, each with its own quench resistor R.sub.q,nm,k, where k=1, 2, 3, . . . K, and a current divider S.sub.nm consisting of the resistors R.sub.nmv and R.sub.nm,h. The resistors R.sub.nm,v and R.sub.nm,h are of equal size and lie in the range from 1 k to 100 k. Typically, K lies in the range from 1 to 100. In this embodiment, a microcell is composed of a photodiode D.sub.nm,k with its own respective quench resistor R.sub.q,nm,k. The quench resistors R.sub.q,nm,k are all of equal size and lie in the range from 1 megaohm to 100 megaohm. The generated photocurrent of the photodiodes D.sub.nm,k is merged via the quench resistors R.sub.q,nm,k and the network N.sub.I,nm. The total generated photocurrent of the cluster of microcells created in this way, each consisting of the photodiodes D.sub.nm,k and the quench resistors R.sub.q,nm,k, is fed to a common current divider S.sub.nm. The current divider S.sub.nm divides the total current into equal shares for x and y encoding, which, as described above, leads via additional current dividers S.sub.h,n and S.sub.v,m, respectively, to the output channels A and B, and C and D.

(33) For example, 10 microcells can be grouped together in this cluster in each direction x and y. This value shall not be understood as being limitative; rather, 20, 50, or 100 microcells can also be grouped together, depending on what the process technology permits. Signals can thus be forwarded from at least two microcells from an x direction or a y direction as a single, merged signal. This embodiment has the advantage that a strong photocurrent per pixel can be obtained. However, the first embodiment is preferred in order to obtain maximum resolution and/or graininess. Both embodiments for the pixels can be implemented in a sensor chip.

(34) For each row x and/or y of pixels of the two embodiments, the potentials on the networks N.sub.s,h,1, N.sub.s,h,2 . . . N.sub.s,h,N and N.sub.s,v,1, N.sub.s,v,2 . . . N.sub.S,V,M are tapped via the summation resistors R.sub.S,h,n and R.sub.S,v,m, respectively, and fed to a summation network with the output channels E and F. At the same time, embodiments are possible in which either the networks N.sub.S,h,1, N.sub.S,h,2, . . . N.sub.S,h,N for the x direction or the networks N.sub.S,v,1, N.sub.S,v,2, . . . N.sub.S,V,M for the y direction are connected to a summation network O.sub.h or O.sub.v or, preferably, the networks N.sub.S,h,n, for the x direction and N.sub.S,v,m, for the y direction are connected in summation networks O.sub.h or O.sub.v to the output channels E and F. The resistance values for the summation resistors R.sub.S,h,n and R.sub.S,v,m are each of equal size in a summation network Oh and Ov, respectively. The summation resistance values can lie between 1 k and 100 k. The summation resistors R.sub.S,h,n and R.sub.S,v,m must be great enough that the generated photocurrent is not substantially influenced by the SiPM diodes but small enough in order to not influence the quenching behavior of the microcells. The summation resistors R.sub.S,h,n and R.sub.S,v,m are merged via the network N.sub.Sh and N.sub.S,v, respectively. The signals are thus added together.

(35) The summation networks O.sub.h and/or O.sub.v can contain an operational amplifier OP.sub.h or OP that is grounded and has a negative feedback with a resistor R.sub.S,h or R.sub.S,v. The amplification of the signal of the output channels E and F can be adjusted via the ratio of R.sub.S,h/R.sub.S,h,n or R.sub.S,v/R.sub.S,v,m. The summation networks O.sub.h and/or O.sub.v can be integrated into the sensor chip, or respective portions thereof can be less preferably located outside of the sensor chip.

(36) If the entire summation network O.sub.h and/or O.sub.v is located outside of the sensor chip, then this has the consequence that all networks N.sub.S,h,n and/or N.sub.Sv,m are led out of the sensor chip, which results in a very large number of output channels. If the summation resistors R.sub.Sh,n and/or R.sub.S,v,m are integrated into the sensor chip, only the networks N.sub.S,h and/or N.sub.S,v have to be led out of the sensor chip, which can be achieved with one output channel.

(37) For reasons that involve saving space and reducing noise influences, however, it is preferred for the complete summation network O.sub.h and/or O.sub.v to be integrated into the chip.

(38) The potentials on the networks N.sub.S,h,n and N.sub.S,v,m should each be distributed quadratically as precisely as possible. This is necessary in order to obtain the second-order moment. It is possible in this regard to enable quadratic voltage coding of the networks using voltage dividers and additional resistors without these additional resistors altering the photocurrent distribution. In order to achieve maximally space-saving chip integration, it is recommended that no additional resistors be used, but rather that the coding resistors also be selected for the voltage adjustment. Together with the coding resistors R.sub.h,A,1 and R.sub.h,B,1 . . . R.sub.h,A,N and R.sub.h,B,N or R.sub.v,C,1 and R.sub.VD,1 . . . R.sub.V,C,m and R.sub.V,D,M, the resistors of the current divider S.sub.q nm in the first embodiment and S.sub.nm in the second embodiment form a voltage divider. Since the coding resistors R.sub.h,A,n and R.sub.h,B,n, and R.sub.v,c,m and R.sub.v,D,m, respectively, constitute a current divider, the total resistance of a current divider is calculated according to the formula (R.sub.h,A,n*R.sub.h,B,n)/(R.sub.h,A,n+R.sub.h,B,n) and (R.sub.v,C,m*R.sub.v,D,m)/(R.sub.v,c,m+R.sub.v,D,m), respectively. If the coding resistors, which are usually in the range from 10 to 1 k, are selected so as to ascend and descend in linear opposition for output channel A and B, and C and D, a quadratic total resistance value of the current divider S.sub.h,n and S.sub.v m, respectively, and hence the required quadratic potential distribution on the networks N.sub.S,v,m and/or N.sub.S,h,n, is automatically reached. At the same time, the linear coding for the photocurrent is given. It is important in this regard that the coding resistors of the two respective readout channels ascend and descend linearly and the maximum and minimum valuesthat is, the initial and final values of the linear progression in each directionare selected so as to be equal. Expressed mathematically, the following must hold: R.sub.h,A,n=R.sub.min+(n1)*R.sub.stepi R.sub.h,B,nR.sub.max(n1)*R.sub.stepi, R.sub.h,A,NR.sub.max and R.sub.h,B,NR.sub.min, and R.sub.v,C,m=R.sub.min+(m1)*R.sub.stepi R.sub.v,D,mR.sub.max (m_1)*R.sub.stepi R.sub.v,C,M R.sub.max and R.sub.V.D.M=R.sub.min.

(39) The potentials (N.sub.S,h,n) and (N.sub.S,v,m) on the networks N.sub.S,h,n and N.sub.S,v,m, respectively, can also deviate from an exactly quadratic coding as a result of corresponding additional resistors or of modified coding resistors. For the resulting potential coding, (.sup.2n).sup.k must apply, where n=1, 2, 3 . . . and 0.5<k<1.5.

(40) According to embodiments of the invention, described functions are integrated at least partially but preferably completely into the sensor chip. Semiconductor process techniques that are known to those skilled in the art, such as the C-MOS process or special SiPM manufacturing methods like RGB-SiPM, RSB-HD-SiPM, or NUV-SiPM, for example, can be used for this purpose. In particular, the integration of the summation network O.sub.v and O.sub.h, respectively, into the sensor chip offers the advantage that, in addition to the space savings, signal interference is minimized and the signal-to-noise ratio is optimized.

(41) The sensor chips according to embodiments of the invention can be arranged to form a block ab on a grid. The linear position codings and quadratic coding of the potentials extend across sensors over a plurality of sensor chips in the directions a and b.

(42) Likewise, it is possible to subdivide a single sensor chip into J blocks of any xy size, where j=here, the position coding, potential coding, and the summation network each extend over only one single block of the sensor chip. A block is constructed in exactly the same manner as a sensor chip, which is illustrated in FIG. 1. In the embodiment with J blocks, the sensor chip contains output channels A.sub.j, B.sub.j, C.sub.j, and D.sub.j, as well as E.sub.j and/or F.sub.j, for each block j. This embodiment has the advantage that a plurality of blocks can be integrated into a sensor chip without non-photosensitive interspaces occurring between the blocks.

(43) FIG. 1 shows the components of a sensor chip according to an embodiment of the invention. Photodiodes D.sub.11 . . . D.sub.1M, D.sub.21 . . . D.sub.2M . . . D.sub.N1 . . . D.sub.NM are shown which are connected to a reference voltage V.sub.ref. Branching off from the photodiodes D.sub.11 . . . D.sub.1M, D.sub.21 . . . D.sub.2M . . . D.sub.N1 . . . D.sub.NM via output networks N.sub.D,nm are current dividers S.sub.q nm with quench resistors R.sub.q,11,h and R.sub.q,11,v . . . R.sub.q,1M,h and R.sub.q,1Mv1 R.sub.q,21,h and R.sub.q,21,h R.sub.q,21,h and R.sub.q,21,v . . . R.sub.q,2M,h and R.sub.q,2M,v R.sub.q,N1,h and R.sub.q,N1,v that are connected via the networks N.sub.S,h,1 . . . N.sub.S,h,N and N.sub.S,v,1 . . . N.sub.S,V,M to additional current dividers S.sub.h,nm and S.sub.v,nm with the coding resistors R.sub.h A1 and R.sub.h,B,1 . . . R.sub.h,A,N and R.sub.h,B,N, which lead to the output channels A and B, and current dividers R.sub.v,c,i and R.sub.V,D,I . . . R.sub.V.C.M and R.sub.V,D.M, which lead to the output channels C and D. The networks N.sub.S,h,1 . . . N.sub.S,h,N and N.sub.S,v,1 . . . N.sub.S,V,M are connected at summation resistors R.sub.S,h,1 . . . R.sub.S,h,N and R.sub.S.v.1 . . . R.sub.S,V,M, respectively, to one or two grounded operational amplifiers OP.sub.h and OP.sub.v, which have output channels E and F. The operational amplifiers OP.sub.h and OP are coupled with negative feedback via operational amplifier resistors R.sub.S,h and R.sub.S,v. FIG. 1 also shows that additional photodiodes and current dividers, which are indicated by dots, are arranged with quench resistors on a grid on the sensor chip and led through on additional networks N.sub.S,h,2 and N.sub.S,v,2, N.sub.S,h,3 and N.sub.S,v,3, etc., to the summation networks O.sub.h and O.sub.v.

(44) The quench resistors R.sub.q,nm,h and R.sub.q,nm,v, together with the coding resistors R.sub.h,A,1 and R.sub.h,B,1 . . . . R.sub.h,A,N and R.sub.h,B,N, and R.sub.v,c,1 . . . and R.sub.v,C,M . . . R.sub.v,C,M and R.sub.v,D,M, form a voltage divider, so that, through appropriate selection of the resistors, a quadratically coded potential is achieved on the networks N.sub.S,h,1 . . . N.sub.S,h,N and N.sub.S,v,M . . . N.sub.S,v,M.

(45) FIG. 2 shows a pixel of a sensor chip of a second embodiment. The photodiodes belonging to a pixel have the designation D.sub.nm,1 . . . , D.sub.nm,K. Networks N.sub.D,nm,1 . . . . , N.sub.D,nmK are connected to these photodiodes D.sub.nm,1 . . . . D.sub.nm,K that lead to the respective associated quench resistors R.sub.q,nm,1. R.sub.q,nm,K. A network N.sub.1nm leads away from the quench resistors R.sub.q,nm,1 . . . , R.sub.q,nm,K that leads to a current divider S.sub.nm. In all abbreviations, the index K refers to the number of microcells that are fed to a current divider S.sub.nm. The current divider S.sub.nm contains the resistors R.sub.nm,v and R.sub.nm h that lead to the networks N.sub.S,v,m and N.sub.S,h,n (not shown in the drawing).

(46) FIG. 3 shows the distribution of the photons of a scintillation process for an x axis standing for any axis due to the rotationally symmetrical distribution in the monocrystal, in which the abscissa describes the light distribution around the position zero [mm]. The ordinate refers to the number of photons as an absolute number.

(47) The curves denoted by the symbols dot, square, diamond, upward-pointing triangle, and downward-pointing triangle represent the light distribution as a function of the depth of penetration of the y quantum into the scintillation crystal.

(48) The symbols correspond to the following depths of penetration of the .sup.+.sup. annihilation radiation into the scintillation monocrystal:

(49) TABLE-US-00001 Point: 9 mm Square: 7 mm Diamond: 5 mm Upwardly pointing triangle: 3 mm Downwardly pointing triangle: 1 mm

(50) FIG. 4 shows the output signals of the position-coded channels, representatively shown as channels A and B. The abscissa shows the time in seconds. The ordinate shows the output current of A and B in [A]. In the time sequence from 0 to 10 ps, photodiodes of an x position are each active for 50 ns. After activation of a microcell comes a pause of 50 ns, upon which the next microcell in the x direction is activated. The figure shows the distribution of the photocurrent of a microcell over channels A and B. Since the ratio is different for every x position, the position of every single microcell can be determined by means of the two output channels.

(51) FIG. 5 shows the output voltage at the operational amplifier of channels E and F. The abscissa shows the time in seconds. The ordinate shows the output voltage of channels E and F in [V]. In the time sequence from 0 to 10 ps, photodiodes of an x and y position, respectively, are each active for 50 ns. After activation of a microcell comes a pause of 50 ns, upon which the next microcell in the x or y direction is activated. The figure shows the quadratic distribution of the voltage as a function of the x and y position of a microcell via channels E and F. An amplification factor of one is set for the summation amplifier by means of the corresponding resistors.

(52) FIG. 6 shows the output signal of the summation network as a function of the depth of interaction at the xy center of the scintillation monocrystal. The abscissa shows the depth of interaction in [mm]. The ordinate shows the output signal of the summation network in an arbitrary unit. The depth of interaction at the xy center of the crystal can be determined with the aid of the network signal, since the first moment is equal to zero, so the depth of interaction can be determined exclusively by means of the second moment.

(53) While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. It will be understood that changes and modifications may be made by those of ordinary skill within the scope of the following claims. In particular, the present invention covers further embodiments with any combination of features from different embodiments described above and below.

(54) The terms used in the claims should be construed to have the broadest reasonable interpretation consistent with the foregoing description. For example, the use of the article a or the in introducing an element should not be interpreted as being exclusive of a plurality of elements. Likewise, the recitation of or should be interpreted as being inclusive, such that the recitation of A or B is not exclusive of A and B, unless it is clear from the context or the foregoing description that only one of A and B is intended. Further, the recitation of at least one of A, B and C should be interpreted as one or more of a group of elements consisting of A, B and C, and should not be interpreted as requiring at least one of each of the listed elements A, B and C, regardless of whether A, B and C are related as categories or otherwise. Moreover, the recitation of A, B and/or C or at least one of A, B or C should be interpreted as including any singular entity from the listed elements, e.g., A, any subset from the listed elements, e.g., A and B, or the entire list of elements A, B and C.

CITED PRIOR ART

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