Synchronization method of an active load modulation clock within a transponder

Abstract

A method of wireless communication includes transmitting frames from a transponder to a reader and synchronizing between a reader carrier frequency and an active load modulation (ALM) carrier frequency within each transmitted frame. Each transmitted frame includes ALM carrier bursts generated from subcarrier modulation by binary phase shift keying (BPSK) data encoding and producing signal oscillations at a transponder antenna after each ALM carrier burst generation, The synchronizing occurs at each phase change of the data encoding when no burst is generated during a half period of the subcarrier preceding the phase change and a half period of the subcarrier following this phase change. The transponder antenna has a moderate quality factor sufficient to naturally damp the signal oscillations so that the synchronizing is performed without performing any controlled signal oscillations damping.

Claims

1. A method, comprising: generating a data modulating signal comprising a first plurality of subcarrier periods and a second plurality of subcarrier periods in sequence to the first plurality of subcarrier periods, the first plurality of subcarrier periods being indicative of a first binary value, the second plurality of subcarrier periods being indicative of a second binary value different from the first binary value, the first plurality of subcarrier periods ending at an instant of time and the second plurality of subcarrier periods beginning at the instant of time; generating active load modulation (ALM) carrier bursts during active durations of the first plurality of subcarrier periods and during active durations of the second plurality of subcarrier periods, each ALM carrier burst having an ALM carrier frequency, wherein consecutive ALM carrier bursts are separated by inactive durations, wherein generation of the ALM carrier bursts produces signal oscillations at a transponder antenna after generation of each ALM carrier burst, and wherein a half period of the subcarrier period preceding the instant of time and the half period of the subcarrier period following the instant of time are inactive durations; and synchronizing between a reader carrier frequency and the ALM carrier frequency, wherein the synchronizing commences at the instant of time, and wherein the transponder antenna has a moderate quality factor sufficient to naturally damp the signal oscillations so that the synchronizing is performed without performing any controlled signal oscillations damping.

2. The method according to claim 1, wherein the transponder antenna has a quality factor smaller than or equal to 8.

3. The method according to claim 2, wherein the transponder antenna has a quality factor greater than or equal to 4.

4. The method according to claim 1, wherein the transponder antenna has a quality factor greater than or equal to 4.

5. The method according to claim 1, wherein the first plurality of subcarrier periods and the second plurality of subcarrier periods belong to a single frame.

6. The method according to claim 5, wherein the single frame is preceded in time by a start of frame indicator comprising a plurality of bits.

7. The method according to claim 1, wherein the ALM carrier frequency is 13.56 MHz, and wherein a frequency of the first plurality of subcarrier periods is 847.5 kHz.

8. A transponder, comprising: an antenna; an encoder configured to generate a data modulating signal comprising a first plurality of subcarrier periods and a second plurality of subcarrier periods in sequence to the first plurality of subcarrier periods, the first plurality of subcarrier periods being indicative of a first binary value, the second plurality of subcarrier periods being indicative of a second binary value different from the first binary value, the first plurality of subcarrier periods ending at an instant of time and the second plurality of subcarrier periods beginning at the instant of time; a modulator configured to receive the data modulating signal and to generate active load modulation (ALM) carrier bursts during active durations of the first plurality of subcarrier periods and during active durations of the second plurality of subcarrier periods, each ALM carrier burst having an ALM carrier frequency, wherein consecutive ALM carrier bursts are separated by inactive durations, wherein generation of the ALM carrier bursts produces signal oscillations at the antenna after each ALM carrier burst, and wherein a half period of the subcarrier period preceding the instant of time and the half period of the subcarrier period following the instant of time are inactive durations; and a synchronization circuit configured to synchronize between a reader carrier frequency and the ALM carrier frequency, wherein synchronization commences at the instant of time, and wherein the antenna has a moderate quality factor sufficient to naturally damp the signal oscillations so that synchronization is performed without performing any controlled signal oscillations damping.

9. The transponder according to claim 8, wherein the synchronization circuit comprises a digital phase locked loop configured to generate the ALM carrier bursts and provide the ALM carrier bursts to the modulator.

10. The transponder according to claim 9, wherein the digital phase locked loop is configured to operate in a hold mode in which a feedback loop of the digital phase locked loop is opened between each synchronization performed by the synchronization circuit and to operate in a lock mode in which the feedback loop of the digital phase locked loop is closed for performing each synchronization performed by the synchronization circuit.

11. The transponder according to claim 10, wherein the digital phase locked loop comprises a digitally controlled oscillator and a controller configured to put the digital phase locked loop in the hold mode or the lock mode.

12. The transponder according to claim 8, wherein the first plurality of subcarrier periods and the second plurality of subcarrier periods belong to a single frame.

13. The transponder according to claim 12, wherein the single frame is preceded in time by a start of frame indicator comprising a plurality of bits.

14. The transponder according to claim 8, wherein the antenna has a quality factor smaller than or equal to 8.

15. The transponder according to claim 14, wherein the antenna has a quality factor greater than or equal to 4.

16. The transponder according to claim 8, wherein the ALM carrier frequency is 13.56 MHz, and wherein a frequency of the first plurality of subcarrier periods is 847.5 kHz.

17. The transponder according to claim 8, wherein the inactive durations are devoid of a signal.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other advantages and features of the invention will appear in the detailed description below and in the appended drawings which are not limitative, in which:

(2) FIGS. 1-7 illustrate particular embodiments of the invention.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

(3) On FIG. 1, reference TG designates a transponder or tag configured to wireless communicate towards a reader RD reading active load modulation ALM according for example to ISO/IEC 14443 type B protocol. In this context, something that is in compliance with a standard is compliant with a version of the standard that was in existence at the effective filing date of this patent.

(4) The transponder TG comprises a transmitter configured to transmit frames including ALM carrier bursts to the reader RD through an antenna ANT having a moderate quality factor, more precisely a quality factor smaller than or equal to 8.

(5) The antenna comprises an inductive element L as well as one or several capacitors C.

(6) The transponder comprises a demodulation circuit 10 coupled to a decoding circuit 12 for receiving data from the reader RD through antenna ANT.

(7) The decoding circuit 12 provides data to a processing unit 13, for example, a processor, which provides also data to be sent to the reader.

(8) The data may be, for example, application data of a NFC (Near Field Communication) application such as transaction such as a payment.

(9) A circuit 11 extracts a clock signal CKL having a frequency equal to the reader carrier frequency, which is for example equal to 13.56 MHz in ISO/IEC 14443.

(10) The transmitter comprises an encoder 14 configured to perform here a Binary Phase Shift Keying (BPSK) data encoding.

(11) The encoder provides to a modulator 17 (belonging to the transmitter) a data modulating signal SD using a subcarrier (here a 847.5 KHz subcarrier).

(12) As illustrated in FIG. 2, one bit period of a bit b to be transmitted contains 8 subcarrier periods T1.

(13) The logical value of the bit b depends on the state high or low of the beginning of the bit period. For example, a bit period beginning with a high state and finishing with a low state may be considered as being a logical 1 whereas a bit period beginning with a low state and finishing with a high state may be considered as being a logical 0. Of course, this convention could be inverted.

(14) FIG. 3 illustrates an example of a series of bits 1, 0, 1, 0 contained in a data signal SD.

(15) Data communication between the card and reader is performed using an LSB-first data format. Each byte BY of data is transmitted with a 0 start bit and a 1 stop bit as shown in FIG. 4. The stop bit, start bit, and each data bit are one elementary time unit (ETU) in length (9.439 S). ISO/IEC 14443 defines a character (a byte) as comprising a start bit, eight data bits (LSB-first, MSB-last), and a stop bit.

(16) Further each frame FR comprises before the first data byte BY, a so called Start of Frame (SOF) including at least in bits 0 and 2 bits 1.

(17) The modulator 17 receive the modulating data signal SD as well as an ALM clock signal CKALM advantageously provided by a digital phase locked loop (DPLL) 16. The modulator 17 is configured to perform a subcarrier modulation with the data encoding for generating a signal STX to antenna ANT.

(18) This signal STX comprises, as illustrated in FIG. 5, bursts BST of ALM carrier SC (the ALM carrier SC having a frequency equal here to 13.56 MHz).

(19) Two consecutive bursts BST are separated by a gap wherein no signal is transmitted from the transponder to the reader.

(20) Each half period of the subcarrier period T1 during which there is a signal transmission contains 8 periods of the carrier signal SC.

(21) The signal STX and the corresponding signal STXA at the antenna are illustrated in FIG. 6.

(22) As illustrated in this FIG. 6, each generation of ALM carrier burst BST produces after the generation, signal oscillation OSC at the antenna which naturally decays due to the quality factor of the antenna.

(23) And this natural damping is sufficient to allow an in-frame synchronization, as it will be explained thereafter more in details, without the need of performing an additional controlled damping of the oscillations through a specific damping system.

(24) In FIG. 6, the signal SRD present at the antenna corresponds to the reader carrier signal present on transponder antenna.

(25) If we refer now again to FIG. 3, it appears that some phase changes PCH1, PCH2, PCH3 may occur during frame transmission.

(26) Each phase change occurs when two consecutive bits having two different logical values are transmitted.

(27) Depending on the transition 1 to 0 or 0 to 1 between two bits, the phase change may occur during a gap where there is no signal transmission from the transponder as for example phase changes PCH1 and PCH3 or during a period where there is signal transmission as for example phase change PCH2.

(28) In other words, as illustrated on FIG. 5, a phase change like a phase change PCH1 occurs when no burst is generated during the half period Ta2 of the subcarrier preceding the phase change PCH1 and the half period Ta1 following this phase change.

(29) And, this is such a phase change will be used for triggering resynchronization between the reader carrier frequency and the ALM carrier frequency.

(30) This is illustrated in the bottom part of FIG. 6. The synchronization takes place during a synchronization period Tc beginning at each phase change of the PCH1 type, until generation of the next burst BST.

(31) Turning now again to FIG. 1, the synchronization circuit is configured to perform the in-frame synchronization between the reader carrier frequency and the ALM carrier frequency at each phase change of the PCH1 type, comprises a digital phase locked loop (DPLL) 16 and a controller is 15 configured to deliver a control signal SCTRL at each phase change PCH1.

(32) The controller may be implemented as a software module or by a logic circuit.

(33) When the control signal SCTRL has a first logical value, the controller is configured to put the DPLL 16 in a hold mode in which the feedback loop is opened, between each in-frame synchronization.

(34) And, at each phase change PCH1, the control signal STRL has a second logical value, in response of which the controller is configured to put the DPLL 16 in a lock mode closing the feedback loop for performing the in-frame synchronization during the synchronization period Tc.

(35) As illustrated in FIG. 7, the DPLL 16 comprises a time to digital converter based phase frequency detector 160 followed by a digital loop filter 161 followed by a digitally controlled oscillator (DCO) 162 followed by a divider 163, for example a fractional delta-sigma divider. The output of the divider is connected to the second entry of the time to digital converter based phase frequency detector 160.

(36) Efficient implementation (small in size) requires running of DCO at high frequency (few hundred MHz or higher). It is the reason why the divider block is here provided to generate the ALM clock CKALM to be in phase with the reader carrier frequency (equal here to 13.56 MHz).

(37) The first input of the time to digital converter based phase frequency detector 160 receives the clock signal CKR extracted from the reader carrier signal.

(38) The DCO is controlled by a DCO control word delivered by the digital loop filter 161.

(39) When, in response to the control signal SCTRL, the DPLL is put in hold mode, the feedback loop is opened and the last DCO control word before opening the loop, is stored and used to control the DCO in the hold mode.

(40) As the DCO control is digital, the only source of frequency difference in system using DCO is difference of frequency generated by PLL system in which DCO is induced and the input carrier signal at the moment before the PLL is put on hold. DCO frequency at given control word value only drifts in case supply voltage or temperature change. These changes are negligible in time period which corresponds to duration of transponder reply (few tens of ms).

(41) As indicated above, taking into account the structure of frame including a SOF, at least one BPSK phase change of the PCH1 type (i.e., where 16 carrier periods are available for synchronization) occurs per 12 bits. Taking into account the structure of a byte (start bit, eight data bits and stop bit) at least one BPSK phase change of the PCH1 type occurs per 10 bits. Of course depending on the logical values of the eight data bits of a transmitted byte of this frame, one or more other BPSK phase change of the PCH1 type may occur during the byte transmission, i.e., during the 10 bits duration.

(42) But using a DPLL permits to meet the requirements of a stable generated frequency during the 12 bits duration when synchronization is eventually not done.