Modified three-stage doherty amplifier

Abstract

A 3-stage Doherty amplifier that includes a three-way splitter, a carrier amplifier, first to second peak amplifiers, and an output combiner is disclosed. The output combiner includes first to fifth transmission lines with a /4 electrical length except for that in a downstream of the second peak amplifier, which provides a /2 electrical length. By dividing the latter transmission line into two parts each having a /4 length, and setting impedance thereof in a relation of (Z.sub.1/Z.sub.3).sup.2(Z.sub.L/3), the output impedance of the respective amplifiers are common to each other to be Z.sub.o, where Z.sub.1, Z.sub.3, and Z.sub.L are impedance of the transmission liens in respective downstream sides of the amplifiers, that of the transmission line provided in the output, and the load impedance, respectively.

Claims

1. A three-stage Doherty amplifier, comprising: a three-way splitter that splits an input signal evenly into three portions; a carrier amplifier that receives one of the portions of the input signal split by the three-way splitter, the carrier amplifier always turning on for the input signal; first and second peak amplifiers each receiving respective other portions of the input signal split by the three-way splitter, the first peak amplifier turning on when input signal power becomes greater than a first back-off point, the second peak amplifier turning on when the input signal power becomes greater than a second back-off point greater than the first back-off point; and an output combiner that includes a first output transmission line set in a downstream side of the carrier amplifier, a second output transmission line set in a downstream side of the first peak amplifier, a third output transmission line set in a downstream side of the second peak amplifier, a fourth output transmission line set in a downstream side of the second output transmission line and the third output transmission line, and a fifth output transmission line set in a downstream side of the first output transmission line and the fourth output transmission line, wherein the first, second, fourth, and fifth output transmission lines have an electrical length of a quarter-wavelength (/4) and the third output transmission line has an electrical length of a half-wavelength (/2), where is a wavelength of the input signal.

2. The Doherty amplifier according to claim 1, wherein the output combiner provides a first combining node and a second combining node, the first combining node combining the second output transmission line with the third output transmission line, the second combining node combining the first output transmission line with the fourth output transmission line.

3. The Doherty amplifier according to claim 2, wherein the fifth output transmission line is put between the second combining node and an output of the Doherty amplifier.

4. The Doherty amplifier according to claim 1, further including a first input transmission line and a second input transmission line, the first input transmission line having an electrical length of /2 and provided in an upstream side of the carrier amplifier, and the second input transmission line having an electrical length of /4 and provided in an upstream side of the first peak amplifier.

5. The Doherty amplifier according to claim 1, wherein the carrier amplifier, the first peak amplifier, and the second peak amplifier each implement devices with sizes substantially equal to each other.

6. The Doherty amplifier according to claim 5, wherein the carrier amplifier, and the first and second peak amplifiers include input matching circuits, output matching circuits, and offset lines for adjusting phases of signals output from the carrier amplifier and the first and second peak amplifiers.

7. The Doherty amplifier according to claim 1, wherein the third transmission line includes an upstream transmission line and a downstream transmission line connected in series to each other, the upstream transmission line and the downstream transmission line each having an electrical length of /4.

8. The Doherty amplifier according to claim 7, wherein the first output transmission line, the second output transmission line and the upstream transmission line have equal characteristic impedances.

9. The Doherty amplifier according to claim 8, wherein the carrier amplifier and the first and second peak amplifiers have load impedance of (Z.sub.1/Z.sub.3).sup.2(Z.sub.L/3) common to each other, where Z.sub.1 is impedance of the first, second and upstream transmission lines, Z.sub.3 is impedance of the fifth transmission line, and Z.sub.L is load impedance.

Description

DESCRIPTION OF DRAWINGS

(1) The present disclosure may be better understood, and its numerous objects, features, and advantages made apparent to those skilled in the art by referencing the accompanying drawings:

(2) FIG. 1 schematically shows a conventional three-stage Doherty amplifier;

(3) FIG. 2 shows a schematic of a modified three-stage Doherty configuration according to the present invention; and

(4) FIG. 3 shows another schematic of the three-stage Doherty amplifier modified from that shown in FIG. 2.

DESCRIPTION OF EMBODIMENT

(5) FIG. 1 shows the schematic of a three-stage Doherty amplifier configuration disclosed in U.S. Pat. No. 8,022,760, where the output combiner 30 implements a phase shift of 90 between an output of a carrier amplifier 10.sub.C and an amplifier output OUT, a phase shift of 180 between an output of a first peak amplifier 10.sub.P1 and the amplifier output OUT, and a phase shift of 90 between an output of a second peak amplifier 10.sub.p2 and the amplifier output OUT.

(6) Thus, the output combiner 30 consists of the first quarter-wave (/4) transmission line TL.sub.O1 connected between the output of the carrier amplifier 10.sub.C and the amplifier output OUT, a second /4 transmission line TL.sub.O2 connected between the output of the first peak amplifier 10.sub.P1 and the output of the second peak amplifier 10.sub.P2, and a third /4 transmission line connected between the output of the second peak amplifier 10.sub.P2 and the amplifier output OUT when the output of the second peak amplifier 10.sub.P2 is directly connected with a node N.sub.1 between the second /4 transmission line TL.sub.O2 and the third /4 transmission line TLo6.

(7) The /4 transmission line TL.sub.I1 between a 3-way splitter divider 20 and the input of the carrier amplifier 10.sub.C and that TL.sub.I2 between the 3-way splitter 20 and the input of the second peak amplifier 10.sub.P2 are necessary to compensate for the phase delay caused in the output combiner 30. When three amplifiers have sizes whose ratio is simply given by 1:1:1, the first efficiency back-off point is obtained at 6 dB and the maximum efficiency back-off point is provided at 9.5 dB. However, for high-power applications, there is a difficulty to match the output combining scheme to the optimum load impedance of a transistor because the optimum load impedance thereof becomes very small at high power levels when a micro-strip line is hard or substantially impossible to physically implement such low enough characteristic impedance and the second peak amplifier 10.sub.P2 is also hard or impossible to be directly connected with the node between the second /4 transmission line TL.sub.O2 and the third /4 transmission line TLo3.

(8) Therefore, for convenience of the circuit implementation, the three-stage Doherty amplifier configuration shown in FIG. 1 may be modified by including of an additional half-wave transmission line at the output of the second peak amplifier 10.sub.P2 and an additional /4 transmission line may be included between the second combining node N.sub.2 and the amplifier output OUT in order to secure the design flexibility in choosing optimum values of the transmission-line characteristic impedance required at different output power levels.

(9) The present invention provides a modified three-stage Doherty amplifier including a carrier amplifier 10.sub.C and two peak amplifiers, 10.sub.P1 and 10.sub.P2, each having an input matching circuit, an output matching circuit, and an offset line, when the carrier amplifier 10.sub.C and the peak amplifiers, 10.sub.P1 and 10.sub.P2, are configured to operate such that the peak amplifiers, 10.sub.P1 and 10.sub.P2, switch on sequentially under an increase in input power; an input 3-way splitter 20 is coupled between an input IN of the Doherty amplifier and inputs of the carrier amplifier 10.sub.C and the peak amplifiers, 10.sub.P1 and 10.sub.P2, the outputs of the carrier amplifier 10.sub.C and the peak amplifiers, 10.sub.P1 and 10.sub.P2, are coupled through an output impedance combiner 30 to the output OUT of the Doherty amplifier. The first peak amplifier 10.sub.P1 is coupled with the second peak amplifier 10.sub.P2 at the first combining node N.sub.1 through the /4 transmission line TL.sub.O2 and the third transmission line TL.sub.O3 with an electrical length of /2, and then both peak amplifiers, 10.sub.P1 and 10.sub.P2, are coupled at the second combining node N.sub.2 with the carrier amplifier 10.sub.C through the transmission lines, TL.sub.O1 and TL.sub.O4, respectively. The first peak amplifier 10.sub.P1 is coupled with the input splitter 20 through the /4 transmission line TL.sub.I2, while the carrier amplifier 10.sub.C is coupled with the input splitter 20 through the /2 transmission line TL.sub.I1. The /4 impedance transformer, which is a /4 transmission line TL.sub.O5, connected between the second combining node N.sub.2 and the output of output combiner 30 provides a function of output impedance transformation.

(10) FIG. 2 shows the schematic of a modified three-stage Doherty amplifier according to embodiment of the present invention, where the modifier Doherty amplifier shown in FIG. 2 provides an additional /4 transmission line TL.sub.O4 between the second combining node N.sub.2 and the amplifier output OUT for enhancing the design flexibility of choosing optimum values of the transmission-line characteristic impedances required at different output power levels.

(11) Also, the modified Doherty amplifier further includes an additional /2 transmission line TL.sub.O3 at the output of the second peak amplifier 10.sub.P2 to simplify the physical connection of the second peak amplifier 10.sub.P2 with a path for the first peak amplifier 10.sub.P1 without changing impedance conditions under circuit implementation on a printed circuit board. All amplifiers, 10.sub.C, 10.sub.P1, and 10.sub.P2, include the input matching circuits, the output matching circuits, and the offset lines, which are not illustrated in the figures, necessary to provide high impedance at their outputs for peak amplifiers, 10.sub.P1 and 10.sub.P2, when they are turned off.

(12) All amplifiers, 10.sub.C, 10.sub.P1 and 10.sub.P2, are turned on at saturation, the carrier amplifier 10.sub.C is turned on only to provide efficiency peak at maximum back-off of 9.5 dB when the peak amplifiers, 10.sub.P1 and 10.sub.P2, are turned off; and both the carrier amplifier 10.sub.C and the first peak amplifier 10.sub.P1 are turned on to provide efficiency peak at 6 dB. In the latter situation, the /2 transmission line TL.sub.I1 provided at the input of the carrier amplifier 10.sub.C and the /4 transmission line TL.sub.I2 set upstream of the first peak amplifier 10.sub.P1 are required to compensate for the phase delay caused in the output combiner 30.

(13) FIG. 3 shows another embodiment of the modified three-stage Doherty amplifier according to the present invention, where the Doherty amplifier shown in FIG. 3 provides, substituted from the /2 transmission line TL.sub.O3 at the output of the second peak amplifier 10.sub.P2 shown in FIG. 2, two /4 transmission lines, TL.sub.O3a and TL.sub.O3b, to implement capability in transforming the impedance in the output combiner 30, which may be called as a upstream transmission lien and a downstream transmission line, respectively. In this case, the load impedance seen by the carrier amplifier 10.sub.C and two peak amplifiers, 10.sub.P1 and 10.sub.P2, may vary depending on the characteristic impedance of the corresponding /4 lines, TL.sub.O1, TL.sub.O2, and TL.sub.O3a, provided in the respective outputs of the amplifiers, 10.sub.C, 10.sub.P1, and 10.sub.P2.

(14) In a case of a balanced Doherty amplifier where the carrier and two peak amplifiers, 10.sub.C, 10.sub.P1 and 10.sub.P2 have a ratio in the device size thereof to be equal to 1:1:1 and optimum load impedance of Z.sub.o; the characteristic impedance of the /4 transmission lines, TL.sub.O1, TL.sub.O2, and TL.sub.O3a, connected with the respective outputs of the carrier and two peak amplifier, 10.sub.C, 10.sub.P1, and 10.sub.P2, may be set as Z.sub.1=(Z.sub.oZ.sub.2), where Z.sub.2 is the characteristic impedance of the downstream transmission line TL.sub.O3b provided in a downstream side of the upstream transmission line TL.sub.O3a. The downstream transmission line TL.sub.O3b is connected with the path for the first peak amplifier 10.sub.P1 between two /4 transmission lines, TL.sub.O2 and TLo4, one of which TL.sub.O2 has the characteristic impedance Z.sub.1, while, the other TLo4 has the characteristic impedance Z.sub.2/2, where Z.sub.2=3Z.sub.3.sup.2/Z.sub.L and Z.sub.3 is the characteristic impedance of the /4 transmission line TL.sub.O5 connected between the second combining node N.sub.2 and the amplifier output OUT.

(15) For the case without impedance transformation in the output combiner 30, when conditions of Z.sub.3=28.9 and Z.sub.L=50 are assumed, a relation of Z.sub.o=Z.sub.1=Z.sub.2=50 may be obtained. However, when other conditions of Z.sub.3=40.8 and Z.sub.L=50 are assumed, the characteristic impedance Z.sub.2 of the /4 transmission line TL.sub.O4 is necessary to be increased to 100. In this case, when the /4 transmission lines, TL.sub.O1, TL.sub.O2, and TL.sub.O3a, set in the respective outputs of the carrier amplifier and two peak amplifiers, 10.sub.C, 10.sub.P1, and 10.sub.P2, to be Z.sub.1=50; the load impedance Z.sub.o of the respective amplifiers, 10.sub.C, 10.sub.P1, and 10.sub.P2, reduces to Z.sub.o=25 which is two times smaller than the value without impedance transformation. The same load impedance of Z.sub.o=25 may be achieved for conditions of Z.sub.1=35.3, Z.sub.2=50, and Z.sub.3=28.9. Generally, depending on the value of Z.sub.3 and Z.sub.1, the load impedance Z.sub.o may be set to any desired value according to Z.sub.o=(Z.sub.1/Z.sub.3).sup.2(Z.sub.L/3) for fixed Z.sub.L.