Plug-and-play ripple pacifier for DC voltage links in power electronics systems and DC power grids

Abstract

In many power electronics systems, there is an intermediate DC-link stage for facilitating the power processing of different sources to their loads. A device called a plug-and-play ripple pacifier (RP) directly plugged into the DC-link, and actively removes undesired DC-link ripple, thereby eliminating the reliance on electrolytes capacitors for stabilizing the system and remove ripple. Importantly, the use of this device is non-invasive to the operation of its host systems, and requires no modification of existing hardware. It is suitable for the protection of DC utilities/systems and can also be used as a direct replacement of ripple-canceling E-Caps in power converters device.

Claims

1. A power converter for stabilizing a DC-link interface to DC utilities and systems and which is connected to an AC/DC converter, comprising: first and second capacitors C.sub.o, C.sub.s each with first and second ends, the first capacitor being connected across a DC link; an inductor L connected in series with a first switch S.sub.1, the series being connected between the first end of the second capacitor C.sub.s and the DC link, a second switch S.sub.2 connected between a junction of the first switch and the inductor and the second end of the second capacitor, and a control circuit that alternately operates said first switch and second switch to control the absorption of a DC ripple by presenting a variable impedance to the DC link; and wherein the power converter is connected to the DC-link interface without altering it so it functions as a two-port device that is plug-&-play.

2. The power converter of claim 1 wherein the control circuit only requires a voltage of the DC link.

3. The power converter of claim 1 wherein it is programmable to provide different types of impedance.

4. The power converter of claim 1 wherein the control circuit operates at a frequency higher than double the frequency of an input AC of the AC/DC converter.

5. The power converter of claim 1 wherein the control circuit comprises: a first comparator that compares the voltage across the second capacitor with a reference voltage and creates a first error signal; a converter for changing the first error signal into a first current signal; a functional modifier that modifies the current through the first capacitor to a second current signal; a second comparator for comparing the first and second current signals to generate a third current signal; a third comparator for comparing the current through the inductor to the third current signal to generate a fourth current signal; a current controller that converts the fourth current signal into switching signals for the first switch and second switch.

6. The power converter of claim 5 wherein the functional modifier is a capacitance multiplier.

7. The power converter of claim 5 wherein the functional modifier is a generalized impedance that can be programmed to emulate different impedances.

8. The power converter of claim 7 wherein the generalized impedance can be programmed to be one of a resistor, inductor or non-linear device.

9. A DC voltage system that provides DC voltage to DC utilities and systems, comprising: a power converter for providing the DC voltage to a DC link to which the DC utilities and systems are connected; and a ripple pacifier connected across the DC link, said ripple pacifier presenting variable impedance to the DC link so as to reduce an AC ripple in the DC link, said ripple pacifier relying only on the DC voltage for control and not adversely affecting the DC link.

10. The DC system of claim 9 wherein the power converter is a boost PFC rectifier.

11. The DC system of claim 9 wherein the power converter is a buck boost converter.

12. The DC system of claim 9 wherein the power converter is one of a step-up, step-down or step-up/down power electronics converter or an AC/DC converter including a full-bridge converter, half-bridge converter and multi-level converter or their derivative or combination.

13. The DC system of claim 9 wherein the power converter acts to perform at least one of the following: an emulated impedance, active power filter, voltage ripple reduction or improved stability margin of DC voltage linked power stages.

14. The DC system of claim 9 wherein the power converter acts as a second ripple pacifier to suppress or filter voltage ripple of a particular frequency that doubles main frequency commonly occurred in an AC-DC power converter systems.

15. A method for controlling an AC ripple from a switched mode power electronic converter connected to a DC link of a host DC voltage system, comprising the steps of: providing a two terminal device across the DC link; causing the two terminal device to emulate the AC ripple and to reflect the AC ripple in the impedance it presents to the DC link so as to reduce the AC ripple; causing the impedance to be presented in such a way as to not alter the DC link; controlling the two terminal device based on the measurement of the DC link.

16. The method of claim 15, wherein the step of controlling involves alternately switching impedance elements in the two terminal device to vary the impedance presented by the two terminal device.

17. The method of claim 15 wherein the step of controlling operates at a frequency higher than double the frequency of the AC ripple.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The foregoing and other objects and advantages of the present invention will become more apparent when considered in connection with the following detailed description and appended drawings in which like designations denote like elements in the various views, and wherein:

(2) FIG. 1 is a block diagram of a typical power stage infrastructure for power electronics system with a DC-link;

(3) FIG. 2 is an overview of an existing DC-link (DC utilities and systems) with multiple plug-and-play ripple power devices according to the present invention installed therein;

(4) FIG. 3 shows a three port model of an AC/DC system;

(5) FIG. 4 illustrates various circuit diagrams with different ripple port configurations. i.e., FIG. 4(a) is an AC port, FIG. 4(b) is a DC port, FIG. 4(c) is an inverter leg and FIG. 4(d) is a high-frequency ac-link;

(6) FIG. 5(a) is a block diagram of a simplified DC system showing a ripple pacifier in the form of an active filter and FIG. 5(b) is the circuit model of a practical boost PFC rectifier;

(7) FIG. 6 shows waveforms of C.sub.s for different values of k. where FIG. 6(a) is the voltage waveforms and FIG. 6(b) is the current waveforms;

(8) FIG. 7 shows voltage waveforms of Cs with inverter type RP where FIG. 6(a) is for k=1 and FIG. 7(b) is for k=1.25;

(9) FIG. 8 is a plot of the relationship between voltage utilization rate V and energy utilization rate E;

(10) FIG. 9 is a schematic of a system comprising a boost PFC rectifier and an RP being connected to the DC-link;

(11) FIG. 10(a) is a block diagram of a circuit configuration of an AC/DC system with a bi-directional buck converter as the RP, and FIG. 10(b) is a circuit schematic of the arrangement of FIG. 10(a);

(12) FIG. 11 is a control block of the RP when controlled as a buck converter;

(13) FIG. 12 is a typical control block diagram of a boost PFC rectifier;

(14) FIG. 13 is a circuit configuration of an AC/DC system when the RP operates as a boost converter;

(15) FIG. 14 is a control block of the RP when controlled as a boost converter;

(16) FIG. 15 is an equivalent state-space averaged circuit model of RP with consideration to the AC/DC input source;

(17) FIG. 16 is a small-signal model of RP with consideration to the AC/DC input source;

(18) FIG. 17 is a control block diagram of the proposed DC-voltage based control for RP, showing how to emulate an impedance of Z.sub.e.

(19) FIG. 18 is a control block of the proposed RP for emulating in FIG. 18(a) a capacitor of KCo and in FIG. 18(b) a general impedance of 1/(sGe(s)Co);

(20) FIG. 19 is a graph of the capacitance of C.sub.o and C.sub.emulated in the frequency domain when G.sub.e(s) is a proportional gain of K (the effect of the low-pass filter is neglected);

(21) FIG. 20 is a simulation of results of the steady-state operation waveforms of the system where FIG. 20(a) is without RP; FIG. 20(b) is with RP using a PR controller of 100 Hz resonant frequency; and FIG. 20(c) is with RP using a multi-PR controller of resonant frequencies of 100 Hz, 200 Hz and 300 Hz;

(22) FIG. 21 shows graphs of experimental results of the steady-state operation waveforms and FFT results of the DC-link voltage for the circuit of FIG. 10(b);

(23) FIG. 22 shows graphs of experimental results of the steady-state operation waveforms and FFT results of the DC-link voltage for the case of FIGS. 22(a), 22(b) which is without RP; FIGS. 22(c), 22(d) with RP using PR controller of 100 Hz resonant frequency; and FIGS. 22(e), 21(f) with RP using multi-PR controller of resonant frequencies of 100 Hz, 200 Hz and 300 Hz;

(24) FIGS. 23(a) and 23(b) are transient voltage waveforms of the system from full load to 20% load without RP (left) and with RP (right);

(25) FIGS. 24(a) and 24(b) are transient voltage waveforms of the system from 20% load to full load without RP (left) and with RP (right);

(26) FIG. 25 shows the relative power consumed by the RP for different output power and a comparison of power efficiency of the AC/DC system with and without the use of RP;

(27) FIG. 26 is the thermal image and point temperature (in C.) of the boost PFC circuit board without RP (FIG. 26(a)) and with RP (FIG. 26(b)); and

(28) FIG. 27 is a plot of power factor against output power of the AC/DC system with and without the use of RP.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE INVENTION

(29) As shown in FIG. 3, at the ripple port there is an energy storage device that absorbs only the DC voltage ripple. As a result the E-Cap next to the ripple port becomes optional. Besides, the current invention is connected in parallel with the DC utilities at the DC-link interface, thus it can be plugged into the system without any modification (plug-and-play).

(30) Therefore, for AC/DC systems, the current invention can eliminate the use of E-Caps to improve the overall system stability. For existing system with pre-installed E-Caps, it can also serve as a protection apparatus to slow down the degradation of the E-Caps. For integrated systems, the current invention can replace short-lifetime E-Caps directly to improve the lifetime of the application.

(31) FIG. 4 shows various illustrative examples of circuits related to each kind of ripple port configurations. In each figure the circuit for performing the ripple pacifying function is shown in dotted lines. The input side represents the ac port and the DC port is also labelled as shown in FIG. 3. Switches are provided in the circuits to connect the energy storage device of the present invention to the DC port at the correct time to eliminate the ripple. Clearly, configurations with the ripple port in parallel with the DC port (see FIG. 4(b)) have the advantage that the ripple port can be easily attached to or detached from the system, without disruption to the functional operation of existing AC or DC utilities. This provides the possibility of attaining a plug-and-play RP functionality. However, it should be noted that not all configurations in FIG. 4 are suitable for plug-and-play application. To be qualified for plug-and-play application, the device should (i) have two terminals only for the dc voltage link and (ii) require only the DC link voltage as input variable for its control. All necessary variables or references for control (such as the reference of i.sub.f) should be able to be derived from the information of v.sub.DC for a shunt programmable device according to this invention. There should not be any need to implement any other sensor for measuring other variables such as the input AC voltage (v.sub.ac), input AC current (i.sub.ac), the supply current from the DC voltage source (i.sub.s) and the load current (i.sub.o). Therefore, a true plug-&-play device should be non-intrusive to the existing host system. If the shunt device is designed or programmed as an active filter, it can operate as an independent device to remove the DC bus voltage ripple. Similarly, for a series device, the control schematic should require the information of the series current (i.sub.o) only.

(32) Using FIG. 4(b) as an example the AC source and the four diodes with switches across them form a full wave rectifier 10 to generate DC voltage that is to be applied to the DC port. The switches 11 within the dotted line selectively connect the inductor 12 and capacitor 13 to the DC line to remove the ripple. An E-cap is additionally shown across the DC port. Alternative configurations are shown in the other schematics of FIG. 4.

(33) According to the present invention a ripple pacifier (RP) is connected across a DC grid and it actively changes its impedance to absorb ripple. FIG. 5(a) shows a simple block diagram, as opposed to the schematics of FIG. 4 of such an arrangement. In FIG. 5(a) a simplified DC system is shown, which comprises an AC/DC converter 10 (e.g. a rectifier or an inverter), a DC source/load 15, and the active filter (switches 17) and energy storage devices 19 of the present invention. The shunt active filter 17 is coupled with the DC bus of the system via the point of common coupling (PCC), and can actively remove any undesired disturbances on the DC bus by introducing a current i.sub.f into the DC bus. With such configuration, the active filter has the possibility to realize plug-and-play functionality.

(34) In order to better understand the present invention a mathematical description of the double-line frequency ripple power present in single-phase AC/DC systems is derived using a conventional boost PFC rectifier (see FIG. 5(b)) as an example. Here, the circuit comprises a front-end diode bridge (D1-D4), a boost PFC converter (L.sub.b, S.sub.b and Do) and a capacitor Co that is in parallel with the DC load Ro. Series resistances rb and rd are incorporated in the circuit model to reflect the conduction losses of the inductor and the diodes, respectively.

(35) The input of the rectifier is assumed to be of unity power factor such that the AC side voltage and current are
v.sub.ac=V.sub.s sin(t)(1)
i.sub.ac=I.sub.s sin(t)(2)
where v.sub.ac and i.sub.ac are the instantaneous line voltage and current, and V.sub.s and I.sub.s are their amplitude, respectively. The current flowing through L.sub.b is the rectified form of the AC input current. Therefore, the instantaneous storage power of the inductor is

(36) $\begin{array}{cc}{p}_L=\frac{{\mathrm{dE}}_L}{\mathrm{dt}}=\frac{d\left(\frac{1}{2}{L}_b{.Math.i_{\mathrm{ac}}.Math.}^2\right)}{\mathrm{dt}}=\frac{1}{2}{L}_b{I}_s\sin \left(2t\right)& \left(3\right)\end{array}$
where E.sub.L is the instantaneous energy stored in the inductor.

(37) The total conduction loss of the rectifier can be expressed as
p.sub.cond=i.sub.ac.sup.2(r.sub.b+2r.sub.d)=I.sub.s.sup.2(r.sub.b+2r.sub.d)[1cos(2t)](4)

(38) Taking Equations (3) and (4) into consideration, the instantaneous power p.sub.AC that is delivered to the DC port is given as

(39) $\begin{array}{cc}\begin{array}{cc}{p}_{\mathrm{AC}}=& v_{\mathrm{ac}}{i}_{\mathrm{ac}}-p_L-p_{\mathrm{cond}}\\ =& \stackrel{\stackrel{P_{\mathrm{DC}}}{}}{\frac{1}{2}{I}_s\left[V_s-I_s\left(r_b+2r_d\right)\right]}-\\ & \stackrel{\stackrel{p_r=p_2}{}}{\frac{1}{2}{I}_s{V}_s\cos \left(2t\right)-\frac{1}{2}{L}_b{I}_s^2\sin \left(2t\right)+\frac{1}{2}{I}_s^2\left(r_b+2r_d\right)\cos \left(2t\right)}\end{array}& \left(5\right)\end{array}$

(40) Equation (5) clearly shows that P.sub.AC contains two components: a constant DC component P.sub.DC and a double-line frequency component P.sub.2. Here, P.sub.DC should be equal to the real power required by the DC load, while P.sub.2 is the instantaneous power difference between the AC input and the DC output, which is equivalent to the ripple power p.sub.r, i.e.,
p.sub.r=p.sub.2=I.sub.s[V.sub.sI.sub.s(r.sub.b+2r.sub.d)] cos(2t)L.sub.bI.sub.s.sup.2 sin(2t).(6)

(41) From Equation (6), it can be seen that pr is introduced by the line voltage and current, and is a function of Lb, rb and rd. The ripple power pr will pass through the filtering capacitor Co and will generate a double-line frequency voltage ripple across it. A smaller capacitor can lead to a significantly high voltage ripple across the DC load device, which is typically undesired.

(42) In order to prevent the low-frequency voltage ripple from appearing at the input of the DC load device, Pr can be externally decoupled from the circuit, which is then stored into a separate inductive or capacitive storage device. An inductive means of energy storage is usually avoided due to its low power density and high power losses. Therefore, only the capacitive means of energy storage device is set forth.

(43) Without losing generality, Pr which is set forth in Equation (6) can be expressed as
p.sub.r=P.sub.R sin(2t+)(7)
where P.sub.R and are the amplitude and the phase of Pr, respectively. Given that the voltage of the storage device's capacitor C.sub.s is v.sub.CS, its capacitor current i.sub.CS will be

(44) $\begin{array}{cc}{i}_{\mathrm{CS}}=C_s\frac{{\mathrm{dv}}_{\mathrm{CS}}}{\mathrm{dt}}.& \left(8\right)\end{array}$

(45) Since the power in C.sub.s must be instantaneously equal to the ripple power, Equation (9) must be satisfied.

(46) $\begin{array}{cc}{v}_{\mathrm{CS}}{i}_{\mathrm{CS}}=C_s\frac{{\mathrm{dv}}_{\mathrm{CS}}^2}{\mathrm{dt}}=P_R\sin \left(2t+\right)& \left(9\right)\end{array}$
Integrating Equation (9) to solve for v.sub.CS gives

(47) $\begin{array}{cc}.Math.v_{\mathrm{CS}}.Math.=\sqrt{\frac{P_R}{C_s}\left[k-\cos \left(2t+\right)\right]}\left(k1\right)& \left(10\right)\end{array}$
where k is an integral constant that determines the shape of the capacitor voltage waveform.

(48) It should be highlighted that the polarity of v.sub.CS in Equation (10) can be either positive, negative or both, depending on the circuit topology of the RP to which C.sub.s is connected. A DC/DC type RP normally provides C.sub.s with a single polarity voltage waveform, whereas an inverter type could offer a dual polarity operation. If the operational waveform of v.sub.CS is positive, then

(49) $\begin{array}{cc}{v}_{\mathrm{CS}}=\sqrt{\frac{P_R}{C_s}\left[k-\cos \left(2t+\right)\right]}& \left(11\right)\end{array}$
and the associated capacitor current i.sub.cs will be given as

(50) $\begin{array}{cc}{i}_{\mathrm{CS}}=\frac{\sin \left(2t+\right)}{\sqrt{\frac{1}{C_s{P}_R}\left[k-\cos \left(2t+\right)\right]}}.& \left(12\right)\end{array}$

(51) In order to help visualize the operation waveforms of C.sub.s, FIG. 6 shows plots of voltage and current based on Equations (11) and (12) in which a ripple power P.sub.R of 100 W and C.sub.s of 10 F are assumed with k=1, 1.25, 2, and 5. From FIG. 6, the following observations can be obtained: (a) The DC (averaged) value of v.sub.CS increases as k increases. (b) The voltage fluctuation of v.sub.CS decreases as k increases. (c) When k=1, the shape of v.sub.CS has a rectified sinusoidal shape; as k increases, the waveform becomes more sinusoidal.

(52) Alternatively, Equation (11) can be rearranged into

(53) $\begin{array}{cc}{v}_{\mathrm{CS}}=\sqrt{\frac{P_R}{C_s}\left[\left(k-1\right)+2{\sin }^2\left(t+\frac{}{2}\right)\right]}\mathrm{or}& \left(13\right)\\ v_{\mathrm{CS}}=\sqrt{\frac{P_R}{C_s}\left[{\left(\sqrt{k}-\frac{1}{2\sqrt{k}}\cos \left(2t+\right)\right)}^2-\frac{1}{4k}{\cos }^2\left(2t+\right)\right]}.& \left(14\right)\end{array}$

(54) According to Equation (13), when k=1, v.sub.cs can be simplified as

(55) $\begin{array}{cc}{v}_{\mathrm{CS}}=\sqrt{\frac{2P_R}{C_s}}.Math.\sin \left(t+\frac{}{2}\right).Math.& \left(15\right)\end{array}$
which is clearly in the form of a rectified sinusoid and is in agreement with that plotted in FIG. 6. On the other hand, when k>>1, the cos.sup.2 (2t+) term in Equation (14) can be neglected. Consequently, V.sub.cs can be approximated by a double-line frequency component with a DC offset, as shown in Equation (16).

(56) 0$\begin{array}{cc}{v}_{\mathrm{CS}}=\stackrel{\stackrel{\mathrm{DC}}{}}{\sqrt{\frac{P_{R}k}{C_s}}}-\stackrel{\stackrel{2}{}}{\sqrt{\frac{P_R}{4C_{s}k}\cos \left(2t+\right)}}& \left(16\right)\end{array}$

(57) From Equation (16), it is clear that the DC component in V.sub.CS is proportional to the parameter k, while the amplitude of the double-line frequency content (i.e. the voltage ripple) is inversely proportional to k.

(58) In cases where the RP is of the inverter type, of which V.sub.CS is of dual polarity, the waveform of V.sub.CS can be much more diverse. By mirroring any portion of the V.sub.CS waveforms in FIG. 6 to negative, an AC waveform v.sub.cs can be derived. FIG. 7 shows two examples of how AC waveforms of V.sub.cs for k=1 and 1.25 can be obtained. Particularly, when k=1,

(59) $\begin{array}{cc}{v}_{\mathrm{cs}}=\sqrt{\frac{2P_R}{C_s}}\sin \left(t+\frac{}{2}\right),& \left(17\right)\end{array}$
which is a pure sinusoidal waveform with the line frequency.

(60) The derived voltage waveforms are all theoretically valid, but some might be unsuitable for practical implementation. For instance, the rectified sinusoidal waveform shown in Equation (15) has severe voltage variations and abrupt changes at some periodic points, implying a rich content of harmonics. These kinds of waveforms are challenging for implementation with the RP. In contrast, the waveforms in Equations (16) and (17) contain only a single low-frequency content, which is much easier to track.

(61) From Equation (11), the maximum and minimum voltage of V.sub.CS can be derived as

(62) $\begin{array}{cc}{V}_{\mathrm{CS}\_\max }=\sqrt{\frac{P_R\left(k+1\right)}{C_s}}& \left(18\right)\\ V_{\mathrm{CS}\_\min }=\sqrt{\frac{P_R\left(k-1\right)}{C_s}}& \left(19\right)\end{array}$
and the respective energy stored in the storage capacitor C.sub.s is

(63) $\begin{array}{cc}{E}_{\mathrm{CS}\_\max }=\frac{P_R\left(k+1\right)}{2}& \left(20\right)\\ E_{\mathrm{CS}\_\min }=\frac{P_R\left(k-1\right)}{2}.& \left(21\right)\end{array}$

(64) The energy utilization rate, .sub.E, which is defined as the ratio of the fluctuation of energy over the maximum stored energy, can be expressed as

(65) $\begin{array}{cc}{}_E=\frac{E_{\mathrm{CS}\_\max }-E_{\mathrm{CS}\_\min }}{E_{\mathrm{CS}\_\max }}.& \left(22\right)\end{array}$
By substituting Equations (20) and (21) into Equation (22), .sub.E can be expressed in terms of k as

(66) $\begin{array}{cc}{}_E=\frac{2}{k+1}& \left(23\right)\end{array}$

(67) Equation (23) shows that E is inversely-proportional to k.

(68) In a similar manner, the capacitor voltage utilization rate V (or ripple factor), which is defined as the ratio of the voltage variation over the average DC voltage V.sub.CS_avg, can be derived as that given in Equations (24) and (25).

(69) $\begin{array}{cc}{V}_{\mathrm{CS\_avg}}=\frac{1}{2}\left(V_{\mathrm{CS\_max}}+V_{\mathrm{CS\_min}}\right)& \left(24\right)\\ {}_V=\frac{V_{\mathrm{CS\_max}}-V_{\mathrm{CS\_min}}}{V_{\mathrm{CS\_avg}}}=2\left(k-\sqrt{k^2-1}\right)& \left(25\right)\end{array}$

(70) As a result, it is possible to correlate V and E by combining Equations (23) and (25), and eliminating k to give Equation (26), which is plotted as shown in FIG. 8.

(71) It should be noted that the maximum values for V and E are 200% and 100%, respectively.

(72) $\begin{array}{cc}{}_E=\frac{8{}_V}{{}_V^2+4{}_V+4}& \left(26\right)\end{array}$

(73) Equation (26) is useful for evaluating the utilization of the energy storage component by using only the voltage ripple information. For example, in conventional boost PFC rectifiers, with a 1% voltage ripple (V=1%) on the DC-link, the energy utilization rate is merely 1.98%. This means that the remaining 98% of the energy stored in the capacitor is redundant. For the proposed RP on the other hand, with a much larger voltage variation allowed on the Ccs, e.g. V=140%, the resulting utilization rate E is more than 96%. Clearly, the active energy storage method of the RP provides a significant improvement in terms of energy usage.

(74) The topology of the RP could be selected as a DC/DC converter or a DC/AC inverter in accordance with the capacitor waveforms that have been derived in FIG. 6 (for DC operation) and FIG. 7 (for AC operation). As an illustrative example, only the DC/DC type converters are considered. These converters might or might not have galvanic isolation. Converters such as switched-capacitor (SC) converters are also possible candidates. See the M. Chen article, which is incorporated herein by reference in its entirety. In general, the three rules in determining the circuit topology for the RP are: (d) Energy utilization rate .sub.E should be large. (e) The size and cost of the energy storage capacitor should be small. (f) High voltage stress on components should be avoided.

(75) According to FIG. 8, the allowance of a higher .sub.V (bigger voltage swing over C.sub.s) results in a higher .sub.E. However, a high .sub.E does not necessarily guarantee a very small capacitance. By combining Equations (19), (20), (25), and (26), C.sub.s can be derived as

(76) $\begin{array}{cc}{C}_s=\frac{P_r}{V_{\mathrm{CS\_avg}}^2+{}_V}.& \left(27\right)\end{array}$

(77) From Equation (27), it can be understood that to minimize the energy storage capacitance, both V and VCS_avg (i.e., average voltage of Cs) should be large.

(78) For AC/DC systems with a high DC port voltage V.sub.DC, such as that in typical boost PFC rectifiers with a 400 V DC-link output, a buck or a buck-boost converter can be used. Both converters can realize 100% energy utilization rate since the voltage of Cs can be fully discharged to zero. Nevertheless, the V.sub.CS_avg in a buck converter is bounded by V.sub.DC, whereas it can be much higher in a buck-boost converter. Hence a smaller capacitance can be realized in a buck-boost converter at the cost of higher voltage stress. However, if a boost converter is used, Cs can only be discharged to V.sub.DC. Therefore, Cs contains significant amount of redundant energy that cannot be utilized. Also, the voltage stress will be very high, which is unacceptable. These characteristics obviously violate the converter selection rules.

(79) For AC/DC systems that have a low V.sub.DC (e.g. a micro-inverter system in which one or several low voltage PV cell are connected to an inverter), a buck-boost or a boost converter can be selected. Here, both the redundant energy and the voltage stress can be low for the boost converter because of the low V.sub.DC. The buck converter is not chosen since the upper limit of v.sub.CS is bounded by the low V.sub.DC, resulting in a low V.sub.CS_avg value. A large capacitor would have to be applied with the buck RP, which is undesirable.

(80) For purposes of understanding the present invention a system with a high DC-link voltage of 400 V is considered. Therefore, a bi-directional buck converter is selected as the RP. FIG. 9 shows the circuit arrangement of a boost PFC rectifier and an RP being connected to the DC-link.

(81) In order for the RP to operate effectively, the active filter must be controlled. Generally, there are four methods to control the active filter:

(82) (1) Directly control the output current of the shunt active filter i.sub.f such that i.sub.si.sub.f=I.sub.DC, where I.sub.DC is a constant DC current. Therefore, i.sub.f can be controlled to be equal to the ripple content in i.sub.s, as illustrated in FIG. 2;

(83) (2) Directly control the instantaneous power in the energy storage device such that the ripple power generated by the AC/DC converter is compensated. Typically, the control of the instantaneous power is achieved by regulating the voltage/current of the energy storage device. This method is equivalent to the first; however, the output current i.sub.f is indirectly controlled;

(84) (3) Directly calculate the duty cycle based on the ripple current content in i.sub.s. This method is a feedforward control; and

(85) (4) Directly regulate the instantaneous DC voltage through feedback control. It is a DC-voltage based control.

(86) The control design is critical for the actualization of the plug-and-play operation of the RP. First, the controller must be DC port based; meaning that the only information available for performing the control is the DC output voltage V.sub.DC. Currently, many existing methods for controlling active filters are circuit-model based (e.g. by using Equation (6)) that require knowledge of the AC side information (such as current and voltage) and the system parameters. These methods require installation of extra sensors into the existing host system and are invasive to its operations. This makes them inappropriate for RP implementation. Furthermore, they are typically complicated and inaccurate. See the articles M. Su; et. al., H. Li, et al.; Y. Tang, et. al., and P. T. Krein and R. S. Balog, Cost-effective hundred-year life for single-phase inverters and rectifiers in solar and LED lighting applications based on minimum capacitance requirements and a ripple power port, IEEE Applied Power Electronics Conference and Exposition, (2009), pp. 620-625].

(87) Since the ripple voltage on the DC port is caused by the ripple power p.sub.r, the ripple voltage alone contains sufficient information to predict the ripple power. For the present invention, a ripple-voltage based controller is proposed. It utilizes only the ripple voltage information on the DC port of the AC/DC system to estimate the voltage waveform V.sub.CS of the energy storage capacitor. No information from the AC side is needed, nor does it require knowledge of the exact system parameters.

(88) Assume that a large k is adopted for both the DC-link voltage V.sub.DC and the energy storage capacitor V.sub.CS. According to Equation (16), both waveforms can be approximated as functions that comprise a double-line frequency ripple and a DC offset, in which the ripple of both functions are in phase. An ideal proportional-resonant (PR) controller, which has an infinite gain at the double-line frequency, can be used to ensure that V.sub.CS is controlled to fully mitigate the double-frequency ripple of V.sub.DC. An example of such a controller shown in D. N. Zmood and D. G. Holmes, Stationary frame current regulation of PWM inverters with zero steady-state error, IEEE Trans. Power Electron., vol. 18, no. 3, pp. 814-822, May 2003, which is incorporated herein by reference in its entirety. When the energy utilization rate .sub.E is high, k for V.sub.CS is designed to be low. In this case, the high-order harmonic contents of V.sub.CS increase, and the control of V.sub.CS using a single PR controller will be inaccurate. Instead, a multi-PR controller that has high gain for multiple selected frequencies and over a wider bandwidth can be applied. As an example, see the M. Su, et al. article and R. Teodorescu, et al., A new control structure for grid-connected LCL PV inverters with zero steady-state error and selective harmonic compensation, IEEE Applied Power Electronics Conference and Exposition, (2004), vol. 1, pp. 580-586, which is incorporated herein by reference in its entirety.

(89) A repetitive controller is also an alternative solution. See M. Steinbuch, Repetitive control for systems with uncertain period-time, Automatica, vol. 38, no. 12, pp. 2103-2109, (December 2002), which is incorporated herein by reference in its entirety.

(90) The transfer functions for an ideal PR, multi-PR and repetitive controller are shown in Equations (28)-(30), respectively.

(91) $\begin{array}{cc}{G}_{\mathrm{c\_PR}}=k_p+\frac{k_{i}s}{s^2+{}_1^2}& \left(28\right)\\ G_{\mathrm{c\_PR}\mathrm{\_multiple}}=k_p+\frac{k_{i1}s}{s^2+{}_1^2}+\frac{k_{i2}s}{s^2+{}_2^2}+\frac{k_{i3}s}{s^2+{}_3^2}+\mathrm{.Math.}& \left(29\right)\\ G_{\mathrm{c\_Rp}}=e^{-\frac{2}{{}_1}s}& \left(30\right)\end{array}$

(92) Ideal PR controllers are mostly impractical. Instead, the quasi-PR controller, which is more easily realized through simple analog circuits or microprocessors, is typically adopted in implementation. See the articles H. Li, et al. and D. N. Zmood, et al., which are incorporated herein by reference in their entireties. A typical transfer function for a quasi-PR controller is shown in Equation (31), where .sub.c is the cut-off frequency and .sub.1 is the resonant frequency.

(93) 0$\begin{array}{cc}{G}_{\mathrm{c\_quasi}\mathrm{\_PR}}=k_p+\frac{k_i{}_{c}s}{s^2+{}_{c}s+{}_1^2}& \left(31\right)\end{array}$

(94) The gain of the quasi-PR controller is lower than that of the ideal PR controller, but it has a wider passband. Therefore, in terms of mitigating ripples in systems that have a shifting line-frequency as in real-life AC grids, the quasi-PR controller would be more useful.

(95) The buck RP is operated to provide for bi-directional power flow. It can be perceived as a buck converter when power flows in the direction from V.sub.DC to C.sub.s, or as a boost converter when power flows reversely. The control of the RP is individually examined for both directions of power flow. While it may first appear that the controller is different for both cases, in fact they are equivalent when it comes to implementation. As the AC/DC system model used in this work is general, the conclusion made is universal to all possible AC/DC systems.

(96) For power flowing from the DC port of the AC/DC system to the energy storage capacitor Cs, the RP operates as a buck converter, as illustrated in FIG. 10.

(97) A possible control block of the RP is illustrated in FIG. 11, which shows a high-pass filtered DC-link voltage being processed by the quasi-PR controller 22 with transfer function G.sub.C, and generating a reference capacitor voltage V.sub.CS*. The high-pass filter 20 removes the DC content of V.sub.DC. For control simplicity, V.sub.CS* is directly pulse-width-modulated by a carrier signal V.sub.m applied to comparator 24, which also receives V.sub.cs to control the buck converter without the sensing and closed-loop feedback of the actual V.sub.CS. Essentially, this is a feed-forward control. Here, the high-side switch S.sub.1 is directly controlled by the controller, while the low-side switch S.sub.2 is made complimentary to S.sub.1 by inverter 26. The overall open-loop transfer function from DC-link voltage to the output duty cycle d.sub.S1 is

(98) $\begin{array}{cc}{G}_{\mathrm{op}\left(S1\right)}=\frac{{\hat{d}}_{S1}}{{\hat{v}}_{\mathrm{DC}}}=G_{\mathrm{hp}}{G}_c/V_M& \left(32\right)\end{array}$
where G.sub.hp is the transfer function of the high-pass filter and V.sub.M is the modulator amplitude.

(99) FIG. 12 shows the typical control block diagram of a boost PFC rectifier with input current shaping control. Generally, the bandwidth of the outer voltage/power loop of the PFC controller is very small (e.g. lower than a few Hz) and only the DC voltage/power (V.sub.DC or P.sub.DC) of the DC-link is regulated. At steady state, the ripple power which the RP absorbs is an AC double-line frequency component, and the RP consumes no DC power. If the input impedance of the RP is defined as Z.sub.in, as shown in FIG. 10(a), the ideal Z.sub.in would be

(100) $\begin{array}{cc}\{\begin{array}{c}{Z}_{\mathrm{in\_DC}}=\\ Z_{\mathrm{in\_}2}=0\end{array}& \left(33\right)\end{array}$
where Z.sub.in_DC and Z.sub.in_2 are the input impedance Z.sub.in corresponding to DC and double-line frequency voltage signals, respectively. This means that the incorporation of the RP on the DC port has no influence on the average DC voltage control of the original AC/DC system.

(101) For verification, an experimental simulation was performed using PSIM software based on the circuit configuration shown in FIG. 9, where a boost PFC rectifier is used as the AC/DC conversion system. Two isolated resistive loads R.sub.o_1 and R.sub.o_2 are used to emulate the two different utilities connected on the DC-link. The key circuit parameters are given in Table I.

(102) TABLE-US-00001 TABLE I KEY CIRCUIT PARAMETERS FOR SIMULATION AND EXPERIMENT Plug-and-Play RP Boost PFC stage Parameters Values Parameters Values Input voltage V.sub.DC (V) 400 Nominal power P.sub.DC (W) 100 Energy storage capacitor 5 AC voltage v.sub.ac (V) 220 C.sub.s (F) Output voltage V.sub.DC (V) 400 Inductor L.sub.s (mH) 2.5 Dc-link capacitor C.sub.o (F) 5 Switching frequency f.sub.s1 25 ESR of C.sub.o @ 400 V () 3.51 (kHz) Boost inductor L.sub.b (H) 390 Load 1: R.sub.o.sub..sub.1 () 2400 Load 2: R.sub.o.sub..sub.2 () 4800 Switching frequency f.sub.s2 100 (kHz)

(103) FIG. 20 shows the simulation results of the steady-state voltage waveforms of the DC-link and the energy storage capacitor. Before the RP is applied (FIG. 20(a)), the DC-link voltage ripple is more than 60.9 V, which accounts for 15.2% of the average value (400 V). The large ripple is due to the use of a small capacitor on the DC-link. After the RP is plugged-in (FIG. 20(b)), the voltage ripple is effectively reduced to around 7.2 V for the case of using the PR controller with 100 Hz resonant frequency and to around 3.9 V (<1% of the averaged DC-link voltage) when a multi-PR controller is utilized, as shown in FIG. 20(c). The simulation results are in good agreement with the experimental results that are shown in FIG. 21.

(104) A schematic of the block diagram of FIG. 10(a) is shown in FIG. 10(b). It illustrates the use of the plug-&-play device programmed as an emulated capacitor and used as a voltage ripple pacifier in the system. As part of a simulation a current source (i.sub.dis) is included in the system to disturb the 48V dc link voltage by creating repetitive voltage ripple. The current source is programmed to inject current into the system at four different frequencies (30 Hz, 100 Hz, 200 Hz and 300 Hz) in order to create voltage ripples at these four frequencies. Separate simulation tests are conducted with and without the proposed voltage ripple pacifier. The voltage ripple pacifier is programmed with an emulated capacitor of C=520 F, although the actual C.sub.o=10 F and C.sub.s=20 F. For the simulation without using the voltage ripple pacifier, a capacitor of 520 F is used so that the results can be compared with those obtained with the emulated capacitor (with an equivalent capacitance of 520 F).

(105) The simulation results are shown in FIG. 21. Comparisons of the DC-bus voltage V.sub.DC are given for scenarios when

(106) (a) a DC-bus capacitor C.sub.o=10 F is used only.

(107) (b) a DC-bus capacitor C.sub.o=520 F is used only

(108) (c) the Ripple Pacifier emulating a capacitor C=520 F (with C.sub.o=10 F and C.sub.s=20 F)

(109) The simulations results show that the filtering effect of the emulated capacitor of 520 F (provided by the shunt voltage ripple pacifier) in reducing the voltage ripple is as effective as a practice capacitor of 520 F. The magnitude of the filtered voltage ripples is significantly smaller than that when only a small capacitor of C.sub.o=10 F is used.

(110) According to FIG. 22, with an RP using a PR controller of 100 Hz resonant frequency, the DC-link voltage ripple is significantly mitigated from 61 V (see FIG. 22(a)) down to 6.3 V (see FIG. 22(c)). The fast Fourier transfer (FFT) analysis of V.sub.DC shows that the RMS value of the double-line frequency ripple is reduced from 14.1 V (see FIG. 22(b)) down to 0.304 V (see FIG. 22(d)). With a high voltage utilization rate, V.sub.DC still contains noticeable high-order ripple contents, as indicated in FIG. 22(d). The performance of the DC-link voltage can be further improved with a ripple of only 3.3 V (see FIG. 22(e)) when the controller of the RP is changed to a multi-PR controller with resonant frequencies of 100 Hz, 200 Hz, and 300 Hz. This is clearly reflected in FIG. 22(f) which shows the high-order ripples being effectively suppressed.

(111) Four sets of step-load change experiments were conducted (from full load to 20% load, and from 20% load to full load) with and without the use of RP. These experiments were conducted to examine the transient and steady state performance of the RP. The transient voltage waveforms of the DC-link and the energy storage capacitor are shown in FIG. 23 and FIG. 24. In particular, FIGS. 23(a) and 23(b) are transient voltage waveforms of the system from full load to 20% load without RP (left) and with RP (right) in each figure. FIGS. 24(a) and 24(b) are transient voltage waveforms of the system from 20% load to full load without RP (left) and with RP (right) in each figure.

(112) From the results, it is observed that for both load-change conditions, the DC-link voltage of the system is of similar dynamics in terms of their overshoot/undershoot ratio and settling time, for both cases with and without the RP. Note that with the RP, there is no change in the steady-state DC-link voltage before and after the load transient. This demonstrates the non-invasive property of the proposed RP on the normal functioning of the existing system. Moreover, with the RP, the double-line frequency ripple is mitigated even during the transient intervals, which clearly showcases its fast dynamic capability in mitigating the ripple.

(113) The power consumed by the RP is also examined. Ideally, the RP absorbs only the ripple energy and does not consume power. In practice, however, the RP device has power losses and requires power supplies for its driver and control ICs. Notably, the core loss and copper loss of the inductor L.sub.s is low, since the inductor current for L.sub.s is slowly varying with double the line frequency, and its averaged value is zero. FIG. 25 shows the relative power consumed by the RP against the output power of the AC/DC system ranging from 20 W to 110 W. A maximum value of 5.4% is recorded at light load, while this number decreases to less than 2% at medium and full load.

(114) Since the energy consumed by the RP is from the DC-link, the RP does contribute to efficiency degradation of the AC/DC system. However, the drop of the overall efficiency is insignificant since the ripple power is processed by the film cap Cs that has a low equivalent series resistance (ESR) (when used with RP) instead of the original E-Cap Co that high a high ESR (without RP) as clearly illustrated in the efficiency plots shown in FIG. 25. For the entire power range, the difference in efficiency is small, especially at high power levels. For instance at Po=110 W, the RP causes a 1.34% drop of efficiency.

(115) The RP has an impact in reducing the operational temperature of the components in the main boost PFC rectifier. With the RP, the low-frequency ripple current that flows through the output capacitor Co is reduced, leading to a lower junction temperature of the pre-installed E-Cap. This prolongs the lifetime of the E-Cap. Moreover, by ensuring a constant and ripple-free DC-link voltage, the power losses of all power devices and magnetics of the AC/DC power converters and connected downstream converters is diminished.

(116) FIG. 26 shows the experimentally-captured thermal image of the boost PFC rectifier taken after three hours of operation under free convection with an ambient temperature of 25.4 C., for both with and without the use of RP. In FIG. 26 point a is a plastic cover of an E-Cap Co; point b is an aluminum top cover of E-Cap Co; point c is an output diode Do; point d is a power MOSFET Sb; point e is an input diode bridge D1D4; and point f is a magnetic core of boost inductor Lb. The thermal image is captured using NEC-TH5100 with an emission rate of 0.95. The actual surface temperatures of the respective components are also measured using thermal couplers and a FLUKE data acquisition unit, and are shown in Table II.

(117) TABLE-US-00002 TABLE II MEASURED TEMPERATURE WITH AND WITHOUT RP Temperature Without RP With RP reduction Measured Surface ( C.) ( C.) T ( C.) Point a : plastic cover of E-Cap 42.5 35.0 7.5 C.sub.o Point b: aluminum top of E-Cap 42.2 34.1 8.1 C.sub.o Point c: output diode D.sub.o 50.7 41.4 9.3 Point d: power MOSFET S.sub.b 42.4 33.9 8.5 Point e: input diode bridge 60.0 52.3 7.7 D.sub.1~D.sub.4 Point f: magnetic core of L.sub.b 64.7 54.3 10.4

(118) As expected, when the RP is activated, all power devices, the magnetics, and the E-Cap, have a much lower temperature. All components gain a surface (junction) temperature reduction of more than 7.5 C. Since the operational lifetime of components, especially the power semiconductors and the E-caps, are highly dependent on the junction temperature, the results achievable with the RP given in FIG. 26 are significant considering the large improvement in the overall system reliability. For instance, the expected operational lifetime of an E-Cap is modeled in S. K. Maddula and J. C. Balda, Lifetime of electrolytic capacitors in regenerative induction motor drives, IEEE Power Electronics Specialists Conference, (2005), pp. 153-159; and S. G. Parler, Application guide, aluminum electrolytic capacitors. [Online]. Available: www.cornell-dubilier.com], as

(119) $\begin{array}{cc}L=L_B{M}_v{2}^{\frac{\left(T_M-T_j\right)}{10}}& \left(34\right)\end{array}$
where L is the expected lifetime of the capacitor in hours, L.sub.B is the base lifetime at the maximum permitted junction temperature T.sub.M, M.sub.V is a unit-less voltage multiplier for voltage de-rating, and T.sub.j is the junction temperature of the capacitor. According to Table II, the reduction of surface temperature at Point b with the use of RP is 8.1 C., which by using Equation (34), translates into a 1.75 times boost of the E-Cap's lifetime. Since the E-Cap adopted in the experiment is one that already has a low ESR (see Table I) and a relatively long lifetime, the 1.75 times boost of the lifetime by the RP will be significant for achieving high reliability of such systems.

(120) In FIG. 27, a comparison of the power factor of the AC/DC system with and without the RP is shown. It can be seen that, with the RP, the power factor is slightly improved. According to S. A. Khajehoddin, et al., DC-bus design and control for a single-phase grid-connected renewable converter with a small energy storage component, IEEE Trans. Power Electron., vol. 28, no. 7, pp. 3245-3254, (July 2013), the double-line frequency ripple on the DC-link can introduce third harmonics into the input current by disturbing the reference point of the current control in the AC/DC system. By mitigating this ripple content, the RP can indeed ameliorate the power factor performance of the AC/DC system.

(121) According to the present invention, a plug-and-play Ripple Pacifier (RP) is proposed for stabilizing the DC-link interface of DC utilities and systems such as those involving AC/DC and DC/AC power electronic applications. The proposed RP is simple-to-use, of low cost, and is non-invasive to its host AC/DC systems. It is suitable for the protection of DC utilities/systems and can also be used as a direct replacement for ripple-canceling E-Caps in power converters. Theoretical and experimental work performed on a boost PFC rectification system validates the ripple-mitigation capability of the proposed device. The results show that significant mitigation of the DC-link ripple and significant reduction of operational temperature of the PFC rectifier is achievable with the RP.

(122) The device of the present invention may be programmable. This means that the technical function of the device can be programmed with a specific function. It should be noted, however, that while the plug-&-play device can be a programmable one (such as changing a program of the control function and values of some components in a hardware circuit); it can also be designed specifically without the flexibility of using a programmable design.

(123) The main concept of the invention is to control the plug-&-play device like an emulated impedance or function (Ze) as shown in FIG. 17. For example, such function can be that of a capacitor or an active power filter. If the device is designed as an emulated capacitor so that the plug-&-play device can behave like a voltage ripple pacifier (RP) and if Ze is controlled as a shunt equivalent capacitor, then the dc link voltage V.sub.DC can be well stabilized in scenarios when (a) the instantaneous power is imbalanced between the source and load (b) the instability occurs due to the un-matching impedance from the source and load (c) power dips caused by a sudden load increase.

(124) Such a programmable impedance is realized by controlling the input current of the RP i.sub.f to follow i.sub.f*, a reference current that satisfies

(125) $\begin{array}{cc}{\tilde{i}}_f^{*}\left(s\right)=\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{Z_e\left(s\right)}.& \left(35\right)\end{array}$
where the symbol refers to small ac signals. Therefore, .sub.f* and {tilde over (v)}.sub.DC are the small perturbations of the reference filter current and the DC link voltage, respectively.

(126) A general control block diagram is shown in FIG. 17. Note that the derivation of i.sub.f* from V.sub.DC can be realized in various ways. In the example of emulating a capacitor of C.sub.e, and hence

(127) $\begin{array}{cc}{\tilde{i}}_f^{*}\left(s\right)=\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{Z_e\left(s\right)}=\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{1/\left({\mathrm{sC}}_e\right)},& \left(36\right)\end{array}$

(128) It can be obtained through an analogue differentiator circuit, according to Equation (36). This method has been proposed in X. Zhang et al., Adaptive Active Capacitor Converter for Improving Stability of Cascaded DC Power Supply System, IEEE Trans. Power Electron., vol. 28, no. 4, pp. 1807-1816, (April 2013), although it is used only for stabilizing an impedance-unmatched cascaded system. However, using a differentiator would lead to noise issues in electronic circuits. A better approach to obtain i.sub.f*, is shown in FIG. 18(a) for the shunt plug-&-play device. It uses a small impedance C.sub.o in parallel with the DC-bus, and then amplifies its current i.sub.Co by K times for i.sub.L1 to follow. In this way, the expected i.sub.f* would be
i.sub.f*=i.sub.C.sub.o+i.sub.L1=i.sub.C.sub.o+Ki.sub.C.sub.oKi.sub.C.sub.o,(37)
where K>>1 is assumed. Consequently, Z.sub.e would be

(129) $\begin{array}{cc}{Z}_e\left(s\right)=\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{{\tilde{i}}_f^{*}\left(s\right)}=\frac{1}{K}\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{{\tilde{i}}_{\mathrm{Co}}\left(s\right)}=\frac{1}{s\left({\mathrm{KC}}_o\right)}.& \left(38\right)\end{array}$

(130) Equation (38) indicates that the emulated impedance Z.sub.e is equivalent to a capacitor that has a capacitance of KC.sub.o. For example, if C.sub.o=10 F, and K=70, then Z.sub.e is emulating a 700 F capacitor. While C.sub.o should be a small capacitor in the device, it should also be noted that the other capacitor C.sub.s used in FIG. 18(a) is also much smaller than the emulated capacitor Z.sub.e. The reason is that the voltage across C.sub.s is allowed to rise to a level (v.sub.c) which is much higher than V.sub.DC. Based on the law of conservation of energy, the energy stored in the emulated capacitor is Z.sub.e v.sub.DC.sup.2C.sub.sv.sub.c.sup.2. Therefore, Z.sub.e>C.sub.s for v.sub.c>V.sub.DC. In general, non-electrolytic capacitors are used for C.sub.o and C.sub.s because their capacitance sizes are small.

(131) In FIG. 18 (a), an outer voltage control loop is incorporated (as indicated in by Vc) to regulate the averaged voltage for the capacitor Cs. In this way, the RP consumes only a very small amount of power that is used to compensate the power losses in RP. No extra DC power is consumed or generated.

(132) Essentially, the if* is derived indirectly from V.sub.DC, taking advantage of the small Co across the DC-bus. As shown in FIG. 18, the voltage across C.sub.s is compared to a reference. The difference voltage is applied to a proportional-integral (PI) controller to generate a current that is compared to the current though capacitor C.sub.o. This difference is compared to the current through inductor L.sub.1 to generate the signal for the current controller. This method makes the implementation simple, without complicated analogue circuit design, which could easily be interfered with by switching noises.

(133) In this invention, the concept of emulating an impedance or a function can be further generalized. If i.sub.Co is amplified by a general transfer function of G.sub.e(s), as shown in FIG. 18 (b), Z.sub.e can be derived as

(134) $\begin{array}{cc}{Z}_e\left(s\right)=\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{{\tilde{i}}_f^{*}\left(s\right)}=\frac{1}{G_e\left(s\right)}\frac{{\tilde{v}}_{\mathrm{DC}}\left(s\right)}{{\tilde{i}}_{\mathrm{Co}}\left(s\right)}=\frac{1}{s\left[G_e\left(s\right)C_o\right]}.& \left(39\right)\end{array}$

(135) Equation (39) implies that Z.sub.e can be programmed to emulate a resistor, inductor, and even a non-linear device, if G.sub.e(s) is selected properly. Therefore, by designing or programming Ge(s) as a function desirable for an application, this plug-&-play device can be plugged into the dc voltage link of a power electronics system or a dc power grid to provide its designed function. Therefore, the control scheme with the G.sub.e(s) as a programmable function in FIG. 18(b) is more general than the specified case of G.sub.e(s)=K in FIG. 18(a).

(136) The general control scheme in FIG. 18 (b) forms the core element of this invention. If the general function Ge(s) is programmed as Ge(s)=K, the effect of providing an emulated capacitor is shown in FIG. 19, which illustrates the actual capacitance of Co used in the circuit and an emulated capacitor C.sub.emulated (KCo) in the frequency domain.

(137) In practice, the active filter can be improved by using a second-order low-pass filter (or any other type of filter), as long as the switching ripple of the switched mode converter forming the shunt plug-&-play device is filter off. When G.sub.e(s) is designed as a 2.sup.nd order low-pass filter:

(138) $\begin{array}{cc}{G}_e\left(s\right)=K\frac{{}_c^2}{\underset{\mathrm{LPF}}{\underset{}{s^2+2*0.7*{}_c+{}_c^2}}}& \left(40\right)\end{array}$
where K=50, .sub.c=2*pi*1 kHz and C.sub.o=10 F and C.sub.s=20 F.

(139) Note that the low-pass filter is typically required in a practical implementation in order to suppress the switching ripples in the sensed capacitor current i.sub.Co. When the effect of the low-pass filter (LPF) part in Equation (40) to the emulated capacitance can be neglected, the relationship between the ideal capacitance of C.sub.o and the emulated capacitor C.sub.emulated is consistent with FIG. 19. FIG. 20 shows the theoretical bode plot of the magnitude and phase of the full function in Equation (40) (the effect of the low-pass filter is included).

(140) To further improve the filter characteristic for application in which the double mains frequency is present, the active filter can also be programmed with extra filtering effect for the double mains frequency. This can be achieved by programming the plug-&-play device with a low-pass filter function and a proportional-resonant function (with the resonant frequency set at the double mains frequency).

(141) When G.sub.e(s) is set as a 2.sup.nd order low-pass filter plus a proportional resonant function:

(142) $\begin{array}{cc}{G}_e\left(s\right)=K\frac{{}_c^2}{\underset{\mathrm{LPF}}{\underset{}{s^2+2*0.7*{}_c+{}_c^2}}}\underset{\underset{\mathrm{RP}}{}}{\left(k_p+\frac{k_i{}_{c2}s}{s^2+{}_{c2}s+{}_r^2}\right)}& \left(41\right)\end{array}$
where K=50, .sub.c=2*pi*1 kHz, .sub.r=2*pi*100 (where 100 Hz is the double mains frequency for a 50 Hz mains) and C.sub.o=10 F. With this arrangement the plug-&-play device can be programmable or designed with specific functions.

(143) Instability might happen when the output impedance Zout of the source converter is larger than the input impedance of Zin (i.e. violating the Middlebrook criterion), even though each converter is individually designed to be stable on its own. After the RP (emulating a 700 f capacitor) is used, the peak value of Zout is attenuated below Zin, thereby a stable V.sub.DC.

(144) The elements of the embodiments described above can be combined to provide further embodiments. These and other changes can be made to the system in light of the above detailed description. While the invention has been particularly shown and described herein, with reference to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.