Square-law companding apparatus based on nonlinear operations on modulated bit-stream

Abstract

Disclosed are four independent circuits for compression, expansion, companding, and post-processing of a compressed delta-sigma bit-stream. Compression and expansion are based on the use of a second-order (or higher-order) delta-sigma modulator, and a nonlinear operation on a delta-sigma modulated bit-stream. Depending on application, the disclosed circuits can operate as a stand-alone integrated circuit, or as compandor apparatus as proposed. Inherited low-pass filter can be digital or analog. Thus, the only external analog component to the IC chip could be a capacitor C, when low-frequency analog signal is compressed or expanded.

Claims

1. A compressor apparatus comprising: a second-order or higher-order delta-sigma modulator; a comparator to convert bipolar delta modulated bit-stream D into unipolar bit-stream Xn; a rectifying encoder, which consists of a D flip-flop and XNOR gate, and accept bit-streams X.sub.n and X.sub.n-1 to produces rectified signal Y.sub.n; a feedback low-pass filter, for filtering (smoothening) a unipolar bit-stream Y.sub.n, and produces analog signal y(t); an analog inverter circuit to invert analog signal y(t), and produce y(t) signal; an amplitude modulator whose inputs are high-frequency digital signal D, analog signals y(t), y(t), and the output signal of the amplitude modulator is a(t), which goes to the negative input of the - modulator; and a low-pass filter for demodulation of a compressed bit-stream D.

2. An expander apparatus comprising: a second-order or higher-order delta-sigma modulator; a comparator to convert bipolar delta modulated bit-stream into unipolar bit-stream; a rectifying encoder, which consists of a D flip-flop and XNOR gate; a low-pass filter for smoothing unipolar digital signal Y.sub.n; an analog inverter circuit to invert analog signal y(t), and produce y(t) signal; an amplitude modulator with inputs D, y(t), y(t); and a low-pass filter to smooth the output of the amplitude modulator, and produce filter out expanded signal e(t).

3. A compandor apparatus comprising: a compressor of claim 1, whose analog input signal is x(t), produces a polar compressed bit-stream D; and an expander of claim 2, whose input is directly connected to delta-modulated output of compressor (signal D) and produces expanded signal e(t)=x(t).

4. An apparatus for post-processing of a compressed digital bit-stream comprising: an input summing circuit to add analog input signal x(t) and analog feedback signal y(t); a delta-sigma compressor of claim 1, to compress the sum of two analog signals; a programmable digital delay line to create different acoustic effects; a clock oscillator; an expander of claim 2 to obtain an analog signal y(t); an output summing circuit; and an amplifier or attenuator.

Description

BRIEF DESCRIPTION OF DRAWINGS

(1) FIG. 1 shows a block diagram of the compressor circuit.

(2) FIG. 2 shows an amplitude modulated signal a(t).

(3) FIG. 3 shows an input signal x(t) and compressed signal c(t).

(4) FIG. 4 shows a transfer function of compressor.

(5) FIG. 5 shows a block diagram of the expander circuit.

(6) FIG. 6 shows an input signal x(t) and expanded e(t).

(7) FIG. 7 shows a transfer function of the expander.

(8) FIG. 8 shows a block diagram of the compander.

(9) FIG. 9 shows relevant waveforms of the compander.

(10) FIG. 10 shows a transfer function of the compander.

(11) FIG. 11 shows a block diagram of post-processor of a compressed signal.

(12) FIG. 12 shows a digital programmable delay line.

DETAILED DESCRIPTION OF THE INVENTION

(13) Definition

(14) A compander consists of compressor and expander circuits. It is an essential part in the telecommunication industry (telephony, TV, radio) and the sound recording industry. A compressor is used to reduce a dynamic the range of the signal (makes a quiet signal louder). The dynamic range of the signal is defined as a ratio of an amplitude of loud and quiet signal (D=V.sub.max/V.sub.min). For example, a dynamic range of a voice signal is 1,000:1 (about 60 dB in average). The expander reverses the process and makes a signal quiet again (expands the dynamic range). Both processes are highly nonlinear. Transfer function of the expander is a parabola (Vo=(Vin).sup.2), and of compressor is Vo=square root(Vin). A compressor introduces signal distortion at higher input levels. The inverse function of expander generates a final output signal without distortion. Implementation of both processes is based on a non-conventional use of a - modulation and nonlinear processing of its bit-stream.

(15) The Best Mode of Invention

(16) The block diagram of the circuits with supporting simulation results are presented; herein shall be presented as the best mode contemplated by the inventor.

(17) How to Make the Invention

(18) As can be amply seen from the drawings, every circuit presents an independent invention. Thus, it is necessary to describe every invention separately.

(19) FIG. 1 shows a block diagram of a square-law compressor circuit. Analog input signal x(t) is delta-sigma modulated using a second order - modulator (1). Polar digital bit-stream D is rectified (2) to produce unipolar bit-stream X.sub.n of zeros and ones. This signal is delayed in a D flip-flop (3) for one clock period to produce delayed signal X.sub.n-1. Both X.sub.n and X.sub.n-1 are delivered to the XNOR gate (4) to produce a rectified - bit-stream Y.sub.n. Bit stream Y.sub.n is low-pass filtered (LPF) in (5). Output of LPF (y(t)), is inverted in (6), and modulated by the polar - bit-stream D in SW (7), to produce amplitude modulated (AM) signal a(t). This signal is fed back to the input of the second-order - modulator to produce compressed - bit-stream D. One can see that the compressor presents a negative feedback closed loop system. It can be used as independent stand-alone system, or in some applications in combination with the expander.

(20) FIG. 2 shows AM signal a(t). One can clearly see embedded signal D (carrier) into the envelope of low-pass signal y(t).

(21) FIG. 3 shows a relevant waveform of a compressor circuit. Input signal is x(t)=(e{circumflex over ()}(t))*sin(t), and its compressed version is signal c(t) (which is demodulated polar signal D). One can see a slight compression at higher levels of input signal, while significant increase of amplitude at lower levels of input. Compression ratio is 2:1.

(22) FIG. 4 shows a transfer (nonlinear) function of compressor. One can see a closed agreement of simulation with a theoretical nonlinear function, c(t)=sqroot(x(t)).

(23) FIG. 5 shows a block diagram of a square-law expander circuit. Analog signal x(t) is fed in a second-order - modulator (16). Its output polar bit-stream is rectified to obtain unipolar bit stream X.sub.n. Both X.sub.n and delayed bit-stream X.sub.n-1 are fed into XNOR gate (11) to obtain rectified bit-stream Y.sub.n. This bit-stream is low-pass filtered (12), and an analog signal y(t) is obtained. Both signal y(t) and y(t) are fed into multiplying SW (14), and after low-pass filtering (15) expanded signal e(t) is obtained. One can see substantial difference between compressor circuit (FIG. 1) and expander circuit (FIG. 5). Expander circuit is an open loop system (- modulator in FIG. 5 does not have an external negative feedback), while compressor's - modulator has a negative feedback signal a(t). When compressor and expander circuits are connected back-to-back, as in FIG. 8, then no need for - modulator in the expander circuit.

(24) FIG. 6 shows the case when compressed signal c(t) (in FIG. 3) is expanded to obtain signal e(t). One can see a good agreement between the original signal x(t) and the expanded signal c(t), which is signal e(t). One notices, a slight delay of signal e(t) because of low-pass filtering process in compressor and expander circuits.

(25) FIG. 7 shows the expander's quadratic (nonlinear) transfer function. One sees a close agreement between theoretical (c(t)=x(t){right arrow over ()}2), and simulation results.

(26) FIG. 8 shows a block diagram of the back-to-back connection of compressor and expander circuits. Their operation is described in the preceding paragraphs. This connection presents the compander circuit with possible application in companded pulse code modulation (PCM) systems [17]. Because delta modulated digital signal D is transmitted in a digital form (dashed transmission line) no need for - modulator in expander circuit. A compressed polar bit-stream D is directly connected to the SW (14) and to the comparator circuit (9) to obtain a unipolar bit stream X.sub.n.

(27) FIG. 9 shows relevant waveforms of the proposed system for the square-law compander of an analog signal. It is noted that an input signal x(t), after compression, undergoes change where low-level input amplitudes are amplified, while high-level input amplitudes are slightly attenuated (signal c(t)). After expanding compressed bit-stream D, identical signal e(t)=x(t) is obtained.

(28) FIG. 10 shows an overall transfer function of a compander. There is a close agreement between theory and simulation.

(29) FIG. 11 shows a block diagram of a companding system for post processing of a compressed signal. The use of the compressor can make pop recordings, or live sound mixes sound musically better by controlling maximum level and maintaining higher average loudness. In addition, it helps in reducing a noise and it can alter a sound signal by introducing a cyclically varying phase shift into one of two identical copies of the signal and recombining them. Companding is used especially in popular music to alter the sound of an instrument. Existing post-processing schemes are too complex, and existing analog lines are prone to noise (Bucket Brigade Devices-BBD) [5], [6]. The proposed post-processing companding system simplifies existing systems by avoiding low-pass filters and BBD analog delay line. The proposed post-processor consists of two analog summing circuits (1) and (5), a - compressor circuit (2), a programmable delay line (3), a - expander circuit (4), clock oscillator, and an amplifier (or an attenuator) (6). A second-order - compressing and expanding circuit is used, but it can be employed any higher-order - modulator. Noteworthy is that the proposed digital post-processing apparatus does not require an analog BBD, a low-pass filter after the compressor and before an expander [5], [6].

(30) FIG. 12 shows a programmable digital delay line, implemented by D flip-flops (n-bit shift register), controlled with a high precision digital clock oscillator. A delay line (3) accepts compressed bit-stream B, and outputs delayed bit-stream C to the - expander (4). Expanded signal y(t) is added to the input signal x(t) in (1) and (5).

(31) How to Use the Invention

(32) The basic idea of an oversampled - modulator, which converts a bandlimited analog signal to a binary pulse train, is to surround a one-bit quantizer with feedback loops. Its operation is well understood and described in published literature [12], [13]. - modulators are known as noise shaping modulators, because a large quantization noise is shaped by the feedback loops in such a way that most of the noise energy is moved out of the baseband to reside at higher frequencies. Even though that the signal and quantization noise share the same pulse train, they occupy a different section of the spectrum. When the modulator is oversampled, the signal and noise sections of the spectrum are wider apart. Thus, the restoration of the signal to its analog form is easier to achieve. Current - modulators can achieve resolution of 24 bit, and signal-to-quantization noise over 100 dB. In addition, - modulators are known as oversampling or pulse density modulators because a density of the ones and zeros in the output binary sequence reflects the ratio between the instantaneous slow changing (relative to the sampling frequency) input signal amplitude and the modulator's reference voltage. Scaling the reference voltage can therefore scale the pulse density. If the reference voltage in a modulator is replaced by another signal, the output pulse density reflects the input signal divided by the reference signal. The modulator, therefore, could be used to perform division [14]. On the other hand, if a - modulator output is used to switch another voltage reference to the input of some sample and hold circuit (which is in effect a demodulator) the resulting output is proportional to the voltage reference being switched. If one replaces this reference with another signal, the result would be the multiplication of two signals. Such an observation has led to an unconventional use of - oversampling for the construction of multiplier less compressors and expanders [7], [8], [9], [14], [15]. Pioneering work of unconventional linear signal processing (addition/subtraction, multiplication by a constant less than one), using - modulation, is first reported by Kouvaras [16]. However, use of nonlinear operations, such as squaring and rectification of a - density bit-stream is a novelty of the proposed inventions. Squaring and rectification operations, performed on a - bit stream, are reported in references [11]. The newly proposed circuits of compression, expansion, companding, and post-processing of compressed signal can be used in numerous applications such as in speech and music processing, telecommunications (telephony), adaptive linearization of a RF power amplifier (PA) using predistortion (compression), automatic gain control AGC), sensor applications, etc. In addition, a one-bit compressed - bit-stream can be easily encrypted/scrambled to add additional difficulty for intended interceptor.