Substrate for semiconductor device, semiconductor device, and method for manufacturing semiconductor device
10553674 ยท 2020-02-04
Assignee
Inventors
- Ken SATO (Miyoshi-machi, JP)
- Hiroshi Shikauchi (Niiza, JP)
- Hirokazu GOTO (Minato-ku, JP)
- Masaru Shinomiya (Annaka, JP)
- Keitaro Tsuchiya (Takasaki, JP)
- Kazunori Hagimoto (Takasaki, JP)
Cpc classification
H01L29/7787
ELECTRICITY
H01L29/66462
ELECTRICITY
H01L29/0638
ELECTRICITY
H01L21/0262
ELECTRICITY
H01L29/7786
ELECTRICITY
International classification
H01L21/02
ELECTRICITY
H01L29/66
ELECTRICITY
H01L29/778
ELECTRICITY
Abstract
A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.
Claims
1. A substrate for semiconductor device comprising: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, and a high-resistance layer between the buffer layer and the device active layer, wherein: the buffer layer contains carbon and iron, an iron concentration of the buffer layer decreases along a direction from the substrate toward the device active layer, an iron concentration of an upper surface of the buffer layer is lower than an iron concentration of a lower surface of the buffer layer, a carbon concentration of the buffer layer increases along the direction from the substrate toward the device active layer, a carbon concentration of the upper surface of the buffer layer is higher than a carbon concentration of the lower surface of the buffer layer, the lower surface of the buffer layer is located in a lower portion of the buffer layer on a substrate side of a position at which the iron concentration starts decreasing, the carbon concentration of the lower surface of the buffer layer is 110.sup.17 atoms/cm.sup.3 or more, and a maximum value of a carbon concentration of the high-resistance layer is equal to or higher than a maximum value of the carbon concentration of the buffer layer.
2. The substrate for semiconductor device according to claim 1, wherein a sum of the carbon concentration and the iron concentration of the upper surface of the buffer layer is not lower than a sum of the carbon concentration and the iron concentration of the lower surface of the buffer layer.
3. The substrate for semiconductor device according to claim 1, wherein the buffer layer is a stacked body of AlGaN layers having different compositions or a stacked body of an AlN layer and a GaN layer.
4. The substrate for semiconductor device according to claim 2, wherein the buffer layer is a stacked body of AlGaN layers having different compositions or a stacked body of an AlN layer and a GaN layer.
5. The substrate for semiconductor device according to claim 1, wherein the carbon concentration of the high-resistance layer is not lower than the carbon concentration of the buffer layer.
6. The substrate for semiconductor device according to claim 2, wherein the carbon concentration of the high-resistance layer is not lower than the carbon concentration of the buffer layer.
7. The substrate for semiconductor device according to claim 3, wherein the carbon concentration of the high-resistance layer is not lower than the carbon concentration of the buffer layer.
8. The substrate for semiconductor device according to claim 4, wherein the carbon concentration of the high-resistance layer is not lower than the carbon concentration of the buffer layer.
9. The substrate for semiconductor device according to claim 5, wherein the high-resistance layer is made of GaN having a thickness of 500 nm or more.
10. The substrate for semiconductor device according to claim 6, wherein the high-resistance layer is made of GaN having a thickness of 500 nm or more.
11. The substrate for semiconductor device according to claim 7, wherein the high-resistance layer is made of GaN having a thickness of 500 nm or more.
12. The substrate for semiconductor device according to claim 8, wherein the high-resistance layer is made of GaN having a thickness of 500 nm or more.
13. The substrate for semiconductor device according to claim 1, wherein the buffer layer is a stacked body of an AlN layer and a GaN layer, and each layer of the stacked body has a thickness of 0.5 nm or more and 300 nm or less.
14. The substrate for semiconductor device according to claim 2, wherein the buffer layer is a stacked body of an AlN layer and a GaN layer, and each layer of the stacked body has a thickness of 0.5 nm or more and 300 nm or less.
15. The substrate for semiconductor device according to claim 3, wherein the buffer layer is a stacked body of an AlN layer and a GaN layer, and each layer of the stacked body has a thickness of 0.5 nm or more and 300 nm or less.
16. A semiconductor device comprising the substrate for semiconductor device according to claim 1, wherein: the device active layer further comprises: a channel layer made of a nitride semiconductor; and a barrier layer made of a nitride semiconductor having a different band gap from that of the channel layer, and the semiconductor device further comprises an electrode which is electrically connected with a two-dimensional electron gas layer formed near an interface between the channel layer and the barrier layer.
17. A substrate for semiconductor device comprising: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; a device active layer which is provided on the buffer layer and made of a nitride semiconductor, and a high-resistance layer between the buffer layer and the device active layer, wherein: the buffer layer includes a region where a carbon concentration increases and an iron concentration decreases along a direction from the substrate side toward the device active layer, an iron concentration of an upper surface of the buffer layer is lower than an iron concentration of a lower surface of the buffer layer, a carbon concentration of the upper surface of the buffer layer is higher than a carbon concentration of the lower surface of the buffer layer, the lower surface of the buffer layer is located in a lower portion of the buffer layer on a substrate side of a position at which the iron concentration starts decreasing, the carbon concentration of the lower surface of the buffer layer is 110.sup.17 atoms/cm.sup.3 or more, and a maximum value of the carbon concentration of the high-resistance layer is equal to or higher than a maximum value of the carbon concentration of the buffer layer.
18. A semiconductor device comprising the substrate for semiconductor device according to claim 17, wherein: the device active layer further comprises: a channel layer made of a nitride semiconductor; and a barrier layer made of a nitride semiconductor having a different band gap from that of the channel layer, and the semiconductor device further comprises an electrode which is electrically connected with a two-dimensional electron gas layer formed near an interface between the channel layer and the barrier layer.
19. A method for manufacturing a semiconductor device, comprising: forming a buffer layer made of a nitride semiconductor on a substrate; forming a device active layer on the buffer layer; forming a high-resistance layer between the buffer layer and the device active layer such that a maximum value of a carbon concentration of the high-resistance layer becomes equal to or higher than a maximum value of a carbon concentration of the buffer layer; and forming an electrode on the device active layer, wherein: the buffer layer contains carbon and iron, and is formed such that: (i) a carbon concentration of the buffer layer increases along a direction from the substrate toward the device active layer, (ii) a carbon concentration of an upper surface of the buffer layer becomes higher than a carbon concentration of a lower surface of the buffer layer, (iii) an iron concentration decreases along the direction from the substrate toward the device active layer, and (iv) an iron concentration of the upper surface of the buffer layer becomes lower than an iron concentration of the lower surface of the buffer layer, a lower surface of the buffer layer is formed before decreasing an iron doping amount along the direction from the substrate toward the device active layer, and the carbon concentration of the lower surface of the buffer layer is set to 110.sup.17 atoms/cm.sup.3 or more.
20. The method for manufacturing a semiconductor device according to claim 19, wherein forming the buffer layer includes forming a stacked body of AlGaN layers having different compositions or a stacked body of an AlN layer and a GaN layer.
Description
BRIEF DESCRIPTION OF DRAWINGS
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BEST MODE(S) FOR CARRYING OUT THE INVENTION
(14) As described above, the present inventors have discovered that, in an Fe-doped buffer layer structure, a leak current in a longitudinal direction can be suppressed, but a leak current in a lateral direction increases at the time of a high-temperature operation.
(15) Thus, the present inventors have keenly studied a substrate for semiconductor device which can reduce the leak current in the lateral direction at the time of the high-temperature operation while suppressing the leak current in the longitudinal direction at the time of a room-temperature operation. As a result, the present inventors have found out that increasing a concentration of carbon rather than that of iron is preferable for the leak current in the lateral direction at the time of the high-temperature operation, and that when the carbon concentration of the upper surface of the buffer layer is set to be higher than the carbon concentration of the lower surface of the buffer layer, and the iron concentration of the upper surface of the buffer layer is set to be lower than the iron concentration of the lower surface of the buffer layer considering that a leak current suppressing effect in the longitudinal direction of iron is higher that of carbon at the time of both the room-temperature operation and the high-temperature operation, the leak current in the lateral direction at the time of the high-temperature operation can be reduced by decreasing the iron concentration on the upper surface side of the buffer layer (e.g., near an interface between the buffer layer and a high-resistance layer) which is a cause of a leak in the lateral direction at the time of the high-temperature operation, while suppressing an increase in leak current in the longitudinal direction at the time of the room-temperature operation or the high-temperature operation, thereby bringing the present invention to completion.
(16) An example of an embodiment of the present invention will now be described hereinafter in detail with reference to the drawings, but the present invention is not restricted thereto.
(17) An example of an embodiment of an inventive substrate for semiconductor device will first be described with reference to
(18) A substrate for semiconductor device 10 shown in
(19) Here, the silicon-based substrate 12 is a substrate made of, e.g., Si or SiC.
(20) An initial layer 13 made of AlN may be provided between the silicon-based substrate 12 and the buffer layer 15.
(21) As shown in
(22) The buffer layer 15 contains carbon and iron as impurities, and a carbon concentration of an upper surface of the buffer layer 15 is higher than that of a lower surface of the buffer layer 15, and an iron concentration of the upper surface of the buffer layer 15 is lower than that of the lower surface of the buffer layer 15. Further, in the buffer layer 15, a region where the carbon concentration increases and the iron concentration decreases from the substrate 12 side toward the device active layer 29 is provided.
(23) When the buffer layer 15 has such an impurity concentration distribution as described above, the iron concentration near the upper surface of the buffer layer which is a cause of a leak in a lateral direction at the time of a high-temperature operation can be reduced while maintaining high resistance of the buffer layer 15, and hence a leak current in the lateral direction at the time of the high-temperature operation can be reduced while suppressing the leak current in the longitudinal direction.
(24) It is to be noted that the iron concentration of the lower surface of the buffer layer 15 can be set to 110.sup.18 atoms/cm.sup.3 or more.
(25) The first layers 17 are, e.g., Al.sub.xGa.sub.1-xN layers, and the second layers 18 are, e.g., Al.sub.yGa.sub.1-yN layers (x>y). Here, the first layers 17 can be AlN layers (i.e., x=1), and the second layers 18 can be GaN layers (i.e., y=0). Furthermore, the thickness of each of the layers 17 and 18 can be set to 0.5 nm or more and 300 nm or less.
(26) As layers having lattice constants different from each other, such layers as described above can be preferably used.
(27) The channel layer 26 is, e.g., a GaN layer, and the barrier layer 27 has a band gap different from that of the channel layer 26 and is, e.g., an AlGaN layer.
(28) Here, the substrate for semiconductor device 10 can further include a high-resistance layer 16 between the buffer layer 15 and the device active layer 29, and the high-resistance layer 16 is, e.g., a GaN layer having a thickness of 500 nm or more, more preferably 1 m or more which is larger than a thickness of each layer in the buffer layer 15. As the high-resistance layer, GaN having the above-described thickness can be preferably used. A maximum value of the carbon concentration of the high-resistance layer 16 may be set equal to or higher than a maximum value of the carbon concentration of the buffer layer 15.
(29) When the high-resistance layer having such a carbon concentration distribution is provided, the leak current in the longitudinal direction can be assuredly suppressed.
(30) Here, it is preferable that a sum of the carbon concentration and the iron concentration of the upper surface of the buffer layer 15 is not lower than a sum of the carbon concentration and the iron concentration of the lower surface.
(31) When the buffer layer 15 has the above-described impurity concentration distribution, the leak current in the lateral direction at the time of the high-temperature operation can be more surely suppressed while suppressing the leak current in the longitudinal direction of the buffer layer 15.
(32) An example of an embodiment of an inventive semiconductor device will now be described with reference to
(33) A semiconductor device 11 shown in
(34) The source electrode 30 and the drain electrode 31 are arranged in such a manner that a current flows from the source electrode 30 to the drain electrode 31 through a two-dimensional electron gas layer 28 formed in the channel layer 26. The current flowing between the source electrode 30 and the drain 31 can be controlled by an electric potential which is applied to the gate electrode 32.
(35) The semiconductor device having such a structure can be a semiconductor device which can reduce a leak current in the lateral direction at the time of the high-temperature operation while suppressing the leak current in the longitudinal direction. Additionally, the semiconductor device having such a structure can improve a current collapse phenomenon.
(36) An example of an embodiment of an inventive method for manufacturing a semiconductor device will now be described with reference to
(37) First, the silicon-based substrate (a substrate) 12 is prepared (see
(38) Specifically, as the silicon-based substrate 12, a silicon substrate or an SiC substrate is prepared. The silicon substrate or the SiC substrate is generally used as a growth substrate for a nitride semiconductor layer.
(39) Then, a lower buffer layer 15a formed of a nitride semiconductor layer containing iron and carbon and an upper buffer layer 15b formed of a nitride semiconductor layer which has a lower iron concentration than that of the lower buffer layer 15a or does not contain the iron, and which has a higher carbon concentration than that of the lower buffer layer 15a are formed on the silicon-based substrate 12 in the mentioned order by epitaxial growth (see
(40) It is to be noted that the iron concentration of the lower surface of the buffer layer 15 can be set to 110.sup.18 atoms/cm.sup.3 or more. Further, the carbon concentration of the lower surface of the buffer layer 15 can be set to 110.sup.17 atoms/cm.sup.3 or more.
(41) As the lower buffer layer 15a and the upper buffer layer 15b, a stacked body of AlGaN layers having different compositions or a stacked body of an AlN layer and a GaN layer can be formed.
(42) As the lower buffer layer 15a and the upper buffer layer 15b, the above-described stacked body can be preferably formed.
(43) It is to be noted that, before forming the lower buffer layer 15a, the AlN initial layer 13 may be formed.
(44) Then, on the buffer layer 15, the high-resistance layer 16 made of a nitride semiconductor which has an iron concentration lower than that of the lower surface of the lower buffer layer 15a or does not contain the iron, and which has a carbon concentration equal to or higher than that of the upper surface of the upper buffer layer 15b can be formed by the epitaxial growth (see
(45) It is to be noted that control over the concentration of Fe can be performed by flow volume control of Cp.sub.2Fe (biscyclopentadienyl iron) in addition to an auto-dope effect based on segregation.
(46) Furthermore, although addition of the carbon is performed by taking the carbon contained in a source gas (TMG (trimethylgallium) or the like) into a film when a nitride-based semiconductor layer is grown by an MOVPE (metal organic vapor phase epitaxy) method, it can be also performed by using a doping gas such as propane.
(47) Then, the device active layer 29 made of a nitride semiconductor is formed on the high-resistance layer 16 by the epitaxial growth (see
(48) Specifically, the channel layer 26 made of GaN and the barrier layer 27 made of AlGaN are formed on the high-resistance layer 16 in the mentioned order by the MOVPE method. A film thickness of the channel layer 26 is, e.g., 500 to 4000 nm, and a film thickness of the barrier layer 27 is, e.g., 10 to 50 nm.
(49) In this manner, the substrate for semiconductor device 10 shown in
(50) Then, the electrodes are formed on the device active layer 29 (see
(51) Specifically, the source electrode 30, the drain electrode 31, and the gate electrode 32 are formed on the barrier layer 27 of the substrate for semiconductor device 10. The source electrode 30 and the drain electrode 31 are formed in such a manner that a current flows from the source electrode 30 to the drain electrode 31 through the two-dimensional electron gas layer 28 formed in the channel layer 26.
(52) Each of the source electrode 30 and the drain electrode 31 can be formed of, e.g., a Ti/Al stacked layer film, and the gate electrode 32 can be formed of a stacked layer film of a lower film constituted of an insulator film of SiO, SiN, or the like and an upper film made of a metal such as Ni, Au, Mo, or Pt.
(53) In this manner, the semiconductor device 11 in
(54) When such a method for manufacturing a semiconductor device is used, it is possible to manufacture the semiconductor device which can reduce the leak current in the lateral direction at the time of the high-temperature operation while suppressing the leak current in the longitudinal direction and has a high breakdown voltage in an actual operation.
EXAMPLES
(55) Although the present invention will now be more specifically described hereinafter with reference to an Example and Comparative Examples, the present invention is not restricted thereto.
Example
(56) The substrate for semiconductor device 10 in
(57) Then, the semiconductor device 11 in
(58) In a case where the source electrode 30 was electrically connected with the silicon-based substrate 12 in the fabricated semiconductor device 11, leak current characteristics at 150 C. (i.e., at the time of a high-temperature operation) were measured.
(59) Further, in the case where the source electrode 30 was electrically connected with the silicon-based substrate 12 in the fabricated semiconductor device 11, the leak current characteristics at the time of a room-temperature operation were measured.
Comparative Example 1
(60) The substrate for semiconductor device in
(61) The semiconductor device in
(62) In the case where the source electrode was electrically connected with the silicon-based substrate in the fabricated semiconductor device, the leak current characteristics at the time of the room-temperature operation were measured.
(63) Furthermore, the leak current characteristics of the fabricated semiconductor device at 150 C. (i.e., at the time of the high-temperature operation) were measured in the same manner as in
Comparative Example 2
(64) The substrate for semiconductor device in
(65) The semiconductor device in
(66) The leak current characteristics of the fabricated semiconductor device at the time of the room-temperature operation were measured in the same manner as in
(67) Moreover, the leak current characteristics of the fabricated semiconductor device at 150 C. (i.e., at the time of the high-temperature operation) were measured in the same manner as in
(68) As can be understood from
(69) As can be understood from
(70) It is to be noted that the present invention is not restricted to the embodiment. The embodiment is an illustrative example, and any example which substantially has the same structure and exerts the same functions and effects as the technical concept described in claims of the present invention is included in the technical scope of the present invention.