AMPLIFIER WITH A SYMMETRIC CURRENT PROFILE

Abstract

An assembly of an amplifier and a power source. The current output of the amplifier, for any load, is the same for the same output voltage, irrespective of the sign of the voltage. This symmetry removes the even portions of the distortion.

Claims

1. An amplifier with an input, an output and a power connection, the amplifier being configured to: receive from the power connection a first current not exceeding a first predetermined maximum current, deliver from the output a second predetermined maximum current being lower than the first predetermined maximum current, and receive on the output a current not exceeding a third predetermined maximum current, where the second predetermined maximum current is between 0.8 and 1.2 times the third predetermined maximum current.

2. An amplifier according to claim 1, comprising an amplifier stage connected to the input and the output, wherein the power connection comprises a first and a second electrical conductor, where a first limiter connects the first conductor to the amplification stage so as to limit any current flowing from the first conductor to the amplification stage to a first predetermined current.

3. An amplifier according to claim 1, comprising an amplifier stage connected to the input and the output, wherein the power connection comprises a first and a second electrical conductor, where a second limiter connects the second conductor to the amplification stage so as to limit any current flowing from the amplification stage to the second conductor to a second predetermined current.

4. An amplifier according to claim 1, the amplifier comprising: a first amplifier having a first input connected to the input and a first output connected to the output, and a second amplifier having a second input connected to the input and a second output connected to the output, where the first and second amplifiers are configured so that: the first amplifier is configured to receive, at the first output, a first, maximum current and to deliver, from the first output, a second current exceeding 1.2 times the first, maximum current, the second amplifier is configured to deliver, from the second output, a third, maximum current and to receive at the second output, a fourth current exceeding 1.2 times the third, maximum current, when a third current is received by the output, a first portion of the third current received by the first output exceeds a second portion of the third current received by from the second output and when fourth current is delivered from the output, a third portion of the fourth current delivered from the second output exceeds a fourth portion of the fourth current delivered from the first output.

5. An assembly comprising an amplifier according to claim 1 and a load connected to the output.

6. An assembly according to claim 5, being configured to, for each voltage, between 0V and a predetermined maximum voltage, provided on the output, a current fed to the load from the output is between 0.8 and 1.2 times a current received by the output when the predetermined maximum voltage, negative, is provided on the output.

7. An assembly of a power source and an amplifier having an input and an output, the amplifier being powered by the power source, where the power source is configured to output a predetermined maximum voltage and, when outputting the maximum voltage, a maximum current, the amplifier is configured to: deliver to the output a first, maximum current being less than 95% of the maximum current, when a voltage provided at the output is the maximum voltage, and receive at the output, when the voltage at the output is the, negative, maximum voltage, a second current being between 0.8 and 1.2 times the first current.

8. An assembly according to claim 7, further comprising a limiter configured to limit the current drained to/by the output, when the voltage at the output is the, negative, maximum voltage, to the second current.

9. An assembly according to claim 7, wherein the amplifier comprises: a first amplifier having a first input and a first output and being configured to: deliver to the first output a first, maximum current being less than 95% of the maximum current, when a voltage provided at the first output is the maximum voltage, and receive at the first output, when the voltage at the first output is the, negative, maximum voltage, a second current exceeding 1.2 times the first current and a second amplifier having a second input, connected to the first input, and a second output, the second amplifier being configured to: receive at the second output a third, maximum current being less than 95% of the maximum current, when a voltage provided at the second output is the, negative, maximum voltage, and deliver to the second output, when the voltage at the second output is the maximum voltage, a fourth current exceeding 1.2 times the third current, and a combiner connecting the first and second outputs to the output.

10. An amplifier according to claim 1, further comprising a load connected to the output, where the amplifier is configured to control the current sourced by and sinked by the output so that for each first voltage between 0V and the maximum voltage: when the first voltage is provided at the output, a third current is sourced from the output to the load, when the first voltage, negative, is provided at the output, a fourth current is sinked by the output from the load, where, for each first voltage, the corresponding third current is between 0.8 and 1.2 times the fourth current for that first voltage.

11. An assembly of a power source, a load and an amplifier having an input and an output, the amplifier being powered by the power source, where the power source is configured to output or receive a maximum current, the amplifier is configured to: deliver to the load a first, maximum current being less than 95% of the maximum current, when a threshold voltage is provided at the output, and receive at the output, when the voltage at the output is the, negative, threshold voltage, a second current being between 0.8 and 1.2 times the first current.

12. An assembly according to claim 11, further comprising a limiter configured to limit the current drained to/by the output, when the voltage at the output is the, negative, threshold voltage, to the second current.

13. An assembly according to claim 11, wherein the amplifier comprises: a first amplifier having a first input and a first output and being configured to: deliver to the first output a first, maximum current being less than 95% of the maximum current, when a voltage provided at the first output is the threshold voltage, and receive at the first output, when the voltage at the first output is the, negative, threshold voltage, a second current exceeding 1.2 times the first current and a second amplifier having a second input, connected to the first input, and a second output, the second amplifier being configured to: receive at the second output a third, maximum current being less than 95% of the maximum current, when a voltage provided at the second output is the, negative, threshold voltage, and deliver to the second output, when the voltage at the second output is the threshold voltage, a fourth current exceeding 1.2 times the third current, and a combiner connecting the first and second outputs to the output.

14. An assembly according to claim 11, where the assembly is configured to control the current sourced by and sinked by the output so that for each first voltage between 0V and the threshold voltage: when the first voltage is provided at the output, a third current is sourced from the output to the load, when the first voltage, negative, is provided at the output, a fourth current is sinked by the output from the load, where, for each first voltage, the corresponding third current is between 0.8 and 1.2 times the fourth current for that first voltage.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0128] In the following, preferred embodiments will be described with reference to the drawing, wherein:

[0129] FIG. 1 illustrates the Current Transfer Function for: Non-symmetrical current transfer (left) and symmetrical current transfer (right).

[0130] FIG. 2 illustrates the transfer flow from required input current (single frequency; left) to delivered output current (and its frequency components) in case of a non-symmetrical transfer function (top) and symmetrical transfer function (bottom).

[0131] FIG. 3 illustrates the Output Distortion of the situation illustrated in FIG. 2: THD (left axis) and DC-level (right axis) as function of required output current relative to the maximum output current for the non-symmetric transfer (solid lines) and the symmetric transfer (dashed lines).

[0132] FIG. 4 illustrates the transfer flow from required input current (dual frequency; left) to delivered output current (and its frequency components) in case of a non-symmetrical transfer function (top) and symmetrical transfer function (bottom).

[0133] FIG. 5 illustrates the Output Distortion of the situation illustrated in FIG. 4: IMD d2 (left axis) and IMD d3 (right axis) as function of required output current relative to the maximum output current for the non-symmetric transfer (solid lines) and the symmetric transfer (dashed lines).

[0134] FIG. 6 illustrates a block diagram of an assembly according to the invention,

[0135] FIG. 7 illustrates an ideal circuit of a second embodiment of the invention.

[0136] FIG. 8 illustrates an ideal circuit of a third embodiment with a current mirror.

[0137] FIG. 9 illustrates a preferred type of amplifier according to an aspect of the invention,

[0138] FIG. 10 illustrates another type of amplifier for use in aspects of the invention,

[0139] FIG. 11 illustrates an amplifier which is sourcing current limited,

[0140] FIG. 12 illustrates an amplifier which is sinking current limited,

[0141] FIG. 13 illustrates another embodiment of an amplifier according to the invention,

[0142] FIG. 14 illustrates another embodiment of an amplifier according to the invention,

[0143] FIG. 15 illustrates another embodiment of an amplifier according to the invention, and

[0144] FIG. 16 illustrates another embodiment of an amplifier according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0145] To explore the properties of distorted signals, the total transfer function is described by its Taylor expansion, and when doing so, it is known from textbook theory that nonlinear distortion is generated by the 2nd and higher order components: [0146] The even order components (i.e. 2, 4, . . . ) create even harmonics, IMD d2 (difference frequency demodulation) and DC components. [0147] The odd order components (i.e 3, 5, . . . ) create odd harmonics and IMD d3.

[0148] In comparison, the Taylor expansion of a linear function has only 0 and first order components. Linear functions do not create distortion.

[0149] To prove the principle, referring to FIG. 1, of a symmetrical and limiting current transfer function, and its properties of low non-linear distortion, a simulation study was done. With this study the nonlinearly of a symmetrical transfer function (taken as the arctangent of the required output current) was compared to that of an asymmetrical transfer function. The asymmetrical transfer function was defined as the arctangent of the required output current for positive (sourcing) currents and presumed linear for negative (sinking) currents. Full descriptions of the transfer functions, including the Taylor and polynomial expansions are given in FIG. 1. Note the zero values for the even order components in the case of the symmetrical transfer function, whereas the non-symmetrical transfer function has non-zero values for all odd higher order components.

[0150] Using the given transfer functions (see FIG. 2): [0151] THD performance was evaluated by applying a Gaussian modulated sinewave burst at different relative amplitudes, i.e. 10%, 50%, 100% and 150%, with respect to the maximum output current. [0152] IMD performance was evaluated by applying a Gaussian modulated sinewave burst, containing 2 sinewaves with a difference frequency of 1 kHz, again at different relative amplitudes, i.e. 10%, 50%, 100% and 150%, with respect to the maximum output current

[0153] The simulated flow from required input current, with single frequency content, to the transferred output current and its frequency components, are given in FIG. 2. FIG. 3 shows the THD and DC-levels as function of required current. Clearly: [0154] The symmetric transfer function has initially 10x lower THD than the non-symmetric transfer. Both converge at relative input amplitudes >150% [0155] The symmetric transfer function generates virtually no DC (the plotted values <300 dB are numerical limits), whereas significant DC shifts are generated by the non-symmetric transfer.

[0156] Performing the same simulation but with dual frequency content, to the transferred output current and its frequency components, the results are given in FIG. 4. FIG. 5 now shows the IMD d2 and the IMD d3 -levels as function of required current.

[0157] From these figures we see that for: [0158] IMD d2: The symmetric transfer function generates virtually no IMD d2 (values several orders below plotting range), whereas significant IMD d2 is generated by the non-symmetric transfer. [0159] IMD d3: In this case, the symmetric transfer function generates about 2 times more IMD d3 than the non-symmetric case, and crosses the IMD d2 line of the non-symmetric transfer function at 40% input level.

[0160] Thus: [0161] A symmetrical current transfer avoids the generation of DC shifts and even order harmonic (THD) and intermodulation distortion (IMD d2). [0162] With respect to non-symmetric transfer functions, the symmetrical transfer function does have higher odd order distortion components, i.e. odd order THD and IMD d3.

[0163] The present invention is well suited for low power situations, such as in hearing aids, hearables, battery powered sensors and the like, such as with a maximum power supply voltage of 0.9V or less and a maximum power supply current of 100 A, where a low power consumption is essential.

[0164] Usually, the assembly of the amplifier and limiter will compete over the available power with other elements, such as transducers, receivers, microphones, processors, sensors, DSPs and the like, so that it is desired that the assembly actually uses less power than what is really available from the power sourcein order to allow the power source to also power the other elements. Often, a power budget is drafted for the individual elements, including the amplifier, which in this connection then also has the limiter.

[0165] Often, an amplifier is configured to output a voltage up to its supply voltage, so that any power limitation may be to the current supplied.

[0166] Also, amplifiers inherently have a maximum current delivery/sourcing capability, so that there is a limit to the current which may be delivered from the amplifier output to a load. Conversely, often there is no real limit to the current which may be received by the amplifier from the output. Hence the lack of symmetry in the current transfer graphs.

[0167] Amplifiers do exist, though, which have the inverse situation, where the limitation is in the receiving direction.

[0168] In FIG. 6, a block diagram of an assembly 10 of a power source 12, an amplifier 14, a limiter 16 and a load 18 is seen. The power source 12 may be connected to a number of other elements, such as a microphone which may supply the signal for the amplifier and/or a processor for controlling the assembly.

[0169] Clearly, the limiter may be positioned in other positions or even comprised in the amplifier.

[0170] The operation of a standard amplifier is to have a gain, which preferably is constant but which may be voltage dependent (the voltage to be output) or frequency dependent.

[0171] Often, amplifiers are linear at least around 0 A output current, but this linearity will become more pronounced at high currents, which again will be seen at low load impedances. Loads may be purely resistive but often comprise filters which may get a low impedance in certain situations. If the load is capacitive, very high frequencies may reduce the overall impedance drastically, such as if the microphone picks up ultrasound, which is used by e.g. some proximity sensors. In that situation, the current limiting is desired in order to e.g. not deplete the power source to a degree where other system components are starved.

[0172] In one embodiment, as is illustrated in FIG. 9, the amplifier 14 may comprise two amplifiers, 142 and 142 which are both connected to the power supply conductors 145 and 148. The arrows of the conductors illustrate a direction of current flowing from a higher voltage connected at 145 to a lower voltage, such as ground, connected to 148. Naturally, this is a design choice, and other voltages and another direction of the current may be selected.

[0173] The amplifiers 142/142 are both connected to the input 144 and to a combiner 142, which combines the output of the amplifiers 142/142 and output the combined result on the output 146.

[0174] The amplifiers 142/142 have inverted characteristics so that the amplifier 142 is current limited when the output signal requires current to be fed from the output 146, such as when a voltage of the output signal is positive. Thus, the amplifier 142 is configured to output, at a given voltage, such as a maximum obtainable output voltage, a first current, whereas it is able to receive a second, higher current, when the output voltage is negative.

[0175] Conversely to that, the amplifier 142 is current limited when the output signal requires current to be received from the output 146, such as when a voltage of the output signal is negative. Thus, the amplifier 142 is configured to receive, at a given voltage, such as a maximum obtainable output voltage, a third current, whereas it is able to output a fourth, higher current, when the output voltage is positive.

[0176] The combiner may be left out or be formed by a galvanic connection of the outputs of the amplifiers 142/142. Alternatively, the combiner may combine the two output signals in any desired manner. One signal may be amplified further, attenuated, filtered or the like if desired. When combining the output of the two amplifiers, the combined output will be the sum of the first and fourth currents and the sum of the second and third currents. Thus, the amplifiers may be selected or paired so that these sums give the sought after symmetry. Clearly, the maximum currents of the amplifiers may be different, as long as the combination gives the desired overall current behaviour.

[0177] The combiner may additionally perform a smooth transition from when the output from only one amplifier is connected to the output to when the output of only the other amplifier is connected to the output. The switching/transition may simply be controlled by the sign of the voltage output from the output, as this identifies the direction of the current on the output 146. Again, the amplifiers or their characteristics may be selected to arrive at the sought after symmetry.

[0178] In general, the amplifiers 142/142 may be based on the same technology or different technologies.

[0179] In FIG. 11, an amplifier is illustrated which is limited in the current delivered to the output, due to the limitation of the current source Idd, but not in the current received from the output, which current may be fed directly to ground.

[0180] In FIG. 12, on the other hand, an amplifier is illustrated which, due to the current limiter Idd, is limited in the current which may be received on the output, whereas the current output from the output may be derived directly with no limit from the Vdd supply. In FIG. 10, an interesting type of amplifier is illustrated which has an amplifier or amplifier stage 142 connected to the input 144, the output 146 as well as the power supply conductors 145/148. In this embodiment, however, limiters 143/147 are provided between the power supply conductors and the amplifier power inputs. Thus, the current drawn from the supply 145 for delivery on the output is limited or controlled by the limiter 147, whereas the current received on the output to be delivered to the supply 148 is limited or controlled by the limiter 143. Then, the limiters may be selected or controlled to have the desired behaviour, such as the above symmetric current behaviour.

[0181] In this context, the settings of the limiters may be adapted for a number of purposes. In one example, it is noted that the current supplied via the limiter 147 may be supplied to the amplifier 142 even though the output voltage is negative and a current is also received on the output. Then, the limiter 143 should be set to accept both currents in the situation where the only current path from the amplifier is through the limiter 143.

[0182] In general, different types of limiters exist. Limiters may be provided by passive components, active components, a mix thereof, as well as more complex circuits. A simple type of limiter is a constant current source. A constant current source will limit the current through it to its maximum current. Often, constant current sources are able to actually reduce the current transported there through, such as based on a voltage over the current source.

[0183] As described above in relation to FIG. 1, it may be desired to have the current limited behaviour for both output current directions/polarities. Thus, if the amplifier 14 is current limited in its current which may be output from the output, it may also be, preferably similarly, limited in the current which may be received from the output.

[0184] Naturally, the amplifier 142 may receive power from several conductors 145. I that respect, multiple limiters 147 may be provided with a summed characteristic as desired.

[0185] Also, multiple sink conductors 148 may be provided, again with one or more limiters 143, the operation again may be combined to arrive at the desired operation.

[0186] Clearly, the amplifier 142, in the FIG. 10 context, may be any type of amplifier or amplifier stage, such as a class A amplifier, class B amplifier, or a class AB amplifier.

[0187] A simplified schematic of yet another embodiment is shown in FIG. 7. The resulting configuration consists of 2 basic circuit elements that are combined in a non-standard way to combine the functional requirements of high-quality linear amplification and symmetrical current limiting in current overload situations.

[0188] A linear amplifier is defined by the left transistors Q1 and Q2 in the circuit of FIG. 7, where they form a 2-stage amplifier with a unity gain feedback loop. Any gain may be selected.

[0189] This linear amplifier receives a positive voltage Vdd via a limiter CsA and it feeds current to Ground via two limiters CsB and CsC.

[0190] In this embodiment, the limiters are implemented as current sources which are capable of transferring a maximum current, I2, I1 and I1+I2, respectively. The symmetrical current limiting is provided by adding the right transistor Q3 that, together with transistor Q2, forms a differential pair. Differential pairs are known for their symmetrical limiting properties.

[0191] Considering the overload properties of this circuit: [0192] When the input voltage V-in rises, the output voltage V-out also rises. Ultimately, Q1, Q2 and also current source CsB (I1) switch off. Maximum current sourced by the output to its load (filter Rf/Cf) is then I2. In that case, the overflow transistor Q3 carries I1+I2. [0193] When the input voltage V-in decreases, the output voltage V-out also decreases. Ultimately, Q1 and Q2 become completely conductive, carrying I1 in Q1 and I1+I2 in Q2. Maximum current sinked by the output from its load (filter Rf/Cf) is then 2*I1. The overflow transistor Q3 is switched off in that case.

[0194] The output current will be limited symmetrically when the Bias currents scale: I2=2*I1.

[0195] In addition, it is preferred that the Current source CsB (carrying I1) is able to shut down in a controlled way, without introducing new asymmetry (e.g. quick, with a small linear-region).

[0196] Noticeable elements in this circuit are: [0197] To use a differential pair as an output stage of an amplifier is rather unusual, as their properties usually make them suitable as input stage. [0198] During current sinking phase, the maximum sinking current (2I1) is evenly distributed between input transistor Q1 and output transistor Q2, so that, as a result, both transistors carry different currents (I1 and I1+I2, respectively). Thus, internal asymmetry of the current levels may be desired in order to achieve the overall symmetry sought for. [0199] When adding gain to this circuit, it should be considered that part of the output current may need to flow through feedback resistors.

[0200] The current sources carrying I1, I2 and I1+I2 preferably are balanced to get the desired symmetrical behaviour for current sourcing and current sinking.

[0201] Furthermore, as mentioned above, the current source CsB (carrying I1) preferably is able to shut down in a controlled way. This can e.g. be achieved by adding a simple current mirror in the form of Q4 and Q5, which are designed for small linear region (see FIG. 8).

[0202] This also has the advantage that it is easier to provide a current source from Vdd than at a voltage close to Ground.

[0203] The current mirror will have the same overall functionality as the current source CsB in FIG. 7.

[0204] Shutting CsB down in a controlled manner, such as slowly and not abruptly, if a current limit is reached, will allow for the sinking behaviour to simulate the softer behaviour of the sourcing.

[0205] In one embodiment, the source carrying drive currents I1 and I2 is scalable, allowing for range switching between low- and high current applications. With this addition, alternative trade-off decisions can be made between total distortion and current consumption, without the penalty of adding DC-shifts or IMD-D2. This also counts for lower currents.

[0206] FIG. 13 illustrates yet another embodiment of an amplifier in the form of a source follower (Q1) in between 2 matched biasing current sources, I1 and 12. The symmetry and current limits are guaranteed by I1 and 12.

[0207] FIG. 14 illustrates another embodiment of an amplifier in the form of a source follower (Q1) with a biasing current source I1 and a separate symmetrical current limiting function block (e.g. a resistor) at the output node. The current is reduced in the sourcing phase.

[0208] FIG. 15 illustrates an amplifier as an assembly of two source followers (Q1 and Q2) with 1 inverted input to create a differential low-pass filtered (LPF) signal, such as is achieved with an RC-filter, with a common mode DC at the 2.sup.nd stage. Bias current sources I1 and I2 are matched such that Q1 and Q2 operate at the same biasing level. Each source follower on its own has a non-symmetric current transfer with limited sourcing current and unlimited sinking current. Because of the interconnected outputs, Q1 will limit the current while sourcing the positive portions of the input signal, while, because of the inverting block, Q2 will limit the current while sourcing the negative portion of the input signal. Because the sinking current of Q1 will be limited by the current sourcing of Q2 and vice versa, the combined current transfer will be limited and symmetrical.

[0209] FIG. 16 illustrates an amplifier comprising a differential pair, a current mirror and feedback.

[0210] Transistors Q3 and Q4 form a differential pair of which Q3 forms a dual-stage feedback amplifier with Q5, whose output signal is fed back to the gate of Q4. The signal current that is processed by current mirror Q1 and Q2 is filtered in the current domain by filtering capacitor C1. The output signal is read inside the feedback loop at the gate of Q5.

[0211] In this manner, frequency filtering in the current domain could give steeper filter curves if desired.

[0212]