Circuit to reduce power consumption

Abstract

A switching circuit with switches between a charging path and a low-impedance active path. The charging path comprises a zener diode substantially in parallel with a charging capacitor. Current flows through the charging path when the circuit is powered on and a power supply charges the charging capacitor while current flows through the charging path. The low-impedance bypass path comprises a switch that remains closed until a voltage across the charging capacitor exceeds a threshold voltage. The switch opens when the charging capacitor exceeds the threshold voltage.

Claims

1. A circuit comprising: a power source for providing power to a load; a field effect transistor switch in parallel with a zener diode; a storage capacitor arranged in the circuit such that when the field effect transistor switch is off, the power source begins charging the storage capacitor; a control circuit configured to cause the field effect transistor switch to switch on when the storage capacitor reaches a threshold voltage, where the switching on of the field effect transistor switch causes the current to bypass the zener diode such that the storage capacitor stops charging, the control circuit comprising a voltage comparator which continually compares the voltage across the voltage comparator with a threshold voltage and turns the switch on when the voltage across the storage capacitor exceeds the threshold voltage; a resistor in series with a reference zener diode, the reference zener diode providing a reference voltage to the voltage comparator.

2. The circuit of claim 1 the control circuit further comprising a resistor in series with a capacitor, the capacitor providing an input voltage measurement to the voltage comparator.

3. The circuit of claim 2, wherein the capacitor is a 100 pF capacitor and the resistor is 300K Ohms.

Description

DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a circuit diagram of an exemplary circuit according to an embodiment of the present disclosure.

(2) FIG. 2 illustrates the voltage in the circuit of FIG. 1 in an active and charging state.

(3) FIG. 3 is a flowchart depicting an exemplary method of operation of a circuit according to an embodiment of the present disclosure.

(4) FIG. 4 is a circuit diagram of an exemplary circuit according to an alternative embodiment of the present disclosure.

(5) FIG. 5 is an exemplary FET in a circuit according to an exemplary embodiment of the present disclosure.

DETAILED DESCRIPTION

(6) FIG. 1 depicts a circuit diagram of a simplified circuit 100 according to an exemplary embodiment of the present disclosure. The circuit comprises a power source 107, a load 105, and a field effect transistor (FET) 101. The FET 101 is an enhancement mode metal-oxide semiconductor field effect transistor (MOSFET) in the illustrated embodiment. The FET 101 is a switch that switches the circuit 100 between a low-impedance active state and a charging state, as further discussed herein. When the circuit 100 is in the active state, the FET 101 is closed, and current flows from the power source 107, through the FET 101, and through the load 105. When the circuit 100 is in the charging state, the FET 101 is open and no current passes through the FET 101.

(7) The circuit 100 further comprises a capacitor 103 in series with a diode 108, the capacitor 103 and diode 108 together arranged in parallel with the FET 101. A zener diode 104 is also arranged in parallel with the FET 101. When the circuit 100 is in the charging state, current flows from the power source 107, through the zener diode 104, and through the load 105, thus bypassing the FET 101 and charging the capacitor 103 to the voltage of the zener diode 104.

(8) A control circuit 102 monitors the voltage of the capacitor 103 and if the capacitor voltage gets too low, the control circuit 102 shuts off the FET 101 to put the circuit back into charging mode to recharge the capacitor 103. The capacitor 103 can be used to power devices (not shown) in need of power.

(9) The state of the FET 101 determines whether the circuit 100 is in the active state or the charging state. When the circuit 100 is initially powered on, the FET 101 will be off, so no current passes through the FET and the circuit is in charging mode.

(10) FIG. 2 illustrates the voltage of the circuit 100 over time. When the circuit 100 first turns on, for a very brief period of time, the current flowing through the circuit charges the capacitor 103 to the voltage V.sub.Z of the zener diode 104. Then the FET 101 turns on, and current flows through the FET, bypassing the zener diode 104. The voltage V.sub.act across the FET 101 drops very low in this active state, such that an average voltage V.sub.avg also stays low.

(11) FIG. 3 is a flowchart depicting an exemplary method 300 of operation of a circuit according to an embodiment of the present disclosure. In step 301 of the method 300, the circuit 100 (FIG. 1) is powered on.

(12) In step 302, current flows through the zener diode 104 (FIG. 1). In step 303, the voltage across the zener diode 104 charges the capacitor 103 (FIG. 1) and the circuit is in the charging state. In step 304, the control circuit 102 monitors the voltage of the capacitor 103 to determine whether it exceeds a predetermined threshold voltage. In step 305, if the voltage of the capacitor 103 is not above the threshold voltage, the FET 101 remains off, and the zener diode 104 continues to charge the capacitor 103.

(13) If, however, the voltage of the capacitor 103 is above the threshold voltage, in step 306 the control circuit 102 turns the FET on to put the circuit in the active state.

(14) The threshold voltage is generally equal to the voltage across the zener diode 104 when the circuit is powered on but the FET 101 is switched off. However, because zener diode voltages can vary due to temperature and the like, the threshold voltage may be slightly lower than the zener voltage, i.e., less than the voltage drop across the zener diode 104.

(15) FIG. 4 is a circuit diagram of an alternative embodiment of a circuit 400 according to the present disclosure. The power source 407 provides power to a load 405. When the circuit 400 is in active mode, a FET 401 is on such that current flows through the FET 401, and bypasses a zener diode 404. When the circuit 400 is in the charging state, the FET 401 is open and no current passes through the FET 401. Rather, current passes through the zener diode 404. The voltage across the zener diode 404 charges a capacitor 403. In one embodiment, the zener diode 404 comprises two 225 mW 10 V5% zener diodes in parallel and the capacitor is a 10 microfarad capacitor.

(16) Inductor 466 provides a voltage boost that allows the circuit 400 to operate in conditions where the power source is less than the threshold voltage.

(17) Diode 408 is a blocking diode that prevents the capacitor 403 from discharging its stored voltage. In one embodiment, diode 408 is a small signal diode for up to 200 milliamps of current. Diode 406 a reverse current blocking diode that prevents current from flowing in the reverse direction.

(18) A control circuit 402 monitors the voltage of the capacitor 403 and if the capacitor voltage gets too low, the control circuit 402 shuts off the FET 401 to put the circuit back into charging mode to recharge the capacitor 403.

(19) In the illustrated embodiment, the control circuit comprises a voltage comparator 413 which continually compares the voltage across the voltage comparator 413 with a threshold voltage to see if the voltage exceeds the threshold voltage. Resistor 415 is in series with zener diode 410, which provides a reference voltage to the comparator 413. In one embodiment, the zener diode 410 is rated at 225 mW and 8.2 V5% and resistor 415 is 500K.

(20) Resistor 414 is in series with capacitor 411, which provides the input voltage measurement to the comparator 413. In one embodiment, the capacitor is a 100 pF capacitor and the resistor 414 is 300K. A resistor 412 provides the comparator 413 with hysteresis control during the enable/disable transition. In one embodiment, the resistor 412 is rated at 1 meg.

(21) FET 401 is shown in the circuit diagram of FIG. 4 in a simplified form. FIG. 5 is an exemplary FET 401, in which a first FET 501 is in a back-to-back configuration with a second FET 502. This configuration ensures that current cannot flow backwards through the circuit 400 when the circuit is off (i.e., in a charging state).

(22) This disclosure may be provided in other specific forms and embodiments without departing from the essential characteristics as described herein. The embodiments described are to be considered in all aspects as illustrative only and not restrictive in any manner.