Motor drive system

Abstract

A power converter system comprising a power source; a plurality of voltage source converters for driving respective loads; the plurality of voltage converters connected to the power source via a common DC-link, control means (10a, 10b) for driving the voltage source converters by means of respective control signals modulated onto respective modulation carriers; and means for synchronizing the control means such that the respective modulation carriers are interleaved with a selected phase shift therebetween.

Claims

1. A power converter system comprising: a power source; a plurality of source converters for driving respective loads; the plurality of source converters connected to the power source via a common DC-link, control means for driving the source converters by means of respective control signals modulated onto respective modulation carriers; and means for synchronizing the control means such that the respective modulation carriers are interleaved with a pre-determined phase shift therebetween.

2. The power converter system of claim 1, wherein the power source is a DC power source.

3. The power converter system of claim 1, wherein the power source is an AC power source, and further comprising a rectifier between the power source and the DC link.

4. The power converter system of claim 1, wherein the power source is a single power source common to each source converter.

5. The power converter system of claim 1, wherein the source converters are voltage source converters.

6. The power converter system of claim 5, wherein the voltage source converters are motor drive circuits.

7. The power converter system of claim 1, wherein the control means comprises a single platform having a controller for each source converter.

8. The power converter system of claim 1, wherein the control means comprises a separate control device for each source converter.

9. The power converter system of claim 1, wherein the control means comprises a control device common to all the source converters.

10. The power converter system of claim 1, wherein the control signals are pulse width modulated, PWM.

11. The power converter system of claim 1, wherein the phase shift is selected to provide a 90 angle between the interleaved carriers.

12. The power converter system of claim 1, wherein the phase shift is selected to provide a 180 angle between selected harmonics.

13. The power converter system of claim 1, wherein the control means are synchronized by means of a communication link therebetween.

14. The power converter system of claim 1, wherein the respective loads are all different from each other.

15. A method of controlling operation of a plurality of voltage source converters connected to a power source via a common DC-link, the method comprising: providing a modulation carrier for each of the source converters, interleaving the modulation carriers with a predetermined phase shift between them; and modulating a respective control signal for each source converter on each modulation carrier.

16. The method of claim 15, wherein the phase shift is selected to provide a 90 angle between the respective modulation carriers.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The improvement is applied to architectures having non-paralleled voltage source inverters (i.e. feeding separated loads or connected to independent AC buses) that share a common DC-link.

(2) FIG. 1A is a schematic view of an AC-voltage fed architecture including multiple voltage source converters applied as motor drives that share a common DC-Link.

(3) FIG. 1B is a schematic view of a DC-voltage fed architecture including multiple voltage source converters applied as motor drives that share a common DC-Link.

(4) FIG. 2 is a simple circuit diagram showing interleaving of modulation carriers for parallel voltage source converters as described in the prior art discussed above.

(5) FIG. 3 is a simple circuit diagram of an architecture including (non-paralleled) motor drives that share a common DC-link and that drive separated electrical motors, and incorporating the control of the present disclosure. This shows a DC supply, as e.g. in FIG. 1B, but could be adapted for an AC supply such as shown in FIG. 1A.

(6) FIGS. 4a-4d show the results of a simulation of a system incorporating the control of this disclosure.

DETAILED DESCRIPTION

(7) Preferred embodiments will now be described, by way of example only, with reference to the drawings.

(8) The structure of the systems in which the control of this disclosure is to be incorporated will first be described with specific reference to FIGS. 1A and 1B.

(9) The systems consist of a power supply (AC source 1a in FIG. 1A and DC source 1b in FIG. 1B). Power is supplied to multiple motor drive electronics (MDEs) 2a1,2a2;2b1,2b2, connected to a common DC-link, each driving a respective motor drive 3a1,3a2; 3b1,3b2. Power is supplied to the loads via a DC-link 5a,5b, typically via an electromagnetic compliance (EMC) filter 6a,6b. In the AC system, the AC is converted to DC by means of a rectifier 7a.

(10) The DC-link 5a,5b typically comprises coupled inductors 8a1, 8a2; 8b1, 8b2 between the source and a DC-link capacitor 9a, 9b. i.sub.TOT is the total DC-link current and i.sub.cap is the current flowing through the DC-link capacitor in order to minimize the ripple of the inductor current (i.sub.TOT+i.sub.cap). These inductors may or may not be present depending on the particularities of each application.

(11) It is known in the state of the art, as mentioned above, to have several parallel voltage source converters connected to the same AC bus, or sharing the same load, to be modulated or interleaved to minimize either the DC-link current ripple or the AC current ripple. By applying interleaving, the phase of the selected switching harmonics can be shifted so that the sum of such harmonic components can be null if the phase shift of the targeted harmonics is tuned to be 180 degrees.

(12) There is also a need to minimise ripple in non-parallel drive systems where the MDEs share a single DC-link, as shown in FIGS. 1A and 1B.

(13) The inventors have realised that, in such cases, interleaving carriers in a manner similar to that proposed above can bring benefits to the DC-link capacitor reduction in architectures with non-paralleled voltage source converters that share a common DC-link. This requires synchronization between the modulation signals as illustrated in FIG. 3. This may be done by an internal signal in the case that both inverters share the same controller, or by using communication between controllers.

(14) The present disclosure adapts systems such as shown in FIGS. 1A and 1B such that the motor controls are synchronized so that interleaving of the modulation carriers is achieved to minimize selected DC-link current harmonics. According to the disclosure, as can best be seen in FIG. 3, the control signals, from the controllers 10a, 10b, for the respective motor drive electronics 2a, 2b are modulated onto respective modulation carriers, carrier 1 and carrier 2, by e.g. PWM modulation 11a, 11b and the modulation carriers, carrier 1 and carrier 2, are interleaved such that are synchronised and the phase shift between them is set to a target value.

(15) Only two MDEs are shown here for ease of explanation. Of course, any number of non-parallel MDEs sharing DC-link (2a, 2b, 2z) could be used in the same way, with all of their respective carriers interleaved.

(16) The modulation carriers are interleaved by a pre-defined angle to minimise the current flowing through the DC-link capacitor. The carriers preferably interleave with a 90 deg. phase difference. This has been found to be the optimum angle if the power factor at the load side is high. Other angles can be selected depending on the particularities of the application. The effects of different angles can be seen in FIG. 4 which shows the results of simulation of a system having two motor drives driving independent loads and sharing a DC link. The interleaving angle is changed every 10 ms (see FIGS. 4a and 4b for the respective MDEs). FIG. 4c shows the RMS current through the DC link capacitor for the different angles. FIG. 4d shows the phase current of each motor (M1 and M2), which have same magnitude and phase in this example. As can be seen, maximum ripple occurs with a 0 deg. angle and minimum ripple occurs with a 90 deg. angle. In the simulation, the reduction in RMS current between 0 deg. and 90 deg. was over 40% which means that more than 60% less power is dissipated in the DC-link capacitor (benefits are observed also for different current magnitude and phase). This enables reduced DC-link capacitance and also EMI filter and inductor reduction. It should be noted that similar results are achieved even if the rating of the motor drives or loads are different, as long as the same switching frequency is used for both.

(17) A phase-locked loop mechanism or other synchronisation means may be required, in practice, to keep the interleaving angle at the desired value.

(18) The controller (10a, 10b) and PWM modulator (11a, 11b) are shown separately for ease of reference; these components can be realised in different ways known to those in the art, for example, all mounted on a single common platform, or formed as separate units with a common bus.

(19) The interleaving is carried out by means of a communication signal between the controllers 10 of the drives 2. This signal could e.g. be in the form of a flag that enables synchronisation of modulation carriers so that minimum data needs to be communicated. Some existing systems do already have communication between MDEs and so this can be used for communication the synchronisation signal without the need for additional hardware.

(20) Whilst FIG. 3 shows a DC system, the system can be easily adapted for an AC system as shown in FIG. 1A, as only the MDE end is modified to incorporate a passive rectifier, or an active rectifier.

(21) Considerable benefits in terms of size, weight, cost and complexity are thus achieved by interleaving the modulation carriers of MDEs sharing a DC-link and driving separate loads.