Method for forming a film of an oxide of In, Ga, and Zn

Abstract

A method for forming a film of an oxide of In, Ga, and Zn, having a spinel crystalline phase comprises providing a substrate in a chamber; providing a sputtering target in said chamber, the target comprising an oxide of In, Ga, and Zn, wherein: In, Ga, and Zn represent together at least 95 at % of the elements other than oxygen, In represents from 0.6 to 44 at % of In, Ga, and Zn, Ga represents from 22 to 66 at % of In, Ga, and Zn, and Zn represents from 20 to 46 at % of In, Ga, and Zn; and forming a film on the substrate, the substrate being at a temperature of from 125° C. to 250° C., by sputtering the target with a sputtering gas comprising O.sub.2, the sputtering being performed at a sputtering power of at least 200 W.

Claims

1. A method of forming a film of an oxide of In, Ga, and Zn, having a spinel crystalline phase, the method comprising: providing a substrate in a chamber; providing a sputtering target in the chamber, the sputtering target comprising an oxide of In, Ga, and Zn, wherein: In, Ga, and Zn represent together at least 95 at % of elements other than oxygen in the sputtering target, In represents from 0.6 to 44 at % of In, Ga, and Zn in the sputtering target, an atomic percent ratio of In to Ga in the sputtering target is from 0.51 to 1.96, Ga represents from 22 to 66 at % of In, Ga, and Zn in the sputtering target, and Zn represents from 20 to 46 at % of In, Ga, and Zn in the sputtering target; and forming a film on the substrate, the substrate being at a temperature of from 125° C. to 250° C., by pulsed DC reactive magnetron sputtering the sputtering target with a sputtering gas comprising O.sub.2, the sputtering being performed at a sputtering power of at least 300 W and at a frequency of from 10 kHz to 1 MHz, wherein the formed film of the oxide of In, Ga, and Zn has the spinel crystalline phase.

2. The method of claim 1, wherein: In represents from 2 to 40 at % of In, Ga, and Zn in the sputtering target, Ga represents from 25 to 55 at % of In, Ga, and Zn in the sputtering target, and Zn represents from 23 to 43 at % of In, Ga, and Zn in the sputtering target.

3. The method of claim 2, wherein: In represents from 10 to 40 at % of In, Ga, and Zn in the sputtering target, Ga represents from 30 to 50 at % of In, Ga, and Zn in the sputtering target, and Zn represents from 27 to 40 at % of In, Ga, and Zn in the sputtering target.

4. The method of claim 1, wherein the In, Ga, and Zn in the sputtering target represent together at least 99 at % of elements other than oxygen in the sputtering target.

5. The method of claim 1, wherein the In, Ga, and Zn in the sputtering target represent together at least 99.9 at % of elements other than oxygen in the sputtering target.

6. The method of claim 1, wherein the In, Ga, and Zn in the sputtering target represent together at least 99.95 at % of elements other than oxygen in the sputtering target.

7. The method of claim 1, wherein an atomic percent ratio of In to Zn in the sputtering target is from 0.5 to 2.2.

8. The method of claim 1, wherein an atomic percent ratio of Ga to Zn in the sputtering target is from 0.5 to 2.2.

9. The method of claim 1, wherein the sputtering power is at least 400 W.

10. The method of claim 1, wherein the sputtering power is at least 500 W.

11. The method of claim 1, wherein a sputtering gas flow comprises at least 80% of oxygen with a balance of the sputtering gas flow comprising an inert gas.

12. The method of claim 1, wherein a sputtering gas flow comprises at least 85% of oxygen with a balance of the sputtering gas flow comprising an inert gas.

13. The method of claim 1, wherein the substrate is at a temperature of from 150 to 230° C.

14. The method of claim 1, wherein the substrate is at a temperature of from 175 to 220° C.

15. The method of claim 1, wherein the spinel crystalline phase is of a space group Fd3m.

16. The method of claim 1, wherein the substrate comprises a semiconductor material and a dielectric material disposed over the semiconductor material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIGS. 1A and 1B are graphs of the XRD intensity (a.u.) as a function of 2θ (deg) for different substrate temperatures during sputtering with a gas mixture O.sub.2/Ar 80/20.

(2) FIG. 2 is a graph plotting the maximal intensity (a.u.) observed in FIGS. 1(a) and (b) as a function of 2θ (deg).

(3) FIG. 3 is a graph of the out-of-plane XRD intensity (a.u.) as a function of 2θ (deg) for a substrate temperature of 200° C. during sputtering at 500 W with different gas mixtures.

(4) FIG. 4 is a graph of the XRD intensity (a.u.) as a function of 2θ (deg) for a substrate temperature of 200° C. during sputtering at different powers with a gas mixture O.sub.2/Ar 80/20.

(5) FIG. 5 is a graph of the grazing incidence XRD (1°) intensity (a.u.) as a function of 2θ (deg) for a substrate temperature of 200° C. during sputtering with different gas mixtures.

DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

(6) The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the invention.

(7) Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other orientations than described or illustrated herein.

(8) It is to be noticed that the term “comprising”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. The term “comprising” therefore covers the situation where only the stated features are present and the situation where these features and one or more other features are present. Thus, the scope of the expression “a device comprising means A and B” should not be interpreted as being limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

(9) Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.

(10) Similarly, it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

(11) All numbers including those expressing quantities of ingredients, reaction conditions, and so forth used in the specification are to be understood as being modified in all instances by the term ‘about.’ Accordingly, unless indicated to the contrary, the numerical parameters set forth herein are approximations that may vary depending upon the desired properties sought to be obtained. At the very least, and not as an attempt to limit the application of the doctrine of equivalents to the scope of any claims in any application claiming priority to the present application, each numerical parameter should be construed in light of the number of significant digits and ordinary rounding approaches.

(12) Where a range of values is provided, it is understood that the upper and lower limit, and each intervening value between the upper and lower limit of the range is encompassed within the embodiments.

(13) All references cited herein are incorporated herein by reference in their entirety. To the extent publications and patents or patent applications incorporated by reference contradict the disclosure contained in the specification, the specification is intended to supersede and/or take precedence over any such contradictory material.

(14) Furthermore, while some embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.

(15) Furthermore, some of the embodiments are described herein as a method or combination of elements of a method that can be implemented by a processor of a computer system or by other means of carrying out the function. Thus, a processor with the necessary instructions for carrying out such a method or element of a method forms a means for carrying out the method or element of a method. Furthermore, an element described herein of an apparatus embodiment is an example of a means for carrying out the function performed by the element for the purpose of carrying out the invention.

(16) In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures, and techniques have not been shown in detail in order not to obscure an understanding of this description.

(17) The invention will now be described by a detailed description of several embodiments of the invention. It is clear that other embodiments of the invention can be configured according to the knowledge of persons skilled in the art without departing from the technical teaching of the invention, the invention being limited only by the terms of the appended claims.

(18) Reference will be made to transistors. These are three-terminal devices having a first main electrode such as a drain, a second main electrode such as a source and a control electrode such as a gate for controlling the flow of electrical charges between the first and second main electrodes.

Example 1: General Procedure for the Formation of a Film of an Oxide of In, Ga, and Zn

(19) To deposit thin films of an oxide of In, Ga, and Zn, 300 mm diameter Si wafers were used as the substrate. The wafers had a 100 nm thick SiO.sub.2 film obtained by thermal oxidation to enable conductivity measurements. Similar results can, however, be obtained by deposition on the native oxidized Si surface. The presence of the insulating SiO.sub.2 film is optional when no conductivity measurements need to be performed.

(20) Wafers were loaded via a vacuum load lock, entering the degas chamber first to remove adsorbed moisture by lamp heating at 350° C. in Ar ambient for 60 s. Next, wafers were placed in a physical vapour deposition (PVD) chamber by robotic handling under vacuum. Inside the PVD chamber, the wafers were electrostatically clamped to a heated chuck by a bias voltage of 300 V. A backside Ar flow of 2-5 sccm through channels in the chuck enabled a good heat transfer. The wafer temperature was assumed to be same as the temperature measured and controlled by a thermocouple in the heated chuck. The temperature range for the present examples was 20-375° C. Before deposition, the chamber was evacuated to a base pressure of 3×10.sup.−5 Torr by a cryogenic pump.

(21) Film deposition was obtained by pulsed DC reactive magnetron sputtering with the power of 200-500 W with a pulse frequency of 100 kHz and a duty on/off cycle of 90%/10%. A 445 mm diameter IGZO disk was used as the target placed 78 mm above the wafer chuck. The IGZO disk consisted of polycrystalline InGaZnO.sub.4 (purity of 99.99%) with a metal atom ratio of In:Ga:Zn=1:1:1. The target was water-cooled to avoid excessive heating. The sputtering gas is a mixture of Ar and O.sub.2. The total flow, including the back-side flow is kept at 100 sccm. At this flow, the pressure is maintained at 0.5 Pa by continuous pumping via the cryogenic pump.

(22) The obtained IGZO films have a metal composition close to that of the target. This did not depend on deposition temperature, power, or gas flow ratio. The morphology, however, was subject to change as will be shown in the examples below.

Example 1.1: Formation of a Film of an Oxide of In, Ga, and Zn at Various Temperatures

(23) Example 1 was performed at various temperatures ranging from 20° C. to 375° C. while setting the gas mixture at 20 at % Ar and 80 at % O.sub.2 and using a power of 500 W.

(24) As can be seen in FIG. 1B, at room temperature, the film was amorphous. At 100° C., a spinel Fd3m (space group 227) phase appears. This is witnessed by the appearance of peaks at Θ=35.5° in out-of-plane XRD (see FIG. 3) and at 17.4° and 60° in grazing incidence XRD (GI-XRD, incidence angle=1°, see FIG. 5) and are caused by respectively (222), (111), and (440) diffraction in the spinel structure. The peak at Θ=35.5° can be observed in FIGS. 1A and 1B. The importance of the spinel phase grows from 100° C. to between 175° C. and 200° C. where it reaches a maximum. Then, it starts to decrease while a C-axis aligned crystalline (CAAC) phase appears and grows in importance. The appearance of CAAC IGZO in the film can be detected by out-of-plane XRD, when a broad peak at Θ=30° appears. The intensity of this peak is a measure for the amount of CAAC IGZO next to amorphous IGZO and increases with increasing deposition temperature which has a stronger effect than changing the power or O.sub.2-flow ratio. Above 250° C., the peak corresponding to the spinel phase is not observed anymore.

Example 1.2: Formation of a Film of an Oxide of In, Ga, and Zn in Pure Ar

(25) Example 1 was performed at various temperatures ranging from 20° C. to 375° C. while setting the gas mixture at 100 at % Ar and 0 at % O.sub.2. The power was 500 W. The film was amorphous at all temperatures

Example 1.3: Formation of a Film of an Oxide of In, Ga, and Zn in Various Oxygen Flow Ratio at 200° C.

(26) Example 1 was performed at various O.sub.2 flow ratios ranging from 5 to 95% with the balance being Ar. The temperature was set at 200° C. and the power at 500 W. As can be seen in FIGS. 3 and 5, the peak at Θ=35.5° is already marginally present at an oxygen flow rate of 20% but really starts to emerge from the background between 30 and 40% O.sub.2. It was observed that the higher the oxygen flow rate ratio, the more important the spinel phase becomes.

Example 1.4: Formation of a Film of an Oxide of In, Ga, and Zn in Various Oxygen Flow Ratio at 300° C.

(27) Example 1.3 was repeated at 300° C. Instead of obtaining a spinel phase, a CAAC phase was observed. Its importance grew with the oxygen flow rate ratio.

Example 1.5: Formation of a Film of an Oxide of In, Ga, and Zn in 80 at % Oxygen Flow Ratio Above 300° C.

(28) Example 1 was performed at 80 at % O.sub.2 flow ratio with the balance being Ar. The temperature was set at 350 or 375° C. and the power at 500 W. At both temperatures, the structure was polycrystalline. Both crystalline structures were attributed to the hexagonal R3m (space group 166) unit cell.

Example 1.6: Formation of a Film of an Oxide of In, Ga, and Zn at Different Powers

(29) Example 1 was performed at an O.sub.2 flow ratio of 80% with the balance being Ar. The temperature was set at 200° C. and the power was varied between 200 W and 500 W. As can be seen in FIG. 4, the spinel phase peak at Θ=35.5° is present at all powers but gains in intensity with higher powers.

Example 1.7: Formation of a Film of an Oxide of In, Ga, and Zn with a Ratio In:Ga:Zn of 2:2:1

(30) Example 1 is repeated while using a target having a ratio In:Ga:Zn of 4:2:3 or 2:2:1. Preliminary results lead us to conclude that the targets having a ratio In:Ga:Zn of 2:2:1 or of 1:1:1 appear more prone to form the spinel phase than the target having a ratio In:Ga:Zn of 4:2:3. So far, no target having a ratio In:Ga:Zn of 4:2:3 did form a spinel phase.

(31) It is to be understood that although preferred embodiments, specific constructions, and configurations, as well as materials, have been discussed herein for devices according to the present invention, various changes or modifications in form and detail may be made without departing from the scope of this invention. Steps may be added or deleted to methods described within the scope of the present invention.