Synthetic aperture radar data reduction for satellites

Abstract

A preprocessing technique for synthetic radar images. An embodiment of a method for preprocessing synthetic aperture radar images includes: receiving range-compressed radar data generated from raw radar image data on-board a satellite or an airborne vehicle; generating a preliminary SAR image by performing a pre-focusing on the range-compressed radar data; extracting image subsectors from the preliminary SAR image; transmitting the extracted image subsectors to an on-ground portion; reconstructing the range-compressed radar data pertaining to the extracted image subsectors; and making the range-compressed radar data pertaining to the extracted image subsectors available for a Nominal synthetic aperture radar processor, wherein the Nominal synthetic aperture radar processor is configured to generate a focused SAR image having a nominal value of image resolution that is higher than the resolution of the preliminary SAR image.

Claims

1. A method for preprocessing synthetic aperture radar images, wherein the method comprises: receiving range-compressed radar data generated from raw radar image data on-board a satellite or an airborne vehicle; generating a preliminary synthetic aperture radar, SAR, image by performing a pre-focusing on the range-compressed radar data; extracting image subsectors from the preliminary SAR image; transmitting the extracted image subsectors to an on-ground portion; reconstructing the range-compressed radar data pertaining to the extracted image subsectors; and making the range-compressed radar data pertaining to the extracted image subsectors available for a Nominal synthetic aperture radar processor, wherein the Nominal synthetic aperture radar processor is configured to generate a focused SAR image having a nominal value of image resolution that is higher than a resolution of the preliminary SAR image.

2. The method of claim 1, wherein, for performing the pre-focusing, one or more of the following steps is applied: performing a first Fast Fourier Transform on the range-compressed radar data; performing a first correction on the data outputted by the first Fast Fourier Transform; or performing a first Inverse Fast Fourier Transform on the data received from the first correction.

3. The method of claim 2, wherein at least one of the first Fast Fourier Transform or the first Inverse Fast Fourier Transform is an azimuth Fourier Transform.

4. The method of claim 1, wherein, for reconstructing the range-compressed radar data pertaining to the extracted image subsectors, one or more of the following steps is applied: performing image subsector zero-padding on the received data from the image subsector extraction; performing a second Fast Fourier Transform on the data received from the image subsector zero-padding; performing a second correction on the data outputted by the second Fast Fourier Transform; or performing a second Inverse Fast Fourier Transform on the data received from the second correction.

5. The method of claim 4, wherein at least one of the second Fast Fourier Transform or the second Inverse Fast Fourier Transform is an azimuth Fourier Transform.

6. The method of claim 1, wherein, for performing the pre-focusing, a Range-Doppler SAR focusing algorithm or an Omega-K focusing algorithm is applied, wherein the focusing algorithm is adapted to a circular orbit geometry.

7. An apparatus for preprocessing synthetic aperture radar images, wherein the apparatus comprises: a first performing component configured to receive range-compressed radar data and to perform a pre-focusing on the range-compressed radar data, resulting in a preliminary synthetic aperture radar, SAR, image at a reduced resolution compared to a nominal value; an image extraction component configured to extract image subsectors from the preliminary SAR image outputted by the first performing component; an output configured to transmit the extracted image subsectors; and a second performing component configured to receive the image subsectors transmitted by the output and to reconstruct the range-compressed radar data pertaining to the extracted image subsectors, wherein the second performing component is configured to feed the reconstructed range-compressed radar data as output data to a Nominal synthetic aperture radar processor.

8. The apparatus of claim 7, wherein the first performing component features a stage architecture of multiple stages, wherein one or more of the stages use at least one of: an input memory for receiving either range-compressed radar data in a first processing stage or output data of a previous stage; a signal processor with software programmability configured to read data from the input memory; an output memory configured to receive data from the signal processor; a Fast Fourier Transform coprocessor configured to read data in the output memory, configured to perform a Fast Fourier Transform or an Inverse Fast Fourier Transform on such data, and configured to store such transformed data after the Fast Fourier Transform or an Inverse Fast Fourier Transform has been performed; or a complex-instruction-set computer configured to control the apparatus elements.

9. The apparatus of claim 8, wherein the Fast Fourier Transform coprocessor is configured to write the transformed data after the Fast Fourier Transform or an Inverse Fast Fourier Transform has been performed to the output memory effecting a corner turn.

10. The apparatus of claim 7, wherein the first performing component is configured to process radar images in an azimuth direction or a range direction.

11. The apparatus of claim 7, wherein the first performing component is configured to apply a Range-Doppler focusing algorithm or an Omega-K focusing algorithm, wherein the applied focusing algorithm is adapted to a circular orbit geometry.

12. The apparatus of claim 8, wherein the signal processor comprises a digital signal processor or a field-programmable gate array.

13. The apparatus of claim 7, wherein the apparatus features a modular design, wherein the first performing component is configured to be integrated in a satellite or an airborne vehicle, and wherein the second performing component is configured to be operated on ground.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) These and other aspects of the invention will now be further described, by way of example only, with reference to the accompanying figures, wherein like reference numerals refer to like parts, and in which:

(2) FIG. 1 shows an example of an image frame of a fully focused SAR image with a selected image sector comprising two target points;

(3) FIG. 2 shows a raw data matrix with a submatrix required to be extracted in order to capture all relevant information pertaining to the two point target echoes shown;

(4) FIG. 3 shows a pre-focused image matrix with a submatrix required to be extracted in order to capture all the relevant information pertaining to the two point target echoes with the preprocessor described in the present invention;

(5) FIG. 4 shows an image of a fully focused point target echo without the preprocessor described in the present invention;

(6) FIG. 5 shows an image of a pre-focused point target echo with the preprocessor described in the present invention;

(7) FIG. 6 shows a 3D plot of the echo in FIG. 4 with the z-axis being 60 dB;

(8) FIG. 7 shows a 3D plot of the echo in FIG. 5 with the z-axis being 20 dB;

(9) FIG. 8 shows a block diagram of a known processing scheme widely used in satellite earth observation (prior art);

(10) FIG. 9 shows a block diagram of the software of the preprocessor described in the present invention using a Range-Doppler focusing algorithm;

(11) FIG. 10 shows a block diagram of the software of the preprocessor described in the present invention using an Omega-K focusing algorithm; and

(12) FIG. 11 shows a block diagram of the hardware of the preprocessor described in the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(13) The on-ground processor yielding the full image resolution is referred to in the current disclosure as the Nominal SAR Processor, while the simplified on-board processor which constitutes this invention, is referred to in the present disclosure as the SAR Preprocessor.

(14) FIG. 1 shows an example of an image frame of a fully focused SAR image (100) with a selected image sector (104) comprising two point targets (106, 108).

(15) If the fully focused image (100) is focused on-board a satellite, an extraction of the relevant image sector (104) from a larger sector (102) may be accomplished with a high level of accuracy. These extractions may be accurate to a pixel level. In this embodiment, the extraction comprises two data points (106, 108). However, it will be apparent to the skilled person that any number of data points may be searched for and used in the extraction. The reduction of data volume may approximately correspond to the proportion of the selected image sector (104) to the fully focused SAR image (100).

(16) The Nominal SAR Processor, however, cannot currently be implemented on-board a satellite due to size, weight and power restrictions.

(17) FIG. 2 shows a raw data matrix (102) of the larger sector with a submatrix (210) required to be extracted in order to capture all relevant information pertaining to the two point target echoes (106, 108) shown.

(18) An extraction of data, without the disclosed preprocessor (900, 1000, 1100), would not allow for an efficient extraction of small image sectors from the raw data set as is seen in FIG. 2, which comprises a large submatrix area (210). As the two point targets (106, 108) are still defocused, the respective data fields (206, 208) containing the target information of the two point targets (106, 108) are still large, shown in this embodiment as two overlapping rectangles (206, 208), and the total data field (210) to be extracted in order to encompass the two point targets (106, 108) is large. The data reduction factor is therefore very low and so, the process is not particularly efficient.

(19) FIG. 3 shows a pre-focused image matrix (102) with a submatrix (310) required to be extracted in order to capture all the relevant information pertaining to the two point target echoes (106, 108) with the preprocessor (900, 1000, 1100) described in the present invention.

(20) An extraction of an image sector (310) which is only moderately larger than a fully focused image (see FIG. 1) can be performed by the present invention as is shown in FIG. 3. This can be easily seen visually as the submatrix area (310), the respective data fields (306, 308) related to a point target 106,108 and the overlap between the data fields (306, 308) are far smaller than the one shown in FIG. 2. This therefore allows the relevant target information (310) to be extracted from the raw data matrix (102) with far more efficiency as the volume of redundant data processed by the preprocessor (900, 1000, 1100) is far less. The data reduction factor in this case is high as the pixel overlap is approximately ±100 pixels. This is a small overlap when compared to typical sizes of SAR images leading to a more efficient process as the area to be processed is far smaller.

(21) FIG. 4 shows an image of a fully focused point target echo (400) without the preprocessor (900, 1000, 1100) described in the present invention.

(22) FIG. 5 shows an image of a pre-focused point target echo (500) with the preprocessor (900, 1000, 1100) described in the present invention. The data represented in complete FIG. 5 corresponds to one of the data fields (306, 308) of FIG. 3.

(23) Referring to FIGS. 4 and 5, a fully focused point target echo is shown as obtained from the on-ground Nominal SAR processor output (400) and a pre-focused point target echo from the on-board preprocessor output (500) according to the present invention. The results from the preprocessor output (500) are allowed to be far less accurate than the results from the Nominal SAR processor (400) as the reduced resolution of the preprocessor output will suffice to extract the desired image subsectors from the full SAR image. This may significantly reduce computing power and hardware resources on board.

(24) FIG. 6 shows a 3D plot of the echo (600) in FIG. 4 with the z-axis being 60 dB.

(25) FIG. 7 shows a 3D plot of the echo (700) in FIG. 5 with the z-axis being 20 dB.

(26) Referring to FIGS. 6 and 7, the point target echoes (400, 500) as shown in FIGS. 4 and 5 can be seen more clearly in the form of two 3D plots (600, 700).

(27) FIG. 8 shows a block diagram (800) of a known processing scheme widely used in satellite earth observation. As the preprocessing according to the present invention will be used in such context it will be described as far as it is relevant for the present invention.

(28) The SAR instrument (810) generate raw data as a long sequence of range lines. Range compression (820), such as that shown in FIG. 8, is the first functional stage of most SAR image processors.

(29) After range compression (820), the transmit pulse can be stripped off the signal in each range line. If performed on-board a satellite, this procedure may reduce the number of range bins of the SAR raw data to be sent to the ground-based Nominal SAR processor by a moderate fraction such as, for example, 20%.

(30) As will be described in the following FIGS. 9 to 11 in greater detail—the preprocessor (900, 1000, 1100) according to the present invention will use the range-compressed SAR raw data (with or without the transmit pulse having been stripped off the signal in each range line) as input data. The preprocessor's output data is suitable and intended to be fed into the ground-based Nominal SAR processor (830).

(31) The Nominal SAR Processor (830) in the present context accepts range-compressed data as input and is otherwise arbitrary. It is ground-based and can be in the time domain, the frequency domain or any other type of domain. The Nominal SAR Processor (830) may also use any suitable type of processing in order to process the inputted data. The Nominal Processor (830) is however not part of this invention. The present invention may work with any selection of on-ground Nominal Processors (830).

(32) The Nominal SAR Processor (830) may typically take into account one or more of the following effects:

(33) Curved orbit

(34) Scene topography

(35) Higher order focusing error due to extended scene width

(36) Intra-pulse distortion due to sensor motion

(37) Atmospheric model

(38) Antenna model and instrument transfer function

(39) These detailed effects do not need to be included in the preprocessor (900, 1000, 1100) as the raw data may later be reconstructed without loss in the selected image subsectors (104, 210, 310). Any number of these effects may later be taken into account by the Nominal Processor (830). For this reason, the preprocessor (900, 1000, 1100) is simpler than the Nominal Processor (830). The preprocessor (900, 1000, 1100) may not depend on a large number of external interfaces, and an on-board implementation of preprocessing may require less hard- and software resources than a commonly used Nominal Processor (830). This means that the present invention may be implemented as a bridge technology before nominal on-board processing becomes feasible in the future.

(40) FIG. 9 shows a block diagram (900) of the preprocessor, e.g., of the software of the preprocessor, described in the present invention using a Range-Doppler focusing algorithm

(41) FIG. 10 shows a block diagram (1000) of the preprocessor, e.g., of the software of the preprocessor, described in the present invention using an Omega-K focusing algorithm

(42) The selection of the preprocessor stage algorithms is not prescribed by this invention. However, two preferred embodiments are presented, the first based on the Range-Doppler SAR focusing algorithm (FIG. 9) and the other on the Omega-K SAR focusing algorithm (FIG. 10). As will be obvious to the skilled person, other focusing algorithms can be implemented in conjunction with the invention, depending on the focusing requirements of the SAR mode and the Nominal Processor (830).

(43) Block diagrams of two embodiments of the preprocessor (900, 1000) are shown in FIGS. 9 and 10. The preprocessor (900, 1000) intercepts the data flow between the Range Compression module (820) and the nominal on-ground SAR processor (830) shown in FIG. 8. The preprocessor (900, 1000, 1100) may cause a significant data reduction at the space-to-ground downlink interface. The preprocessor (900, 1000) comprises, an on-board portion (the left side of the block diagrams (900, 1000)) which performs a SAR preprocessing for a pre-focusing of the SAR image and an on-ground part (right side of the block diagrams (900, 1000)) which performs an inverse SAR preprocessing for the reconstruction of the original radar data that was used as input data for the preprocessing. The data rate from on-board portion of the preprocessor to on-ground part may be significantly reduced depending on the size of the selected image subsector (310) that is due to be transmitted. The output generated by the on-ground portion may be a reconstructed raw data set which may be equal in format to and equal or smaller in size than the original set. This output can be processed by the Nominal processor (830) as though directly obtained from the SAR instruments (810) on-board the satellite. After such preprocessing, the obtained SAR image may contain the selected image subsectors (310) while the remainder of the image may be void. This preprocessing may lead to the subsectors (310) being nearly perfectly focused.

(44) Loss may only occur if the defocusing exceeds the size of the data fields (306, 308) comprising the target information (106, 108). Theoretically, some signal energy will always leak the data field (306, 308), but depending on the preprocessor focusing algorithm and the size of the data field (306, 308), the percentage of leaking can be made arbitrarily small and so, the preprocessing process may be quasi-lossless with respect to the selected image subsectors.

(45) Different preprocessor pre-focusing algorithms may be possible within the implementation of this invention. While many Nominal processors (830) today are time domain processors, the selected preprocessor (900, 1000, 1100) should preferably rely on the frequency domain for an efficient bulk focusing. A fundamental principle of the present invention is the reversibility of the complex-valued algorithms of SAR processing which may take into account the phase of the signal. The defocusing incurred with the preprocessor (900, 1000) may not deteriorate the final result as the on-board sequence of stages 1-5 may be reversed in the on-ground stages 6-9. This reversal may be done without loss.

(46) The preprocessor modules (900, 1000), e.g., software modules (900, 1000), should preferably be executed in 4 or 5 stages to perform the pre-focusing of the SAR-image. In each of the first four stages, the two-dimensional signal matrix may be processed in a dedicated direction. Each stage may end with a Fast Fourier Transform FFT and/or a corner turn.

(47) The Range-Doppler focusing algorithm will be known by the skilled person however, a short overview of the algorithm as used in the embodiment of FIG. 9 is provided.

(48) The range compression module (820) receives raw data to compress from the SAR instruments (810) just the same as in known processing systems.

(49) The preprocessor (900) receives the data after the range compression stage (820) and in stage 1 (905), performs a range walk correction on the data in order to the curvature of the range-compressed data.

(50) In stage 2 (910), the data is put through an azimuth FFT to modify the data so that it is now in the Range-Doppler domain. This modulation allows for the data to be bulk focused.

(51) Range Cell Migration Correction is performed on the data in stage 3 (915) in order to correct for the changing range delay to a point target as the target passes through the antenna beam.

(52) The data is then put through an azimuth compression and an azimuth IFFT in stage 4 (920) so that the data is in a suitable format for downlinking to the on-ground part of the preprocessor and, if needed, in a format for the outputs to be coherently summed in stage 5 (925). Stage 4 (920) additionally extracts the image subsectors from the modified data.

(53) The preprocessor (900) can be tailored to a subset of range lines of the full data take and/or to a sub-band of radar frequencies. Such tailoring may require an iteration of stages 1-4 at reduced processing requirements at a number of loops. In stage 5 (925), the data collected after each loop may be added coherently.

(54) The data from stage 4 (920) or stage 5 (925) is then output to a solid state memory (930) and downlinked (935) e.g., by a radio link or by laser communication, to the on-ground portion of the preprocessor where the data is received by a ground station storage media (940). This data may be transmitted in any format that is suitable for the solid state memory and the ground station storage media.

(55) This downlinked data is then inputted into stages 6-9 where the processing stages of stages 1-4 are reversed.

(56) Stage 6 (945) comprises zero padding which is the inverse of the subsector extraction in stage 4 (920) of the preprocessor. This data is then put through an azimuth FFT and an azimuth expansion so that efficient bulk defocusing is achieved.

(57) This data is then input into stage 7 (950) where Range Cell Migration Reconstruction is performed so that the data is reconstructed for the Nominal processor (830) to process.

(58) Stage 8 (955) comprises an azimuth IFFT so that the data is in a suitable form for the Nominal processor (830) to process.

(59) Stage 9 (960) comprises Range Walk Reconstruction to apply the original echo curvature.

(60) This data is then outputted to the Nominal processor (830) for the data to be further processed similar to the presently known processing schemes.

(61) After each of stages 1-3 and 6-8, a corner turn is performed on the outputted data.

(62) The Omega-K focusing algorithm will be known by the skilled person however, a short overview of the algorithm as used in the embodiment of FIG. 10 is provided.

(63) The range compression module (820) receives raw data to compress from the SAR instruments (810) just the same as in known processing systems.

(64) The preprocessor (1000) receives the data after the range compression stage (820) and in stage 1 (1005), performs a range FFT so that it is in a suitable format for the Omega-K focusing algorithm.

(65) In stage 2 (1010), the data is put through an azimuth resampling and an azimuth FFT to modify the data so that it is now in the frequency domain. This modulation allows for the data to be more efficiently bulk focused.

(66) A Stolt interpolation for circular orbit and a range IFFT are performed on the data in stage 3 (1015) in order to correct for the circular orbit of a satellite and point target range walk, in relation to a point target as the target passes through the antenna beam of the satellite.

(67) The data is then put through an azimuth compression and an azimuth IFFT in stage 4 (1020) so that the data is in a suitable format for downlinking to the on-ground part of the preprocessor and, if needed, in a format for the outputs to be coherently summed in stage 5 (1025). Stage 4 (1020) additionally extracts the image subsectors from the modified data.

(68) The preprocessor (1000) can be tailored to a subset of range lines of the full data take and/or to a sub-band of radar frequencies. Such tailoring may require an iteration of stages 1-4 at reduced processing requirements at a number of loops. In stage 5 (1025), the data collected after each loop may be added coherently.

(69) The data from stage 4 (1020) or stage 5 (1025) is then output to a solid state memory (1030) and downlinked (1035) to the on-ground portion of the preprocessor where the data is received by a ground station storage media (1040). This data may be transmitted in any format that is suitable for the solid state memory and the ground station storage media.

(70) This downlinked data is then inputted into stages 6-9 where the processing stages of stages 1-4 are reversed.

(71) Stage 6 (1045) comprises zero padding which is the inverse of the subsector extraction in stage 4 (1020) of the preprocessor. This data is then put through an azimuth FFT and an azimuth decompression so that efficient bulk defocusing is achieved.

(72) This data is then input into stage 7 (1050) where a second range FFT and an inverse Stolt interpolation is performed in order to reverse the accounting for range walk and circular orbit that occurred in stage 3 (1015). This leads to the extracted subsector data being reconstructed for the Nominal processor (830) to process.

(73) Stage 8 (1055) comprises an azimuth IFFT and an azimuth resampling so that the data is in a suitable form for the Nominal processor (830) to process.

(74) Stage 9 (1060) comprises a range IFFT so that the data is in a suitable format for the Nominal processor (830) to process.

(75) This data is then outputted to the Nominal processor (830) for the data to be further processed similar to the presently known processing schemes in a Nominal SAR processor.

(76) The output obtained at stage 4 (920, 1020) of the embodiments (900, 1000) are pre-focused images. From this output, only the relevant subsectors are retained. This may cause a significant reduction of the radar data.

(77) Stage 5 (925, 1025) is optional at the expense of less data reduction. If the preprocessor (900, 1000) does not use coherent summing of the output pertaining to potential subsectors, the output data of each loop may be transmitted to ground individually.

(78) Any or all of the processing of stages 1-5 in either embodiment (900, 1000) may be reversible, the subsector extraction in stage 4 (920, 1020) may or may not be reversible. Subsector extraction may be reversed in stage 6 (945, 1045) by zero padding. This procedure does not intend to reconstruct data lying outside the selected subsectors. All the other stages may be reversed in an order opposite to that of stages 1-5.

(79) The output of stage 9 (960, 1060) may be raw data containing only the data of the selected image subsectors (310). This output may be fed to the Nominal on-ground SAR processor (830) for full-performance focusing.

(80) FIG. 11 shows a block diagram (1100) of the hardware of the preprocessor described in the present invention.

(81) While the functionality of the preprocessor (1100) is reduced compared to any Nominal processor, on-board processing power requirements are still demanding for state-of-the-art flightworthy hardware. A potential on-board hardware architecture (1100), which is dedicated to the on-board part of the preprocessor (stages 1-5), is shown in FIG. 11.

(82) Stages 1-4 may be processed using a stage architecture comprising the following processing elements:

(83) An input memory (1105) to the stage

(84) A digital signal processor DSP (1130) with software programmability

(85) An output memory (1110) from the stage

(86) An FFT coprocessor (1165) which reads from the output memory (1110), performs an FFT or IFFT, and stores the output data in corner-turned order. The meaning of corner-turn of 2-d data sets will be known to the person skilled in the art: When a 2-d data set is read from or written to memory in linear sequence and with priority in one dimension, a corner-turn switches from this priority and from this dimension to the other.

(87) Two physically distinct memory units Memory A and Memory B are preferably utilized as input and output memories for a given digital signal processor DSP, respectively. The provision of two memories rather than one increases avoids input/output interlacing of the DSP and thereby increases processing speed of the preprocessor.

(88) Each stage may have one or more of these processing elements.

(89) A stage architecture may be implemented once, and the stages 1-5 processed sequentially. Alternatively, multiple stages can be implemented in parallel, for pipeline processing.

(90) Each stage may operate along a dedicated signal direction, either in range or in azimuth direction. For efficiency, the stages may be processed in a line-by-line sequence, performing standard DSP-supported signal processing functions such as vector pointwise multiplication, filtering, interpolation, resampling.

(91) Each stage may terminate with an FFT or an IFFT in the dedicated direction, performed by the fast FFT-Coprocessor (1165). The coprocessor (1165) may write the data to the output memory effecting a corner turn.

(92) If the preprocessor operates in iterative manner, Stage 5 (1150) may perform a coherent summation of the outputs of the preceding iterative loops.

(93) A standard complex-instruction-set computer (CISC) (1155) may be used as a control unit for the overall on-board preprocessor architecture (1100). The CISC (1155) may control and synchronize the elements of the stage architecture. It may also provide auxiliary data for stages 1-5 obtained from complex-valued non-linear computations. It may also instruct one or more of the stages of the architecture (1100) to perform an image subsector extraction on the data received by the respective stage.

(94) A potential alternative to using DSPs in the Stage Architecture may be using one or more field-programmable gate arrays FPGA.

(95) Regarding the issue of flightworthiness for satellite implementation, only dedicated elements of the preprocessor hardware may be needed to be fully radiation-hardened. Single-event upsets (SEU), for example, must not contaminate program execution but at low rates are insignificant in relation to the full set of data vectors which may be handled by this architecture.

(96) The input (1105) of stage 1 (1130) is the output of the SAR instruments (810) subjected to standard range-compression. The output (1147) of stage 4 (1145) or the output of stage 5 (1150) may be output to the solid state mass memory (1160) of the architecture depending on whether the preprocessor uses an iterative process. This mass memory (1160) may then downlink the outputted data in a suitable format to an on-ground preprocessing architecture.

(97) As can be seen from FIG. 11, the data output from each stage is then used as the input for the next stage. For example, the output (1110) of stage 1 (1130) is then used as the input (1115) for stage 2 (1135). Likewise, the output (1120) of stage 2 (1135) is used as the input (1125) for stage 3 (1140), etc.

(98) While at least one exemplary embodiment of the present invention(s) is disclosed herein, it should be understood that modifications, substitutions and alternatives may be apparent to one of ordinary skill in the art and can be made without departing from the scope of this disclosure. This disclosure is intended to cover any adaptations or variations of the exemplary embodiment(s). In addition, in this disclosure, the terms “comprise” or “comprising” do not exclude other elements or steps, the terms “a” or “one” do not exclude a plural number, and the term “or” means either or both. Furthermore, characteristics or steps which have been described may also be used in combination with other characteristics or steps and in any order unless the disclosure or context suggests otherwise. This disclosure hereby incorporates by reference the complete disclosure of any patent or application from which it claims benefit or priority.