Power amplifier circuit
11558014 · 2023-01-17
Assignee
Inventors
- Satoshi Tanaka (Kyoto, JP)
- Satoshi Arayashiki (Kyoto, JP)
- Satoshi Goto (Kyoto, JP)
- Yusuke Tanaka (Kyoto, JP)
Cpc classification
H03F2203/45652
ELECTRICITY
H03F2200/411
ELECTRICITY
H03F2200/102
ELECTRICITY
International classification
Abstract
A power amplifier circuit includes a first transistor having an emitter electrically connected to a common potential, a base to which a first high-frequency signal is input, and a collector from which a third high-frequency signal is output; a second transistor having an emitter electrically connected to the common potential, a base to which a second high-frequency signal is input, and a collector from which a fourth high-frequency signal is output; a first capacitance circuit electrically connected between the collector of the second transistor and the base of the first transistor; and a second capacitance circuit electrically connected between the collector of the first transistor and the base of the second transistor.
Claims
1. A power amplifier circuit configured to amplify a first high-frequency differential signal that includes a first high-frequency signal of positive polarity and a second high-frequency signal of negative polarity, and to output a second high-frequency differential signal that includes a third high-frequency signal of negative polarity and a fourth high-frequency signal of positive polarity, the power amplifier circuit comprising: a first transistor having a first terminal, a second terminal, and a third terminal, the first high-frequency signal being input to the first terminal, and the third high-frequency signal being output from the second terminal; a second transistor having a fourth terminal, a fifth terminal, and a sixth terminal, the second high-frequency signal being input to the fourth terminal, and the fourth high-frequency signal being output from the fifth terminal; a first capacitance circuit electrically connected between the fifth terminal of the second transistor and the first terminal of the first transistor; and a second capacitance circuit electrically connected between the second terminal of the first transistor and the fourth terminal of the second transistor, wherein the first capacitance circuit comprises a third transistor having a seventh terminal, an eighth terminal, and a ninth terminal, the eighth terminal being electrically connected to the fifth terminal of the second transistor, and the seventh terminal being electrically connected to the first terminal of the first transistor, wherein the second capacitance circuit comprises a fourth transistor having a tenth terminal, an eleventh terminal, and a twelfth terminal, the eleventh terminal being electrically connected to the second terminal of the first transistor and the tenth terminal being electrically connected to the fourth terminal of the second transistor, wherein the ninth terminal of the third transistor is electrically connected to the seventh terminal of the third transistor, and wherein the twelfth terminal of the fourth transistor is electrically connected to the tenth terminal of the fourth transistor.
2. The power amplifier circuit according to claim 1, wherein each of the first transistor and the second transistor is a field effect transistor.
3. The power amplifier circuit according to claim 1, wherein each of the first transistor and the second transistor is a heterojunction bipolar transistor.
4. The power amplifier circuit according to claim 1, wherein each of the third transistor and the fourth transistor is a heterojunction bipolar transistor.
5. The power amplifier circuit according to claim 1, wherein the third terminal of the first transistor and the sixth terminal of the second transistor are electrically connected to a common potential.
6. The power amplifier circuit according to claim 1, wherein a capacitance between the seventh terminal and the eighth terminal of the third transistor is equal to a capacitance between the first terminal and the second terminal of the first transistor, and wherein a capacitance between the tenth terminal and the eleventh terminal of the fourth transistor is equal to a capacitance between the fourth terminal and the fifth terminal of the second transistor.
7. The power amplifier circuit according to claim 1, wherein a size of the third transistor is equal to a size of the first transistor, and wherein a size of the fourth transistor is equal to a size of the second transistor.
8. A power amplifier circuit configured to amplify a first high-frequency differential signal that includes a first high-frequency signal of positive polarity and a second high-frequency signal of negative polarity, and to output a second high-frequency differential signal that includes a third high-frequency signal of negative polarity and a fourth high-frequency signal of positive polarity, the power amplifier circuit comprising: a first transistor having a first terminal, a second terminal, and a third terminal, the first high-frequency signal being input to the first terminal or the third high-frequency signal being output from the second terminal; a second transistor having a fourth terminal, a fifth terminal, and a sixth terminal, the second high-frequency signal being input to the fourth terminal, or the fourth high-frequency signal being output from the fifth terminal; a first capacitance circuit electrically connected between the fifth terminal of the second transistor and the first terminal of the first transistor; and a second capacitance circuit electrically connected between the second terminal of the first transistor and the fourth terminal of the second transistor, wherein the first capacitance circuit comprises a third transistor having a seventh terminal, an eighth terminal, and a ninth terminal, the eighth terminal being electrically connected to the fifth terminal of the second transistor, and the seventh terminal being electrically connected to the first terminal of the first transistor, wherein the second capacitance circuit comprises a fourth transistor having a tenth terminal, an eleventh terminal, and a twelfth terminal, the eleventh terminal being electrically connected to the second terminal of the first transistor, and the tenth terminal being electrically connected to the fourth terminal of the second transistor, wherein the ninth terminal of the third transistor is electrically connected to the seventh terminal of the third transistor, and wherein the twelfth terminal of the fourth transistor is electrically connected to the tenth terminal of the fourth transistor.
9. The power amplifier circuit according to claim 8, wherein each of the first transistor and the second transistor is a field effect transistor.
10. The power amplifier circuit according to claim 8, wherein each of the first transistor and the second transistor is a heterojunction bipolar transistor.
11. The power amplifier circuit according to claim 8, wherein each of the third transistor and the fourth transistor is a heterojunction bipolar transistor.
12. The power amplifier circuit according to claim 8, wherein a size of the third transistor is equal to a size of the first transistor, and wherein a size of the fourth transistor is equal to a size of the second transistor.
Description
BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
DETAILED DESCRIPTION
(10) Embodiments of a power amplifier circuit according to the present disclosure will be described in detail below with reference to the drawings. Note that the present disclosure is not to be limited by these embodiments. Each embodiment is merely illustrative, and it goes without necessarily saying that configurations described in different embodiments can be partially replaced or combined. In second and subsequent embodiments, a description of things in common with a first embodiment is omitted, and only respects in which the second and subsequent embodiments differ from the first embodiment will be described. In particular, similar function effects achieved by similar configurations are not repeatedly described in each embodiment.
First Embodiment
(11)
(12) The high-frequency differential signal RF.sub.1 corresponds to “first high-frequency differential signal” in the present disclosure. The high-frequency signal RF.sub.1P corresponds to “first high-frequency signal” in the present disclosure. The high-frequency signal RF.sub.1N corresponds to “second high-frequency signal” in the present disclosure.
(13) The power amplifier 1 can be used in a mobile communication device, such as a cellular phone device, to transmit various signals, such as voice and data, to a base station. The power amplifier 1 may be formed on one semiconductor chip (die).
(14) The power amplifier 1 includes a first-stage power amplifier circuit 2 and a second-stage power amplifier circuit 3. In the first embodiment, although the number of power amplifier circuit stages is two, the present disclosure is not limited to this. The number of power amplifier circuit stages may be one or three or more.
(15) The power amplifier circuit 2 amplifies the high-frequency differential signal RF.sub.1. Subsequently, the power amplifier circuit 2 outputs a high-frequency differential signal RF.sub.2 that has been amplified to the power amplifier circuit 3. The high-frequency differential signal RF.sub.2 includes a high-frequency signal RF.sub.2P of positive polarity and a high-frequency signal RF.sub.2N of negative polarity. The power amplifier circuit 3 amplifies the high-frequency differential signal RF.sub.2. Subsequently, the power amplifier circuit 3 outputs the high-frequency differential signal RF.sub.3 that has been amplified.
(16) The high-frequency differential signal RF.sub.2 corresponds to “second high-frequency differential signal” in the present disclosure. The high-frequency signal RF.sub.2N corresponds to “third high-frequency signal” in the present disclosure. The high-frequency signal RF.sub.2P corresponds to “fourth high-frequency signal” in the present disclosure.
(17) Although frequencies of the high-frequency differential signal RF.sub.1, the high-frequency differential signal RF.sub.2, and the high-frequency differential signal RF.sub.3 range, for example, from about several hundred megahertz (MHz) to about several tens of gigahertz (GHz), the present disclosure is not limited to this.
(18) A configuration of the power amplifier circuit 2 will be described below. A configuration of the power amplifier circuit 3 is similar to that of the power amplifier circuit 2, and a description thereof is therefore omitted.
(19) The power amplifier circuit 2 is a differential amplifier circuit. The power amplifier circuit 2 includes transistors Q.sub.1 and Q.sub.2.
(20) The transistor Q.sub.1 corresponds to “first transistor” in the present disclosure. The transistor Q.sub.2 corresponds to “second transistor” in the present disclosure.
(21) In the first embodiment, although each of the transistors Q.sub.1 and Q.sub.2 is, for example, a heterojunction bipolar transistor (HBT), the present disclosure is not limited to this. Each of the transistors Q.sub.1 and Q.sub.2 may be, for example, a field-effect transistor (FET). Each of the transistors Q.sub.1 and Q.sub.2 may be a multi-finger transistor including a plurality of unit transistors (also referred to as fingers) electrically connected in parallel. A unit transistor refers to a minimum component constituting a transistor.
(22) An emitter of the transistor Q.sub.1 and an emitter of the transistor Q.sub.2 are electrically connected to a reference potential. Although the reference potential is, for example, a ground potential, the present disclosure is not limited to this.
(23) The transistor Q.sub.1 has a collector-base capacitance C.sub.CB1. The collector-base capacitance C.sub.CB1 is a junction capacitance between a collector (N-type semiconductor) and a base (P-type semiconductor). Similarly, the transistor Q.sub.2 has a collector-base capacitance C.sub.CB2.
(24) The power amplifier circuit 2 includes bias circuits 11 and 12. The bias circuit 11 receives a supply of a power-supply potential V.sub.ccb and outputs a fixed bias potential (bias current) to the base of the transistor Q.sub.1. The bias circuit 12 receives a supply of the power-supply potential V.sub.ccb and outputs a fixed bias potential (bias current) to a base of the transistor Q.sub.2.
(25) The power amplifier circuit 2 includes choke inductors 13 and 14. The collector of the transistor Q.sub.1 is electrically connected to a power supply circuit 31 through the choke inductor 13. A collector of the transistor Q.sub.2 is electrically connected to the power supply circuit 31 through the choke inductor 14.
(26) The choke inductors 13 and 14 serve a function of blocking passage of alternating-current power. The choke inductors 13 and 14 have sufficiently high impedances for frequency bands of the high-frequency differential signal RF.sub.1 and the high-frequency differential signal RF.sub.2. That is, when the frequency bands of the high-frequency differential signal RF.sub.1 and the high-frequency differential signal RF.sub.2 are considered, the impedances of the choke inductors 13 and 14 are negligible. Furthermore, the choke inductors 13 and 14 inhibit leakage of the high-frequency differential signal RF.sub.1 and the high-frequency differential signal RF.sub.2 to the power supply circuit 31.
(27) The power supply circuit 31 outputs a power-supply potential V.sub.CC1 based on an amplitude level of the high-frequency differential signal RF.sub.1 to the collector of the transistor Q.sub.1 through the choke inductor 13 and also to the collector of the transistor Q.sub.2 through the choke inductor 14.
(28) That is, the power supply circuit 31 is an envelope tracker that performs envelope tracking control for improving power efficiency by controlling the power-supply potential V.sub.CC1 of the power amplifier circuit 2 in accordance with the amplitude level of the high-frequency differential signal RF.sub.1.
(29) The power amplifier circuit 2 includes coupling capacitors 15 and 16. One end of the coupling capacitor 15 is electrically connected to the base of the transistor Q.sub.1. The high-frequency signal RF.sub.1P of positive polarity is input to the base of the transistor Q.sub.1 through the coupling capacitor 15. One end of the coupling capacitor 16 is electrically connected to the base of the transistor Q.sub.2. The high-frequency signal RF.sub.1N of negative polarity is input to the base of the transistor Q.sub.2 through the coupling capacitor 16.
(30) Each of the transistors Q1 and Q2 operates as a common-emitter circuit in which the collector serves as an output. Hence, the transistor Q.sub.1 outputs, from the collector, the high-frequency signal RF.sub.2N of negative polarity obtained by inverting amplification of the high-frequency signal RF.sub.1P of positive polarity. Furthermore, the transistor Q.sub.2 outputs, from the collector, the high-frequency signal RF.sub.2P of positive polarity obtained by inverting amplification of the high-frequency signal RF.sub.1N of negative polarity.
(31) Since the power amplifier circuit 2 is a differential amplifier circuit, the present disclosure is not limited to the size (the number of fingers) of the transistor Q.sub.1 as equal to the size (the number of fingers) of the transistor Q.sub.2.
(32) The power amplifier circuit 2 further includes transistors CP.sub.1 and CP.sub.2.
(33) A collector of the transistor CP.sub.1 is electrically connected to the collector of the transistor Q.sub.2. A base of the transistor CP.sub.1 is electrically connected to the base of the transistor Q.sub.1.
(34) In the first embodiment, although an emitter of the transistor CP.sub.1 is electrically connected to the base of the transistor CP.sub.1 (the base of the transistor Q.sub.1), the present disclosure is not limited to this. The emitter of the transistor CP.sub.1 may be open (floating) without necessarily being connected anywhere. Note that, when the emitter of the transistor CP.sub.1 is electrically connected to the base of the transistor CP.sub.1, the potential of the emitter of the transistor CP.sub.1 is stabilized, noise immunity is enhanced, and noise can be reduced.
(35) A collector of the transistor CP.sub.2 is electrically connected to the collector of the transistor Q.sub.1. A base of the transistor CP.sub.2 is electrically connected to the base of the transistor Q.sub.2.
(36) In the first embodiment, although an emitter of the transistor CP.sub.2 is electrically connected to the base of the transistor CP.sub.2 (the base of the transistor Q.sub.2), the present disclosure is not limited to this. The emitter of the transistor CP.sub.2 may be open (floating) without necessarily being connected anywhere. Note that, when the emitter of the transistor CP.sub.2 is electrically connected to the base of the transistor CP.sub.2, the potential of the emitter of the transistor CP.sub.2 is stabilized, noise immunity is enhanced, and noise can be reduced.
(37) That is, the transistor CP.sub.1 and the transistor CP.sub.2 respectively provide cross-coupling between the base of the transistor Q.sub.1 and the collector of the transistor Q.sub.2 and cross-coupling between the base of the transistor Q.sub.2 and the collector of the transistor Q.sub.1.
(38) The transistor CP.sub.1 corresponds to “third transistor” and “first capacitance circuit” in the present disclosure. When a base potential of the transistor Q.sub.1 is equal to a base potential of the transistor Q.sub.2, a collector-base capacitance value of the transistor CP.sub.1 is often set at roughly the same value as the collector-base capacitance C.sub.CB2. The transistor CP.sub.2 corresponds to “fourth transistor” and “second capacitance circuit” in the present disclosure. When the base potential of the transistor Q.sub.1 is equal to the base potential of the transistor Q.sub.2, a collector-base capacitance value of the transistor CP.sub.2 is often set at roughly the same value as the collector-base capacitance C.sub.CB1.
(39) Prior to description of actions of the transistors CP.sub.1 and CP.sub.2, a comparative example will be described. As an example of a comparative example, the case where the power amplifier circuits 2 and 3 do not include the transistors CP.sub.1 and CP.sub.2 is assumed.
(40)
(41) An output signal output from a collector is fed back to a base through the collector-base capacitance. Here, a common-emitter circuit is an inverting amplifier circuit. That is, the polarity of a voltage of an output signal output from the collector is inverted from the polarity of a voltage of an input signal input to the base. Hence, the collector-base capacitance has a negative feedback action and has an action of reducing gain. The strength of negative feedback (the degree of reduction in gain) increases as the collector-base capacitance increases (the collector-base voltage decreases), and the strength of negative feedback decreases as the collector-base capacitance decreases (the collector-base voltage increases). That is, the gain of a power amplifier circuit has a strong power-supply voltage dependence.
(42)
(43) As described above, the strength of negative feedback (the degree of reduction in gain) increases as the collector-base capacitance increases (the collector-base voltage decreases), and the strength of negative feedback decreases as the collector-base capacitance decreases (the collector-base voltage increases). Hence, as illustrated in
(44)
(45) However, when a modulated signal band of the high-frequency signal is high, the power supply circuit 31 is not able to control a power-supply voltage of the power amplifier circuit smoothly. That is, a waveform of the power-supply voltage changes in a stepped manner (discretely).
(46)
(47) When a modulated signal band of the high-frequency signal is high, the power supply circuit 31 that performs envelope tracking by digital control is not able to control a power-supply voltage of the power amplifier circuit smoothly. That is, as represented by the waveform 72 or 73, the waveform of the power-supply voltage changes in a stepped manner (discretely).
(48) When the power-supply voltage dependence of gain is strong, a harmonic component (high-frequency component) included in the waveform 72 or 73 is modulated into a band of the high-frequency signal and superimposed on a high-frequency output signal.
(49)
(50) Here, referring back to
(51) The collector of the transistor CP.sub.1 is electrically connected to the collector of the transistor Q.sub.2, and the base of the transistor CP.sub.1 is electrically connected to the base of the transistor Q.sub.1. Hence, the high-frequency signal RF.sub.2P is fed back to the base of the transistor Q.sub.1 through a collector-base capacitance of the transistor CP.sub.1. Here, the polarity of a voltage of the high-frequency signal RF.sub.2P output from the collector of the transistor Q.sub.2 is the same as the polarity of a voltage of the high-frequency signal RF.sub.1P input to the base of the transistor Q.sub.1. Thus, the collector-base capacitance of the transistor CP.sub.1 has a positive feedback action and has an action of increasing the gain of the transistor Q.sub.1.
(52) The collector-base capacitance of the transistor CP.sub.1 can be substantially equal to the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1. That is, the size (the number of fingers) of the transistor CP.sub.1 can be equal to the size (the number of fingers) of the transistor Q.sub.1. Thus, the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.1 is substantially equal to the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1. Note that the present disclosure is not limited to this.
(53) Similarly, the collector of the transistor CP.sub.2 is electrically connected to the collector of the transistor Q.sub.1, and the base of the transistor CP.sub.2 is electrically connected to the base of the transistor Q.sub.2. Hence, the high-frequency signal RF.sub.2N is fed back to the base of the transistor Q.sub.2 through a collector-base capacitance of the transistor CP.sub.2. Here, the polarity of a voltage of the high-frequency signal RF.sub.2N output from the collector of the transistor Q.sub.1 is the same as the polarity of a voltage of the high-frequency signal RF.sub.1N input to the base of the transistor Q.sub.2. Thus, the collector-base capacitance of the transistor CP.sub.2 has a positive feedback action and has an action of increasing the gain of the transistor Q.sub.2.
(54) The collector-base capacitance of the transistor CP.sub.2 can be substantially equal to the collector-base capacitance C.sub.CB2 of the transistor Q.sub.2. That is, the size (the number of fingers) of the transistor CP.sub.2 can be equal to the size (the number of fingers) of the transistor Q.sub.2. Thus, the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.2 is substantially equal to the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB2 of the transistor Q.sub.2. Note that the present disclosure is not limited to this.
(55) For example, in the case where the voltage amplitudes of the high-frequency differential signals RF.sub.1 and RF.sub.2 are small, the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 is substantially equal to the collector-base capacitance of the transistor CP.sub.1. Additionally, a collector potential of the transistor Q.sub.1 is substantially equal to a collector potential of the transistor Q.sub.2. Furthermore, the base potential of the transistor Q.sub.1 is substantially equal to the base potential of the transistor Q.sub.2. Hence, the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 is substantially equal to the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.1. Thus, the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 is compensated for by the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.1.
(56)
(57) In the power amplifier circuit 2, the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 is compensated for by the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.1. Similarly, the amount of decrease in voltage due to the negative feedback action of the collector-base capacitance C.sub.CB2 of the transistor Q.sub.2 is compensated for by the amount of increase in voltage due to the positive feedback action of the collector-base capacitance of the transistor CP.sub.2. Hence, in the power amplifier circuit 2, even when the collector-base voltages of the transistors Q.sub.1 and Q.sub.2 change, a reduction in gain is inhibited. That is, the gain of the power amplifier circuit has a weak power-supply voltage dependence.
(58) In the power amplifier circuit 2, the power-supply voltage dependence of gain is weak. Hence, the power amplifier circuit 2 can prevent a harmonic component (high-frequency component) of a power-supply voltage (see the waveform 72 or 73 in
(59) Furthermore, even when the power supply circuit 31 changes the collector-base voltages from V.sub.2, to V.sub.3, to V.sub.4, to V.sub.5, and then to V.sub.6 in a stepped manner (discretely), the power amplifier circuit 2 can reduce variations in gain as represented by a waveform 101. For example, even when the power supply circuit 31 changes the collector-base voltages from V.sub.2 to V.sub.4 when power of the high-frequency signal is P.sub.1, the amount of change in the gain of the power amplifier circuit is reduced in comparison with that represented by the arrow 82 (see
(60) As described above, the power amplifier circuit 2 includes the transistors CP.sub.1 and CP.sub.2 and thereby can weaken the power-supply voltage dependence of gain.
(61) Thus, the power amplifier circuit 2 can prevent a harmonic wave of a power-supply voltage (see the waveform 72 or 73 in
(62) Furthermore, even when the power supply circuit 31 changes the collector-base voltages in a stepped manner (discretely), the power amplifier circuit 2 can reduce variations in gain. Thus, the power amplifier circuit 2 can reduce nonlinearity and increase linearity.
(63) As a result, the power amplifier circuit 2 can perform envelope tracking.
Second Embodiment
(64)
(65) The capacitor C.sub.1 corresponds to “first capacitor” in the present disclosure. The capacitor C.sub.2 corresponds to “second capacitor” in the present disclosure.
(66) The capacitor C.sub.3 corresponds to “third capacitor” in the present disclosure. A parallel-connected circuit including the transistor CP.sub.1 and the capacitor C.sub.3 corresponds to “first capacitance circuit” in the present disclosure.
(67) The capacitor C.sub.4 corresponds to “fourth capacitor” in the present disclosure. A parallel-connected circuit including the transistor CP.sub.2 and the capacitor C.sub.4 corresponds to “second capacitance circuit” in the present disclosure.
(68) The capacitor C.sub.1 is electrically connected between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.1. That is, the capacitor C.sub.1 is connected in parallel with the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1. Hence, a total capacitance between the collector and the base of the transistor Q.sub.1 is the sum of a capacitance of the capacitor C.sub.1 and the collector-base capacitance C.sub.CB1.
(69) The collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 is a nonlinear capacitance, whereas the capacitance of the capacitor C.sub.1 is a linear capacitance. Hence, with respect to the total capacitance between the collector and the base of the transistor Q.sub.1, nonlinearity is reduced, and linearity is increased.
(70) From the point of view of reducing the nonlinearity of the total capacitance between the collector and the base of the transistor Q.sub.1, the capacitance of the capacitor C.sub.1 can be increased. Note that increasing the capacitance of the capacitor C.sub.1 too much is likely to result in a reduction in frequency characteristics of the power amplifier circuit 2A, or the like. Hence, the capacitance of the capacitor C.sub.1 can be increased as much as possible within a range in which a reduction in frequency characteristics of the power amplifier circuit 2A, or the like is allowable. Note that the present disclosure is not limited to this.
(71) The capacitor C.sub.1 is provided, and the capacitor C.sub.3 is correspondingly electrically connected between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.1. That is, the capacitor C.sub.3 is connected in parallel with the collector-base capacitance of the transistor CP.sub.1. Hence, a total capacitance between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.1 is the sum of a capacitance of the capacitor C.sub.3 and the collector-base capacitance of the transistor CP.sub.1.
(72) The collector-base capacitance of the transistor CP.sub.1 is a nonlinear capacitance, whereas the capacitance of the capacitor C.sub.3 is a linear capacitance. Hence, with respect to the total capacitance between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.1, nonlinearity is reduced, and linearity is increased.
(73) The capacitance of the capacitor C.sub.3 can be substantially equal to the capacitance of the capacitor C.sub.1. Thus, the amount of decrease in voltage due to the negative feedback action of the total capacitance between the collector and the base of the transistor Q.sub.1 is compensated for by the amount of increase in voltage due to the positive feedback action of the total capacitance between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.1. Note that the present disclosure is not limited to this.
(74) Similarly, the capacitor C.sub.2 is electrically connected between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.2. That is, the capacitor C.sub.2 is connected in parallel with the collector-base capacitance C.sub.CB2 of the transistor Q.sub.2. Hence, a total capacitance between the collector and the base of the transistor Q.sub.2 is the sum of a capacitance of the capacitor C.sub.2 and the collector-base capacitance C.sub.CB2.
(75) The collector-base capacitance C.sub.CB2 of the transistor Q.sub.2 is a nonlinear capacitance, whereas the capacitance of the capacitor C.sub.2 is a linear capacitance. Hence, with respect to the total capacitance between the collector and the base of the transistor Q.sub.2, nonlinearity is reduced, and linearity is increased.
(76) From the point of view of reducing the nonlinearity of the total capacitance between the collector and the base of the transistor Q.sub.2, the capacitance of the capacitor C.sub.2 can be increased. Note that increasing the capacitance of the capacitor C.sub.2 too much is likely to result in a reduction in frequency characteristics of the power amplifier circuit 2A, or the like. Hence, the capacitance of the capacitor C.sub.2 can be increased as much as possible within a range in which a reduction in frequency characteristics of the power amplifier circuit 2A, or the like is allowable. Note that the present disclosure is not limited to this.
(77) The capacitor C.sub.2 is provided, and the capacitor C.sub.4 is correspondingly electrically connected between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.2. That is, the capacitor C.sub.4 is connected in parallel with the collector-base capacitance of the transistor CP.sub.2. Hence, a total capacitance between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.2 is the sum of a capacitance of the capacitor C.sub.4 and the collector-base capacitance of the transistor CP.sub.2.
(78) The collector-base capacitance of the transistor CP.sub.2 is a nonlinear capacitance, whereas the capacitance of the capacitor C.sub.4 is a linear capacitance. Hence, with respect to the total capacitance between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.2, nonlinearity is reduced, and linearity is increased.
(79) The capacitance of the capacitor C.sub.4 can be substantially equal to the capacitance of the capacitor C.sub.2. Thus, the amount of decrease in voltage due to the negative feedback action of the total capacitance between the collector and the base of the transistor Q.sub.2 is compensated for by the amount of increase in voltage due to the positive feedback action of the total capacitance between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.2. Note that the present disclosure is not limited to this.
(80) As described above, since the nonlinearity of the capacitance of each element is reduced and the linearity is increased, the power amplifier circuit 2A can perform amplification. Thus, the power amplifier circuit 2A can perform envelope tracking.
Third Embodiment
(81)
(82) The capacitor C.sub.1 corresponds to “first capacitor” in the present disclosure. The capacitor C.sub.2 corresponds to “second capacitor” in the present disclosure. The capacitor C.sub.3 corresponds to “third capacitor” and “first capacitance circuit” in the present disclosure. The capacitor C.sub.4 corresponds to “fourth capacitor” and “second capacitance circuit” in the present disclosure.
(83) It is also conceivable that, if the greater part of the amount of decrease in voltage due to the negative feedback action of the total capacitance between the collector and the base of the transistor Q.sub.1 is compensated for by the amount of increase in voltage due to the positive feedback action of the total capacitance between the collector of the transistor Q.sub.2 and the base of the transistor Q.sub.1, complete compensation does not have to be achieved. From this point of view, the power amplifier circuit 2B does not include the transistor CP.sub.1.
(84) The capacitance of the capacitor C.sub.3 can be equal to the total capacitance between the collector and the base of the transistor Q.sub.1. However, the total capacitance between the collector and the base of the transistor Q.sub.1 is nonlinear, whereas the capacitance of the capacitor C.sub.3 is linear. Hence, the capacitance of the capacitor C.sub.3 is not able to be made completely equal to the total capacitance between the collector and the base of the transistor Q.sub.1. Thus, the capacitance of the capacitor C.sub.3 can be approximately equal to the total capacitance between the collector and the base of the transistor Q.sub.1 within a range in which a collector-base voltage of the transistor Q.sub.1 varies. That is, the capacitance of the capacitor C.sub.3 can be the sum of the capacitance of the capacitor C.sub.1 and the collector-base capacitance C.sub.CB1 of the transistor Q.sub.1 within the range in which the collector-base voltage of the transistor Q.sub.1 varies. Note that the present disclosure is not limited to this.
(85) Similarly, it is also conceivable that, if the greater part of the amount of decrease in voltage due to the negative feedback action of the total capacitance between the collector and the base of the transistor Q.sub.2 is compensated for by the amount of increase in voltage due to the positive feedback action of the total capacitance between the collector of the transistor Q.sub.1 and the base of the transistor Q.sub.2, complete compensation does not have to be achieved. From this point of view, the power amplifier circuit 2B does not include the transistor CP.sub.2.
(86) The capacitance of the capacitor C.sub.4 can be equal to the total capacitance between the collector and the base of the transistor Q.sub.2. However, the total capacitance between the collector and the base of the transistor Q.sub.2 is nonlinear, whereas the capacitance of the capacitor C.sub.4 is linear. Hence, the capacitance of the capacitor C.sub.4 is not able to be made completely equal to the total capacitance between the collector and the base of the transistor Q.sub.2. Thus, the capacitance of the capacitor C.sub.4 can be approximately equal to the total capacitance between the collector and the base of the transistor Q.sub.2 within a range in which a collector-base voltage of the transistor Q.sub.2 varies. That is, the capacitance of the capacitor C.sub.4 can be the sum of the capacitance of the capacitor C.sub.2 and the collector-base capacitance C.sub.CB2 of the transistor Q.sub.2 within the range in which the collector-base voltage of the transistor Q.sub.2 varies. Note that the present disclosure is not limited to this.
(87) As described above, in comparison with the power amplifier circuit 2A, the power amplifier circuit 2B can reduce the number of elements. Thus, in comparison with the power amplifier circuit 2A, the power amplifier circuit 2B enables a reduction in circuit size.
(88) The above-described embodiments are intended to facilitate understanding of the present disclosure, but are not intended for a limited interpretation of the present disclosure. The present disclosure can be changed or improved without necessarily departing from the gist thereof and includes equivalents thereof.
(89) While embodiments of the disclosure have been described above, it is to be understood that variations and modifications will be apparent to those skilled in the art without necessarily departing from the scope and spirit of the disclosure. The scope of the disclosure, therefore, is to be determined solely by the following claims.