Cyber synchronous machine (cybersync machine)
10509373 ยท 2019-12-17
Inventors
Cpc classification
G01R15/142
PHYSICS
H02J3/46
ELECTRICITY
G01R19/2513
PHYSICS
G05B13/024
PHYSICS
International classification
G01R15/14
PHYSICS
Abstract
This invention discloses a controller and method for a cyber synchronous machine (CSM, in short, cybersync machine), namely, a power electronic converter that is seamlessly equipped with computational algorithms (i.e., the controller) to represent the intrinsic and fundamental principles of physical synchronous machines. The CSM can be operated in the grid-connected mode or the islanded mode to take part in the regulation of the frequency and the voltage. The controller also includes auxiliary blocks to achieve self-synchronization without measuring or estimating the grid frequency and the regulation of real power and reactive power to the given reference values without static errors. The control signal for the power electronic converter can be the output voltage generated by the engendering block or the sum of the output voltage and the virtual current. A unique feature of the disclosed CSM is that, if the system it is connected to is passive, then the whole system is passive and, hence, is guaranteed to be stable.
Claims
1. A controller to operate a power electronic converter as a cyber synchronous machine (CSM), comprising a torque-frequency channel configured to generate a frequency according to first inputs consisting of a torque set-point, a negative torque feedback signal and a frequency reference; a quorte-flux channel configured to generate a flux according to second inputs consisting of a quorte set-point, a negative quorte feedback signal and a flux reference; an engendering block configured to receive the frequency generated in the torque-frequency channel, the flux generated in the quorte-flux channel, and an input current, wherein the engendering block is configured to generate an output voltage, a torque signal, a quorte signal, the negative torque feedback signal, and the negative quorte feedback signal; a virtual impedance configured to generate a virtual current according to a difference of two voltages; a switch configured to choose the virtual current or an external current as the input current to the engendering block; a first integrator block with a reset input configured to generate an offset signal that is added to a rated frequency to form the frequency reference for the torque-frequency channel; and a second integrator block with a reset input configured to generate an offset signal that is added to a rated flux to form the flux reference for the quorte-flux channel.
2. The controller of claim 1, wherein the engendering block contains an oscillator that generates sinusoidal and cosinusoidal signals, as its states, at the frequency generated by the torque-frequency channel.
3. The controller of claim 2, wherein the engendering block generates a sinusoidal vector consisting of equally spaced sinusoidal signals, according to a number of phases of a converter, which arc represented as a linear combination of the sinusoidal and cosinusoidal signals generated by the oscillator.
4. The controller of claim 3, wherein the engendering block generates the output voltage by multiplying the sinusoidal vector with the frequency generated in the torque-frequency channel and the flux generated in the quorte-flux channel.
5. The controller of claim 3, wherein the engendering block generates the torque signal by multiplying the flux with an inner product of the sinusoidal vector and the input current.
6. The controller of claim 2, wherein the engendering block generates a cosinusoidal vector consisting of equally spaced cosinusoidal signals, according to a number of phases of a converter, which are represented as a linear combination of the sinusoidal and cosinusoidal signals generated by the oscillator.
7. The controller of claim 6, wherein the engendering block generates the quorte signal by multiplying the negative of the frequency with an inner product of the cosinusoidal vector and the input current.
8. The controller of claim 1, wherein the torque-frequency channel consists of a first block that converts a sum of the torque set-point and the negative torque feedback signal into an offset added to the frequency reference to generate a desired frequency and a second block to generate the frequency from the desired frequency.
9. The controller of claim 8, wherein the first block is a constant gain frequency droop coefficient that reflects an impact of a torque variation on a frequency variation.
10. The controller of claim 1, wherein the quorte-flux channel consists of a third block that converts a sum of the quorte set-point and the negative quorte feedback signal into an offset added to the flux reference to generate a desired flux and a fourth block to generate the flux from the desired flux.
11. The controller of claim 10, wherein the third block is a constant gain flux droop coefficient that reflects an impact of a quorte variation on a flux variation.
12. The controller of claim 1, wherein the virtual impedance represents an impedance of a complex network.
13. The controller of claim 1, wherein one of the two voltages used to generate the virtual current is the output voltage and the other is a voltage measured from the power electronic converter.
14. The controller of claim 1, wherein the two voltages used to generate the virtual current are both measured from the power electronic converter.
15. The controller of claim 1, wherein the first integrator block with a reset input consists of an integrator in series with a gain and an additional transfer function.
16. The controller of claim 1, wherein the second integrator block with a reset input consists of an integrator in series with a gain and an additional transfer function.
17. The controller of claim 1, wherein a reset function for the first integrator block and the second integrator block comprises disconnecting or disabling the corresponding integrator block.
18. The controller of claim 1, wherein the output voltage is a control signal for the power electronic converter.
19. The controller of claim 1, wherein the output voltage and the virtual current are added together to create a control signal for the power electronic converter.
20. The controller of claim 1, wherein the torque signal is filtered prior to completing a negative torque feedback loop, and the quorte signal is filtered prior to completing a negative quorte feedback loop.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) The accompanying figures further illustrate the disclosed embodiments and, together with the detailed description of the disclosed embodiments, serve to explain the principles of the present invention.
(2)
(3)
(4)
(5)
DETAILED DESCRIPTION
(6) The particular values and configurations discussed in these non-limiting examples can be varied and are cited merely to illustrate at least one embodiment and are not intended to limit the scope thereof.
(7) The embodiments will now be described more fully hereinafter with reference to the accompanying drawings, in which illustrative embodiments of the invention are shown. The embodiments disclosed herein can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
(8) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms a, an, and the are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms comprises and/or comprising, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
(9) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
(10) Subject matter will now be described more fully hereinafter with reference to the accompanying drawings, which form a part hereof, and which show, by way of illustration, specific example embodiments. Subject matter may, however, be embodied in a variety of different forms and, therefore, covered or claimed subject matter is intended to be construed as not being limited to any example embodiments set forth herein; example embodiments are provided merely to be illustrative. Likewise, a reasonably broad scope for claimed or covered subject matter is intended. Among other things, for example, subject matter may be embodied as methods, devices, components, or systems. Accordingly, embodiments may, for example, take the form of hardware, software, firmware or any combination thereof (other than software per se). The following detailed description is, therefore, not intended to be taken in a limiting sense.
(11) Throughout the specification and claims, terms may have nuanced meanings suggested or implied in context beyond an explicitly stated meaning. Likewise, the phrase in one embodiment as used herein does not necessarily refer to the same embodiment and the phrase in another embodiment as used herein does not necessarily refer to a different embodiment. It is intended, for example, that claimed subject matter include combinations of example embodiments in whole or in part.
(12) In general, terminology may be understood at least in part from usage in context. For example, terms such as and, or, or and/or as used herein may include a variety of meanings that may depend at least in part upon the context in which such terms are used. Typically, or if used to associate a list, such as A, B, or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B, or C, here used in the exclusive sense. In addition, the term one or more as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as a, an, or the, again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term based on may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.
(13) The system under consideration is shown in
(14) The converter-side elements L.sub.1 and R.sub.1 and the capacitor C.sub.f form a LC filter to filter out the switching ripples. The supply-side elements L.sub.2 and R.sub.2 can be regarded as an additional inductor that is part of an LCL filter and/or a coupling transformer.
(15) The objective of this invention is to disclose a controller and method that generates an output voltage e to render the system shown in
(16) The Disclosed Controller
(17) The disclosed controller is shown in
(18) The Engendering Block .sub.e:
(19) The ghost operator g is an operator that shifts the phase of a sine or cosine function by
(20)
rad leading. Define the sinusoidal and cosinusoidal signals {tilde over (z)}=sin and {tilde over (z)}.sub.g=g{tilde over (z)}=cos .
In other words, {tilde over (z)}.sub.g is obtained via applying the ghost operator g to {tilde over (z)}. Note that {tilde over (z)} and {tilde over (z)}.sub.g are actually the states of the oscillator
(21)
with the oscillating frequency ={dot over ()} being the input. Moreover, define the following sinusoidal vector
(22)
to represent normalized three-phase voltages. Furthermore, denote z.sub.g=gz. Then
(23)
is a cosinusoidal vector corresponding to a three-phase system. It is easy to see that the sinusoidal and cosinusoidal vectors z and z.sub.g can be described by the linear combination of the oscillator states as
(24)
(25) The output voltage e is designed as
e=Ez,(4)
with
E=
being the amplitude of the output voltage, which is the product of the frequency and the flux . Because the frequency only varies in a very small range during normal operation, the voltage E is mainly determined by the flux . Denote e.sub.g=ge to represent the ghost three-phase voltages, which are 90 leading e. Then,
e.sub.g=ge=Ez.sub.g.(5)
(26) For the three-phase converter shown in
P=i,e
, Q=
i,e.sub.g
.
Hence, the real power and the reactive power are
P=i,z
T, Q=
i,z.sub.g
,(6)
where
T=(i,z)=z.sup.Ti(7)
resembles the electromagnetic torque of a synchronous machine and
=i,z.sub.g
z.sub.g.sup.Ti(8)
is a quantity dual to the torque T, for which the word quorte is coined to represent its duality to the torque. Since the frequency and the flux are often regulated within a small range, respectively, the real power is roughly in proportion to the torque and the reactive power is roughly in proportion to the quorte.
(27) In summary, the block .sub.e can be described as
(28)
with z and z.sub.g obtained via (3) and (1). Apparently, it is not skew-symmetric and not lossless, which causes considerable challenges in rendering the system passive.
(29) For single-phase applications, only the first elements in the vectors z, z.sub.g, e and e.sub.g are needed. For multiple-phase applications, the vectors z, z.sub.g, e and e.sub.g can be adjusted according to the number of phases to reflect the phase spacing. The vector z and, hence, the output voltage e contain equally spaced sinusoidal signals that can be represented by the linear combination of the oscillator states. In practice, filters may be introduced to filter out the ripples in T and before feeding back.
(30) Generation of Desired Frequency .sub.d and Flux .sub.d Through Droop Control:
(31) The purpose of the blocks .sub. and .sub. in
.sub.d=.sub.r+D.sub.(T.sub.setT),
.sub.d=.sub.r+D.sub.(.sub.set).(10)
Here, .sub.r and .sub.r are the frequency reference and the flux reference, respectively, and D.sub. and D.sub. are the frequency droop coefficient and the flux droop coefficient defined, respectively, as
(32)
to describe the impact of the torque variation T, corresponding to the active power variation P, and the quorte variation , corresponding to the reactive power variation Q, on the frequency variation and the flux variation . The reference values .sub.r and .sub.r are obtained via adding the outputs of the integrator blocks I.sub. and I.sub. as offsets to the rated values of the frequency and the flux
(33)
respectively, where f.sub.n and V.sub.n are the rated values of the system frequency and the phase voltage (rms). Note that D.sub. and D.sub. described above are static gains but they can be designed to be dynamic as well. e.g. to include an integrator or to be a filter.
(34) Design of .sub. and .sub. to Obtain a Passive .sub.C:
(35) It can be shown that the block .sub.C in
(36)
with non-negative Hamiltonians H.sub. and H.sub., positive semi-definite damping matrices R.sub. and R.sub., and skew-symmetric matrices J.sub. and J.sub..
(37) Moreover, it can be mathematically proven that the system shown in
(38) Regulation and Self-Synchronization Capabilities:
(39) As is well known, the most important and basic requirement for grid-connected converters is to keep synchronized with the grid before and after being connected to the grid so that (1) the converter can be connected to the grid and (2) the converter can exchange the right amount of power with the grid even when the grid voltage changes its frequency, phase and/or amplitude. It has been a norm to adopt a synchronization unit. e.g. a phase-locked loop (PLL) and its variants, to make sure that the converter is synchronized with the grid. The disclosed controller shown in
(40) The virtual impedance Z(s) is added to generate a virtual current i.sub.v before being connected to the grid, according to the voltage difference between two voltages. e.g. e and v. The two integrator blocks I.sub. and I.sub. regulate T=T.sub.set and =.sub.set, respectively. If T.sub.set and .sub.set are set as 0, then both T and can be regulated to 0 when Switch S.sub.C is at Position 1. This leads to e=v and, hence, the converter is synchronized with the grid. Once the synchronization is achieved, the converter can be connected to the grid. While the converter is connected to the grid, Switch S.sub.C is thrown to Position 2. Then, the converter can be operated in the set mode to regulate T and to the set-points T.sub.set and .sub.set, respectively, if the integrator blocks I.sub. and I.sub. are enabled by setting the signals S.sub. and S.sub. low; it can be operated in the frequency and flux droop mode if the integrator blocks I.sub. and I.sub. are reset by setting the signals S.sub. and S.sub. high. The operation modes of the system are summarized in Table I.
(41) The integrator blocks I.sub. and I.sub. can be a simple integrator with a gain or a more complex transfer function consisting of an integrator, a gain and an additional transfer function. The gains should be small in order to make sure that the desired frequency .sub.d and flux .sub.d change more slowly than the tracking of the frequency and the flux. The virtual impedance Z(s) can be chosen as a low-pass filter or other impedance that is appropriate.
(42) While the output voltage e is often directly used as the control signal for the power electronic converter, another option is to add the signal i, onto the output voltage e before using it as the control signal. In this way, it is equivalent to adding an inner voltage loop to regulate the voltage v to be the same as the output voltage e. Effectively, the actual control signal becomes e+i.sub.v. This helps eliminate the uncertainties in the converter hardware. e.g. the variations in the DC-bus voltage, the filter inductor and the power semiconductor switches. It is also able to shape the output impedance of the converter by designing Z(s).
(43) TABLE-US-00001 TABLE I OPERATION MODES OF THE DISCLOSED CONTROLLER IN FIG. 2. S.sub.C S.sub. S.sub. Mode 1 Low Low Self-synchronization 2 Low Low Regulation of T (hence, P) and (hence, Q) 2 Low High Regulation of T and Droop of (hence, voltage) 2 High Low Droop of and Regulation of 2 High High Droop of and
Implementation of the Blocks .sub. and .sub.
(44) The function of the blocks .sub. and .sub. is to track the desired frequency .sub.d and flux .sub.d. There are many options to achieve this. Here, two examples are illustrated. One is to adopt the standard integral controller and the other is to adopt a simple static controller.
(45) Using the Standard Integral Controller (IC):
(46)
(47)
where .sub. and .sub. are the time constants of the frequency and flux loops, respectively. Both .sub. and .sub. are first-order low-pass filters with a unity static gain. The Hamiltonians can be chosen as
(48)
Then, their time derivatives are, respectively,
(49)
As a result, the block .sub. can be written in the form of (13) with
(50)
while the block .sub. can be written in the form of (14) with
(51)
(52) Using the Static Controller:
(53) The simplest implementation is to use the static controllers
.sub.=1 and .sub.=1.(16)
This is equivalent to the implementation with an integrator having zero time constant in the previous subsection.
(54) In this case, the output voltage (4) becomes
e=.sub.d.sub.dz.(17)
(55) TABLE-US-00002 TABLE II SYSTEM PARAMETERS, Parameter Value Parameter Value L.sub.1, L.sub.2 2.5 mH, 1 mH P.sub.set 400 W R.sub.1, R.sub.2 0.5 Q.sub.set 200 var C.sub.f 22 F RL load R 54.45 V.sub.n, f.sub.n 110 V, 60 Hz RL load L 48 mH V.sub.g, f.sub.g 112 V, 59.8 Hz S.sub.n 1 kVA
Validation with Computational Simulations
(56) The disclosed control framework is validated with computational simulations for the system shown in
(57)
(58)
(59) The converter has the rated power S.sub.n=1 kVA. The set-points for the torque and quorte are obtained from
(60)
respectively. The simulation results with both the static controller (Static) and the integral controller (with IC) are shown in
(61) Self-Synchronization:
(62) This is mandatory before connecting the converter to the grid. As mentioned before, it is the same as the set mode for the converter to regulate T and to 0 using the virtual current i.sub.v, with the signals S.sub. and S.sub. set at Low to enable the integrators. In order to show the robustness of the synchronization, the initial grid voltage has a phase angle of +50, a frequency of 59.8 Hz and a phase voltage of 112 V (rms value). As shown in
(63) Operation after Synchronization:
(64) After the converter achieves synchronization, it can be connected to the grid. In order to demonstrate the proposed control framework, different scenarios, including operation in both the grid-connected mode with grid frequency and voltage changes and the islanded mode with load change, are tested. The results are shown in
(65)
W to 733 W, attempting to regulate the grid frequency. However, the grid frequency is fixed at 59.8 Hz so the frequency f quickly increases and returns back to 59.8 Hz. The reactive power is still operated in the set mode so the reactive power quickly returns to 200 var after a small transient due to the coupling effect. The load voltage increases slightly because the real power dispatched increases. at t=6 s, the signal S, is changed to High to enable the flux (voltage) droop. Because the voltage e.sub.a is about 114 V, which is above the rated voltage 110 V, the converter decreases the reactive power automatically to regulate the voltage to a value determined by the system parameters. For the system under simulation, the reactive power is reduced by 500 var to 300 var, with the voltage e.sub.a settling down at 112 V. The load voltage v.sub.a drops accordingly. The frequency is still maintained by the grid at 59.8 Hz and the real power remains more or less unchanged. Because of the change of the reactive power, the current increases slightly. at t=7 s, the grid frequency is changed to the rated value at 60 Hz. The frequency f quickly tracks the change of the grid frequency and settles down at 60 Hz. Because the converter is working in the frequency droop mode, the real power reduces automatically by
(66)
W from 733 W to 400 W, the original set-point for the real power. This causes the voltage e.sub.a to drop a bit, which then causes the reactive power to recover (increase) a bit. at t=8 s, the grid voltage is changed to the rated value at 110 V. The voltage v.sub.a drops below 110 V, which causes the voltage e.sub.a to drop too. As a consequence, the reactive power increases. The real power and the frequency remain more or less unchanged after a short transient. at t=9 s, the grid is changed back to 59.8 Hz and 112 V and the main breaker is opened to operate the converter in the islanded mode. The change of the grid frequency and voltage does not matter. What matters is the change of the operation mode from the grid-connected to the islanded mode. As can be seen from
(67)
Hz to 59.88 Hz (from 60 Hz). The reactive power of the filter capacitor is about 300 var. Adding the load reactive power about 200 var, the reactive power is about 100 var. Taking into account the reactive power of the filter inductor, the total reactive power is about 90 var, which is consistent with the value shown in
(68)
Hz to 59.772 Hz. As expected, the change in the reactive power is very small and so are the changes of the flux V and the voltages e.sub.a and v.sub.a.
(69) As can be seen from the zoomed-in details of the transients, the transients are very fast and often settle down within two cycles even for the integral controller (IC). The frequency and the flux only change within very small ranges. The torque T and the quorte look very similar to the real power P and the reactive power Q, respectively, apart from having different values, and hence are not shown. It is worth noting that the load voltage v.sub.a is well maintained around the rated value during the whole process, which is an important requirement.
(70) It will be appreciated that variations of the above-disclosed and other features and functions, or alternatives thereof, may be desirably combined into many other different systems or applications. It will also be appreciated that various presently unforeseen or unanticipated alternatives, modifications, variations or improvements therein may be subsequently made by those skilled in the art, which are also intended to be encompassed by the following claims.