Abstract
A control device for driving a bipolar switchable power semiconductor component is designed to apply an electrical voltage to a gate terminal of the power semiconductor component and to reduce the electrical voltage for turning off the power semiconductor component from a first voltage value to a second voltage value. The control device is designed, for turning off the power semiconductor component, firstly to reduce the electrical voltage from the first voltage value to a desaturation value and then to reduce the electrical voltage from the desaturation value to the second voltage value. The desaturation value is greater than a pinch-off voltage of the power semiconductor component.
Claims
1.-8. (canceled)
9. A control device for driving a bipolar switchable power semiconductor component, said control device being configured to apply an electrical voltage to a gate terminal of the power semiconductor component and, in order to turn off the power semiconductor component, to reduce the applied electrical voltage from a first voltage value to a desaturation value and then to reduce the applied electrical voltage from the desaturation value to a second voltage value, with the desaturation value being greater than a pinch-off voltage of the power semiconductor component, said control device comprising: a first switch configured to apply the electrical voltage with the first voltage value to the gate terminal; a second switch configured to apply the electrical voltage with the second voltage value to the gate terminal; and a first measuring unit configured to measure a collector current at a collector terminal of the power semiconductor component, with the desaturation value being determined on the basis of the collector current, wherein at least one of the first and second switches is activated periodically, and wherein the applied electrical voltage is set to the desaturation value by specifying a duty cycle for the activation of the at least one of the first and second switches.
10. The control device of claim 9, wherein the control device is configured to apply the electrical voltage with the desaturation value to the gate terminal for a specific pulse duration.
11. The control device of claim 10, further comprising a second measuring unit configured to measure a gate-emitter voltage between the gate terminal and an emitter terminal of the power semiconductor component as the power semiconductor component is turned off, with the pulse duration being determined on the basis of the gate-emitter voltage.
12. A semiconductor module, comprising: a bipolar switchable power semiconductor component; and a control device for driving the bipolar switchable power semiconductor component, said control device being configured to apply an electrical voltage to a gate terminal of the power semiconductor component and, in order to turn off the power semiconductor component, to reduce the applied electrical voltage from a first voltage value to a desaturation value and then to reduce the applied electrical voltage from the desaturation value to a second voltage value, with the desaturation value being greater than a pinch-off voltage of the power semiconductor component, said control device comprising a first switch configured to apply the electrical voltage with the first voltage value to the gate terminal, a second switch configured to apply the electrical voltage with the second voltage value to the gate terminal, and a first measuring unit configured to measure a collector current at a collector terminal of the power semiconductor component, with the desaturation value being determined on the basis of the collector current, wherein at least one of the first and second switches is activated periodically, and wherein the applied electrical voltage is set to the desaturation value by specifying a duty cycle for the activation of the at least one of the first and second switches.
13. The semiconductor module of claim 12, wherein the control device is configured to apply the electrical voltage with the desaturation value to the gate terminal for a specific pulse duration.
14. The semiconductor module of claim 13, further comprising a second measuring unit configured to measure a gate-emitter voltage between the gate terminal and an emitter terminal of the power semiconductor component as the power semiconductor component is turned off, with the pulse duration being determined on the basis of the gate-emitter voltage.
15. The semiconductor module of claim 12, wherein the bipolar switchable power semiconductor component is a bipolar transistor with insulated gate terminal.
16. A method for driving a bipolar switchable power semiconductor component, said method comprising: applying by a control device an electrical voltage to a gate terminal of the power semiconductor component; in order to turn off the power semiconductor component, reducing the applied electrical voltage from a first voltage value to a desaturation value and then reducing the applied electrical voltage from the desaturation value to a second voltage value, with the desaturation value being greater than a pinch-off voltage of the power semiconductor component; applying via a first switch the electrical voltage with the first voltage value to the gate terminal; applying via a second switch the electrical voltage with the second voltage value to the gate terminal; periodically activating at least one of the first and second switches; setting the applied electrical voltage to the desaturation value by specifying a duty cycle for the activation of the at least one of the first and second switches; measuring a collector current at a collector terminal of the power semiconductor component; and determining the desaturation value on the basis of the collector current.
Description
[0021] The present invention will now be described in greater detail based on preferred exemplary embodiments and by reference to the attached drawings. The figures show:
[0022] FIG. 1 a temporal waveform of an electrical voltage at a gate terminal before a gate discharge resistor of a power semiconductor component when turning off the power semiconductor component in accordance with the prior art;
[0023] FIG. 2 the temporal waveform of the electrical voltage at the gate terminal of the power semiconductor component when turning off the power semiconductor component in accordance with one embodiment of the invention;
[0024] FIG. 3 a waveform of a pinch-off voltage and a desaturation value of the electrical voltage;
[0025] FIG. 4 a semiconductor module comprising a control device and a power semiconductor component, according to a first embodiment;
[0026] FIG. 5 switching characteristics of switches of the control device in accordance with FIG. 4 as a function of time;
[0027] FIG. 6 a semiconductor module with a control device in accordance with another embodiment;
[0028] FIG. 7 switching characteristics of the switches of the control device in accordance with FIG. 6 in a first embodiment;
[0029] FIG. 8 switching characteristics of the switches of the control device in accordance with FIG. 6 in a second embodiment; and
[0030] FIG. 9 a semiconductor module with a control device in accordance with another embodiment.
[0031] In the figures, identical and functionally equivalent elements are indicated by identical reference marks.
[0032] FIG. 1 shows a waveform of an electrical voltage U as a function of time t, which is present at a gate terminal of the power semiconductor component 1 while a power semiconductor component 1 is being turned off. The electrical voltage U describes the voltage before a possible gate discharge resistor, which is usually arranged between the gate terminal of the power semiconductor component 1 and the control device 2. In this case the waveform of the voltage U which is shown in FIG. 1 describes a turn-off process in accordance with the prior art. If the power semiconductor component 1 is turned on, an electrical voltage U with a first voltage value U.sub.B is present at the gate terminal. The first voltage value U.sub.B+ can be a positive electrical voltage. When the power semiconductor component 1 is turned off, the electrical voltage U is reduced from the first voltage value U.sub.B+ to a second voltage U.sub.B. The second voltage value U.sub.B can be assigned, for example, to a negative electrical voltage. The direct transition from the conducting state with a high charge carrier concentration to the de-energized state results in comparatively high turn-off losses.
[0033] In comparison to this, FIG. 2 shows the waveform of the electrical voltage U as a function of time t for a turn-off process in accordance with one embodiment of the invention. In this case, the electrical voltage U at the gate terminal is firstly reduced from the first voltage U.sub.B+ to a desaturation value U.sub.Sat and subsequently to the second voltage U.sub.B. The electrical voltage U with the desaturation value U.sub.B is present at the gate terminal for a predefined pulse duration t.sub.P. The pulse duration t.sub.p begins at a first time t1 and ends at a second time t2. Because the electrical voltage U at the gate terminal is firstly reduced to the desaturation value U.sub.Sat, the charge carrier concentration can be reduced before the actual turn-off process of the power semiconductor component 1. As a result, less charge needs to be dispelled from the power semiconductor component 1 during the turn-off process. The turn-off losses are therefore reduced.
[0034] This desaturation value U.sub.Sat is determined such that it has a value slightly above a load current-dependent cut-off voltage U.sub.P of the power semiconductor component 1. This cut-off voltage U.sub.P can also be referred to as the pinch-off voltage. FIG. 3 shows a waveform of the pinch-off voltage value U.sub.P together with the waveform of the desaturation voltage value U.sub.Sat. The diagram in FIG. 3 in this case shows the gate-emitter voltage U.sub.GE as a function of the collector current I.sub.C. The desaturation value U.sub.Sat can have a specified level which corresponds at least to the maximum anticipated pinch-off voltage U.sub.P. The desaturation value U.sub.Sat can also be set very close to the pinch-off voltage U.sub.P due to the collector current I.sub.C being measured before turning off. However, this requires an adjustable voltage source or voltage sink.
[0035] FIG. 4 shows a semiconductor module 3 according to a first embodiment. The semiconductor module 3 comprises a control device 2 and the power semiconductor component 1. The power semiconductor component 1 can be implemented as a conventional or reverse-conducting IGBT. In the present case an example equivalent circuit diagram of the reverse-conducting IGBT is shown for the power semiconductor component 1. In this exemplary embodiment the control device 2 comprises a first switch S1, by means of which the power semiconductor component 1 can be connected to an electrical voltage U with the first voltage value U.sub.B+ via a first resistor R1. Furthermore, the control device 2 comprises a second switch S2, by means of which the power semiconductor component 1 can be connected to an electrical voltage U with the second voltage value U.sub.B via a second resistor R2. The control device 2 also comprises a third switch S3, by means of which the power semiconductor component 1 can be connected to an electrical voltage U with the desaturation value U.sub.Sat via a third resistor R3.
[0036] FIG. 5 shows the switching characteristics of the switches S1, S2 and S3 of the control device 2 according to FIG. 4 as a function of time t. To turn off the power semiconductor component 1, the first switch S1 is opened at the first time point t1. At the same time, the third switch S3 is closed. This causes the saturation pulse to be initiated for the pulse duration t.sub.P. After reducing the number of charge carriers in the power semiconductor component 1, by activating only the second switch S2 at the second time t2 the power semiconductor component 1 is turned off with a reduced charge carrier concentration and, therefore, reduced switching losses.
[0037] FIG. 6 shows a semiconductor module 3 according to a further embodiment. In this case the control device 2 comprises only the first switch S1 and the second switch S2, which were described in connection with the switching device 2 according to FIG. 4. In this case, the additional voltage level of the desaturation value U.sub.Sat is not required. As explained below, the reduction of the gate-emitter voltage U.sub.GE can be carried out by a brief and incomplete discharging of the gate.
[0038] FIG. 7 shows the switching characteristics of the switches S1 and S2 of the control device 2 according to FIG. 6 as a function of time t according to a first embodiment. In this case, the voltage U at the gate is brought to the desaturation value U.sub.Sat by deactivating the first switch S1 and briefly activating the second switch S2. At the first time t1 the first switch S1 is opened and the second switch S2 is closed for the first time interval t.sub.d1. The first time interval t.sub.d1 can either be specified as a fixed value or can be determined by measurement of the gate-emitter voltage. For this purpose, it would also be possible to detect an associated increase in the collector-emitter voltage. After the desaturation value U.sub.Sat is reached, both the first switch S1 and the second switch S2 are deactivated for the second time interval t.sub.d2 and the control is therefore set to high impedance. Alternatively, by switching over to a high-impedance gate resistance a smaller gate current can also be set. After the desaturation value U.sub.Sat, which is present for the pulse duration t.sub.P, the switching operation is continued at the second time t2 with activation of the second switch S2.
[0039] FIG. 8 shows the switching characteristics of the switches S1 and S2 of the control device 2 according to FIG. 6 as a function of time t according to a second embodiment. In this case, the gate-emitter voltage U.sub.GE is achieved by a pulse-width modulation. By using a suitable mark-to-space ratio, the desaturation value U.sub.Sat is set at the gate terminal of the power semiconductor component 1. Before the gate of the power semiconductor component 1 is discharged to the second voltage U.sub.B using the second switch S2, by means of a pulse-width modulation the desaturation pulse is initiated by activation of the first switch S1 and the second switch S2. In this case, the desaturation value U.sub.Sat is adjusted with the corresponding duty cycle of the first switch S1 and the second switch S2.
[0040] FIG. 9 shows a semiconductor module 3 according to a further embodiment. In this case the control unit 2 comprises an analog amplifier 4, or analog power amplifier stage. The amplifier 4 comprises a first transistor T1, via which the electrical voltage U with the first voltage value U.sub.B+ can be applied to the power semiconductor component via the resistor R. The amplifier 4 also comprises a second transistor T2, via which the electrical voltage U with the second voltage U.sub.B can be applied to the power semiconductor component 1. By using the amplifier 4 the electrical voltage U can be adjusted continuously. Thus, the waveform of the electrical voltage U, which has been explained in connection with FIG. 2, can be applied at the gate terminal of the power semiconductor component 1.
[0041] By the use of the control device 2 or by way of the turn-off characteristics, the field-strength load on the power semiconductor component 1 when turning the device off is reduced, since the charge carrier concentration in the power semiconductor component 1 is reduced due to the saturation value U.sub.Sat. When utilizing the robustness limits or the safe operating range, which in particular describe higher switching speeds by a higher gate discharge current without exceeding the field strength limits, switching losses can be significantly reduced. In particular, this can be exploited if the rate of increase of the voltage at the main terminals of the power semiconductor component 1 is not limited by the application. The semiconductor modules 3 described can, in particular, form part of a converter. Therefore, due to the reduction of the switching losses the efficiency of the converter can be increased.
