TFT substrate and manufacturing method thereof

Abstract

The present invention provides a TFT substrate and a manufacturing method thereof. The manufacturing method of the TFT substrate according to the present invention includes additionally providing a transparent polypropylene film on an IGZO active layer to provide an effect of blocking UV light and thus preventing UV light from affecting stability of the IGZO active layer so as to improve stability of a TFT device without increasing the number of masks used. When the manufacturing method of the TFT substrate according to the present invention is applied to production of OLED display panels, the transparent polypropylene film may serve as a planarization layer so that the existing manufacturing process of OLED display panels does not need to be modified and manufacturing costs are not increased. Further, the TFT substrate so manufactured adopts a back channel etching type IGZO-TFT structure, which, as compared to a traditional etch stop type IGZO-TFT structure, requires fewer photoengraving operations and a lower manufacturing cost. The TFT substrate according to the present invention includes a transparent polypropylene film additionally provided on an IGZO active layer to provide an effect of blocking UV light so as to improve stability of a TFT device and manufacturing cost is low.

Claims

1. A manufacturing method of a thin-film transistor (TFT) substrate, comprising the following steps: Step 1: providing a backing plate, forming a gate electrode on the backing plate, and forming a gate insulation layer on the gate electrode and the backing plate; Step 2: forming an active layer on the gate insulation layer to be located above and corresponding to the gate electrode and forming a source electrode and a drain electrode on the active layer and the gate insulation layer such that the source electrode and the drain electrode are respectively in contact with two opposite ends of the active layer; and Step 3: forming a passivation layer on the source electrode, the drain electrode, the active layer, and the gate insulation layer, and forming a transparent polypropylene film on the passivation layer, wherein the passivation layer is directly deposited on and in contact with tops of the source electrode, the drain electrode, and the active layer, and the transparent polypropylene film is directly coated on a top surface of the passivation layer such that a bottom surface of the transparent polypropylene film is in direct contact with the top surface of the passivation layer and an opposite, top surface of the transparently polypropylene film forms a flat planar surface that is opposite to the active layer.

2. The manufacturing method of the TFT substrate as claimed in claim 1, wherein the top surface of the transparent polypropylene film formed in Step 3 that forms the flat planar surface constitutes a planarization layer, and the manufacturing method of the TFT substrate further comprises: Step 4: forming a first via in the planarization layer and the passivation layer to be located above and corresponding to the drain electrode and forming a first electrode on the planarization layer, such that the first electrode is set in connection with the drain electrode through the first via; and forming a pixel definition layer on the first electrode and the planarization layer, and forming a second via in the pixel definition layer to be located above and corresponding to the first electrode.

3. The manufacturing method of the TFT substrate as claimed in claim 1, wherein the active layer comprises a material of indium gallium zinc oxide.

4. The manufacturing method of the TFT substrate as claimed in claim 1, wherein the backing plate comprises a glass substrate; the gate electrode, the source electrode, and the drain electrode each comprise a material comprising one or multiple ones of molybdenum, aluminum, copper, titanium, and chromium; the gate insulation layer and the passivation layer each comprise a material comprising one or multiple ones of silicon oxide and silicon nitride.

5. The manufacturing method of the TFT substrate as claimed in claim 2, wherein Step 4 further comprises: forming an organic light-emitting diode (OLED) emissive layer and a second electrode in the second via in sequence from bottom to top; the first electrode and the second electrode are respectively an anode and a cathode; and the first electrode and the second electrode each comprise a material comprising one or multiple ones of a metal and a transparent conductive metal oxide.

6. A thin-film transistor (TFT) substrate, comprising: a backing plate, a gate electrode arranged on the backing plate, a gate insulation layer arranged on the gate electrode and the backing plate, an active layer arranged on the gate insulation layer and located above and corresponding to the gate electrode, a source electrode and a drain electrode arranged on the active layer and the gate insulation layer and respectively in contact with two opposite ends of the active layer, a passivation layer arranged on the source electrode, the drain electrode, the active layer, and the gate insulation layer, and a transparent polypropylene film arranged on the passivation layer, wherein the passivation layer is directly located on and in contact with tops of the source electrode, the drain electrode, and the active layer, and the transparent polypropylene film is directly located on a top surface of the passivation layer such that a bottom surface of the transparent polypropylene film is in direct contact with the top surface of the passivation layer and an opposite, top surface of the transparently polypropylene film forms a flat planar surface that is opposite to the active layer.

7. The TFT substrate as claimed in claim 6, wherein the top surface of the transparent polypropylene film that is the flat planar surface constitutes a planarization layer, the TFT substrate further comprising: a first via formed in the planarization layer and the passivation layer and located above and corresponding to the drain electrode, a first electrode arranged on the planarization layer, a pixel definition layer arranged on the first electrode and the planarization layer, and a second via formed in the pixel definition layer and located above and corresponding to the first electrode such that the first electrode is set in connection with the drain electrode through the first via.

8. The TFT substrate as claimed in claim 6, wherein the active layer comprises a material of indium gallium zinc oxide.

9. The TFT substrate as claimed in claim 6, wherein the backing plate comprises a glass substrate; the gate electrode, the source electrode, and the drain electrode each comprise a material comprising one or multiple ones of molybdenum, aluminum, copper, titanium, and chromium; the gate insulation layer and the passivation layer each comprise a material comprising one or multiple ones of silicon oxide and silicon nitride.

10. The TFT substrate as claimed in claim 7 further comprising: an organic light-emitting diode (OLED) emissive layer and a second electrode formed in the second via in sequence from bottom to top, the first electrode and the second electrode being respectively an anode and a cathode, the first electrode and the second electrode each comprising a material comprising one or multiple ones of a metal and a transparent conductive metal oxide.

11. A thin-film transistor (TFT) substrate, comprising: a backing plate, a gate electrode arranged on the backing plate, a gate insulation layer arranged on the gate electrode and the backing plate, an active layer arranged on the gate insulation layer and located above and corresponding to the gate electrode, a source electrode and a drain electrode arranged on the active layer and the gate insulation layer and respectively in contact with two opposite ends of the active layer, a passivation layer arranged on the source electrode, the drain electrode, the active layer, and the gate insulation layer, and a transparent polypropylene film arranged on the passivation layer, wherein the passivation layer is directly located on and in contact with tops of the source electrode, the drain electrode, and the active layer, and the transparent polypropylene film is directly located on a top surface of the passivation layer such that a bottom surface of the transparent polypropylene film is in direct contact with the top surface of the passivation layer and an opposite, top surface of the transparently polypropylene film forms a flat planar surface that is opposite to the active layer; wherein the active layer comprises a material of indium gallium zinc oxide; and wherein the backing plate comprises a glass substrate; the gate electrode, the source electrode, and the drain electrode each comprise a material comprising one or multiple ones of molybdenum, aluminum, copper, titanium, and chromium; the gate insulation layer and the passivation layer each comprise a material comprising one or multiple ones of silicon oxide and silicon nitride.

12. The TFT substrate as claimed in claim 11, wherein the top surface of the transparent polypropylene film that is flat planar surface constitutes a planarization layer, the TFT substrate further comprising: a first via formed in the planarization layer and the passivation layer and located above and corresponding to the drain electrode, a first electrode arranged on the planarization layer, a pixel definition layer arranged on the first electrode and the planarization layer, and a second via formed in the pixel definition layer and located above and corresponding to the first electrode such that the first electrode is set in connection with the drain electrode through the first via.

13. The TFT substrate as claimed in claim 12 further comprising: an organic light-emitting diode (OLED) emissive layer and a second electrode formed in the second via in sequence from bottom to top, the first electrode and the second electrode being respectively an anode and a cathode, the first electrode and the second electrode each comprising a material comprising one or multiple ones of a metal and a transparent conductive metal oxide.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The technical solution, as well as other beneficial advantages, of the present invention will become apparent from the following detailed description of embodiments of the present invention, with reference to the attached drawings.

(2) In the drawings:

(3) FIG. 1 is a flow chart illustrating a manufacturing method of a thin-film transistor (TFT) substrate according to the present invention;

(4) FIG. 2 is a schematic view illustrating Step 1 of the manufacturing method of the TFT substrate according to the present invention;

(5) FIG. 3 is a schematic view illustrating Step 2 of the manufacturing method of the TFT substrate according to the present invention;

(6) FIG. 4 is a schematic view illustrating Step 3 of the manufacturing method of the TFT substrate according to the present invention and is also a schematic view illustrating the structure of the TFT substrate according to the present invention; and

(7) FIG. 5 is a schematic view illustrating Step 4 of the manufacturing method of the TFT substrate according to the present invention and is also a schematic view illustrating the structure of a preferred embodiment of the TFT substrate according to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

(8) To further expound the technical solution adopted in the present invention and the advantages thereof, a detailed description will be given with reference to the preferred embodiments of the present invention and the drawings thereof.

(9) Referring to FIG. 1, the present invention first provides a manufacturing method of a thin-film transistor (TFT) substrate, which comprises the following steps:

(10) Step 1: as shown in FIG. 2, providing a backing plate 10, forming a gate electrode 11 on the backing plate 10, and forming a gate insulation layer 12 on the gate electrode 11 and the backing plate 10.

(11) Specifically, the backing plate 10 comprises a glass substrate.

(12) Specifically, the gate electrode 11 comprises a material comprising one or multiple ones of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and chromium (Cr).

(13) Specifically, the gate insulation layer 12 comprises a material comprising one or multiple ones of silicon oxide (SiO.sub.x) and silicon nitride (SiN.sub.x). Preferably, the gate insulation layer 12 comprises a material of silicon oxide.

(14) Specifically, in Step 1, physical vapor deposition (PVD) is applied to deposit a metal film and a photoengraving process is applied to subject the metal film to patterning treatment so as to form the gate electrode 11.

(15) Specifically, in Step 1, chemical vapor deposition (CVD) is applied to deposit and form the gate insulation layer 12.

(16) Step 2: as shown in FIG. 3, forming an active layer 20 on the gate insulation layer 12 to be located above and corresponding to the gate electrode 11 and forming a source electrode 31 and a drain electrode 32 on the active layer 20 and the gate insulation layer 12 such that the source electrode 31 and the drain electrode 32 are respectively in contact with two opposite ends of the active layer 20.

(17) Specifically, the active layer 20 comprises a material of indium gallium zinc oxide (IGZO).

(18) Specifically, the source electrode 31 and the drain electrode 32 each comprise a material comprising one or multiple ones of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and chromium (Cr).

(19) Specifically, in Step 2, chemical vapor deposition (CVD) is applied to deposit and form a semiconductor layer, applying a photoengraving process to subject the semiconductor layer to patterning treatment so as to form the active layer 20, wherein the photoengraving process comprises operations of coating photoresist, exposure, development, and dry etching.

(20) Specifically, in Step 2, physical vapor deposition (PVD) is applied to deposit a metal film, and a photoengraving process is applied to subject the metal film to patterning treatment so as to form the source electrode 31 and the drain electrode 32.

(21) Step 3: as shown in FIG. 4, forming a passivation layer 40 on the source electrode 31, the drain electrode 32, the active layer 20, and the gate insulation layer 12 and forming a transparent polypropylene film 41 on the passivation layer 40.

(22) Specifically, the passivation layer 40 comprises a material comprising one or multiple ones of silicon oxide (SiO.sub.x) and silicon nitride (SiN.sub.x). Preferably, the passivation layer 40 comprises a material of silicon oxide.

(23) Specifically, in Step 3, chemical vapor deposition (CVD) is applied to deposit and form the passivation layer 40.

(24) Specifically, in Step 3, a coating operation is applied to form the transparent polypropylene film 41.

(25) The transparent polypropylene film 41 has excellent visible light transmission property and good ultraviolet (UV) light blocking property and may effectively prevent an IGZO-TFT from causing shifting of threshold voltage due to influence of UV light and the surrounding environment so as to improve stability of a TFT device. Further, the formation of the transparent polypropylene film 41 requires no use of masks and no addition of photoengraving operations so that manufacturing cost can be effectively saved.

(26) Specifically, the manufacturing method of the TFT substrate according to the present invention is applicable to the production of a TFT substrate for liquid crystal display panels and is also applicable to the production of a TFT substrate for AMOLED display panels. When the manufacturing method of the TFT substrate according to the present invention is used to manufacture a TFT substrate for AMOLED display panels, the transparent polypropylene film 41 formed in Step 3 has a surface that is planar and flat and may constitute a planarization layer 50. Further, the manufacturing method of the TFT substrate may further comprise:

(27) Step 4: as shown in FIG. 5, forming a first via 51 in the planarization layer 50 and the passivation layer 40 to be located above and corresponding to the drain electrode 32 and forming a first electrode 60 on the planarization layer 50, such that the first electrode 60 is set in connection with the drain electrode 32 through the first via 51; and

(28) forming a pixel definition layer 70 on the first electrode 60 and the planarization layer 50 and forming a second via 71 in the pixel definition layer 70 to be located above and corresponding to the first electrode 60. To this point, a TFT substrate useful for AMOLED display panels is formed.

(29) Further, Step 4 may additionally comprise: forming an OLED emissive layer 80 and a second electrode 90 in the second via 71 in sequence from bottom to top.

(30) Specifically, the first electrode 60 and the second electrode 90 are respectively a cathode and an anode, or alternatively, an anode and a cathode, respectively.

(31) Specifically, the first electrode 60 and the second electrode 90 each comprise a material comprising one or multiple ones of a metal and a transparent conductive metal oxide.

(32) Specifically, the pixel definition layer 70 comprises a material of organic photoresist material.

(33) Specifically, in Step 4, the first via 51 is formed through operations of exposure, development, and dry etching.

(34) Specifically, in Step 4, physical vapor deposition (PVD) is applied to deposit a conductive film, and a photoengraving operation is applied to subject the conductive film to patterning treatment to form the first electrode 60.

(35) Specifically, in Step 4, a coating operation is applied to form the pixel definition layer 70 and operations of exposure and development are applied to form the second via 71 in the pixel definition layer 70.

(36) Specifically, in Step 4, evaporation is applied to form the OLED emissive layer 80.

(37) Specifically, in Step 4, physical vapor deposition (PVD) is applied to deposit a conductive film, and a photoengraving operation is applied to subject the conductive film to patterning treatment to form the second electrode 90.

(38) The above-described manufacturing method of the TFT substrate comprises additionally providing a transparent polypropylene film on an IGZO active layer to provide an effect of blocking UV light and thus preventing UV light from affecting stability of the IGZO active layer so as to improve stability of a TFT device without increasing the number of masks used. When the manufacturing method of the TFT substrate according to the present invention is applied to production of OLED display panels, the transparent polypropylene film may serve as a planarization layer so that the existing manufacturing process of OLED display panels does not need to be modified and manufacturing costs are not increased. Further, the TFT substrate so manufactured adopts a back channel etching (BCE) type IGZO-TFT structure, which, as compared to a traditional etch stop (ES) type IGZO-TFT structure, requires fewer photoengraving operations and a lower manufacturing cost.

(39) Referring to FIG. 4, based on the above-described manufacturing method of the TFT substrate, the present invention also provides a TFT substrate, which comprises: a backing plate 10, a gate electrode 11 arranged on the backing plate 10, a gate insulation layer 12 arranged on the gate electrode 11 and the backing plate 10, an active layer 20 arranged on the gate insulation layer 12 and located above and corresponding to the gate electrode 11, a source electrode 31 and a drain electrode 32 arranged on the active layer 20 and the gate insulation layer 12 and respectively in contact with two opposite ends of the active layer 20, a passivation layer 40 arranged on the source electrode 31, the drain electrode 32, the active layer 20, and the gate insulation layer 12, and a transparent polypropylene film 41 arranged on the passivation layer 40.

(40) Specifically, the active layer 20 comprises a material of indium gallium zinc oxide (IGZO).

(41) The transparent polypropylene film 41 has excellent visible light transmission property and good ultraviolet (UV) light blocking property and may effectively prevent an IGZO-TFT from causing shifting of threshold voltage due to influence of UV light and the surrounding environment so as to improve stability of a TFT device.

(42) Specifically, the TFT substrate according to the present invention is applicable to liquid crystal display panels or AMOLED display panels. Referring to FIG. 5, when the TFT substrate according to the present invention is applied to the AMOLED display panels, the transparent polypropylene film 41 has a surface that is planar and flat and may constitute a planarization layer 50. The TFT substrate may further comprise: a first via 51 formed in the planarization layer 50 and the passivation layer 40 and located above and corresponding to the drain electrode 32, a first electrode 60 arranged on the planarization layer 50, a pixel definition layer 70 arranged on the first electrode 60 and the planarization layer 50, and a second via 71 formed in the pixel definition layer 70 and located above and corresponding to the first electrode 60 such that the first electrode 60 is set in connection with the drain electrode 32 through the first via 51.

(43) Further, the TFT substrate may additionally comprise: an OLED emissive layer 80 and a second electrode 90 formed in the second via 71 in sequence from bottom to top.

(44) Specifically, t the first electrode 60 and the second electrode 90 are respectively a cathode and an anode, or alternatively, an anode and a cathode, respectively. The first electrode 60 and the second electrode 90 each comprise a material comprising one or multiple ones of a metal and a transparent conductive metal oxide.

(45) Specifically, the pixel definition layer 70 comprises a material of organic photoresist material.

(46) Specifically, the backing plate 10 comprises a glass substrate.

(47) Specifically, the gate electrode 11, the source electrode 31, and the drain electrode 32 each comprise a material comprising one or multiple ones of molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and chromium (Cr).

(48) Specifically, the gate insulation layer 12 and the passivation layer 40 each comprise a material comprising one or multiple ones of silicon oxide (SiO.sub.x) and silicon nitride (SiN.sub.x). Preferably, the gate insulation layer 12 and the passivation layer 40 each comprise a material of silicon oxide.

(49) The above-described TFT substrate comprises a transparent polypropylene film additionally provided on an IGZO active layer to provide an effect of blocking UV light and thus preventing UV light from affecting stability of the IGZO active layer so as to improve stability of a TFT device without increasing the number of masks used. When the TFT substrate according to the present invention is applied to OLED display panels, the transparent polypropylene film may serve as a planarization layer so that the existing manufacturing process of OLED display panels does not need to be modified and manufacturing costs are not increased. Further, the TFT substrate so manufactured adopts a back channel etching (BCE) type IGZO-TFT structure, which, as compared to a traditional etch stop (ES) type IGZO-TFT structure, requires fewer photoengraving operations and a lower manufacturing cost.

(50) In summary, the present invention provides a TFT substrate and a manufacturing method thereof. The manufacturing method of the TFT substrate according to the present invention comprises additionally providing a transparent polypropylene film on an IGZO active layer to provide an effect of blocking UV light and thus preventing UV light from affecting stability of the IGZO active layer so as to improve stability of a TFT device without increasing the number of masks used. When the manufacturing method of the TFT substrate according to the present invention is applied to production of OLED display panels, the transparent polypropylene film may serve as a planarization layer so that the existing manufacturing process of OLED display panels does not need to be modified and manufacturing costs are not increased. Further, the TFT substrate so manufactured adopts a back channel etching type IGZO-TFT structure, which, as compared to a traditional etch stop type IGZO-TFT structure, requires fewer photoengraving operations and a lower manufacturing cost. The TFT substrate according to the present invention comprises a transparent polypropylene film additionally provided on an IGZO active layer to provide an effect of blocking UV light so as to improve stability of a TFT device and manufacturing cost is low.

(51) Based on the description given above, those having ordinary skills in the art may easily contemplate various changes and modifications of the technical solution and the technical ideas of the present invention. All these changes and modifications are considered belonging to the protection scope of the present invention as defined in the appended claims.